SL28EB742ALCT

SL28EB742 Not Recommended for New Designs EP RO C L O C K ® G E N E R A TO R F O R I NTEL ® C K 5 0 5 C O M P L I A N C E Features  25 MHz ouput N ot fo R r N ec o ew m m D e es nd ig e ns d  Compliant Intel CK505 Clock spec  Low power push-pull type differential  Buffered Reference Clock output buffers 14.318 MHz  Integrated resistors on differential  14.318 MHz Crystal Input or Clock clocks input  Wireless friendly 3-bits slew rate  I2C support with readback control on single-ended clocks capabilities  Differential CPU clocks with pin  Triangular Spread Spectrum profile selectable frequency for maximum electromagnetic interference (EMI) reduction Selectable Differential SATA or SRC  Industrial Temperature: clocks –40 to 85 °C 96 MHz Differential DOT clock  3.3 V power supply 48 MHz USB clock  56-pin QFN package Selectable 12 or 48 MHz clock  100 MHz Differential SRC clocks     Ordering Information: See page 39 Pin Assignments CPU SRC SATA DOT96 48M x2/x3 x4/x7 x0/x1 x1 x1/2 48M/ 12M 33M 25M 14.318M x1 x2 x1 x1 CKPWRGD/PD# Selectable Differential SRC or CPU Clock EProClock® Programmable Technology  > 4000 bits of configurations Differential amplitude control  Can be configured through SMBus Differential and single-ended or hard coded  Custom frequency sets  Differential skew control on true or compliment or both  Differential duty cycle control on true or compliment or both slew rate control Program Internal or External series resistor on single-ended clocks Program different spread profiles Program different spread modulation rate Selectable Differential SRC or CPU Clock CPU SRC SATA DOT96 48M 48M/ 12M 33M 25M 14.318M x2/x3 x4/x7 x0/x1 x1 x1/2 x1 x2 x1 x1 * Internal 100K-ohm pull-up resistor ** Internal 100K-ohm pull down resistor Patents pending Rev. 1.0 12/13 Copyright © 2013 by Silicon Laboratories SL28EB742 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. SL28EB742 Description N ot fo R r N ec o ew m m D e es nd ig e ns d The SL28EB742 is a high-performance clock generator supporting Intel Cedarview platforms. The SL28EB742 is rated to support extended grade temperature. Utilizing an inexpensive 14.318 MHz crystal, it is capable of supporting multiple frequencies from four PLLs. The CPU clock can support a frequency range from 83.33 to 166 MHz by configuration of two strap pins. With a combination of strap pins and an I2C interface, the device allows maximum configurability. EProClock® is the world’s first non-volatile programmable clock. The EProClock® technology allows board designer to promptly achieve optimum compliance and clock signal integrity; historically, attainable typically through device and/or board redesigns. EProClock® technology can be configured through SMBus or hard coded. Functional Block Diagram XIN XOUT Crystal/ CLKIN REF [1:0] PLL 1 (SSC) CPU Divider SRC FS [ C:A] PCI PLL 4 (non-SSC) CPU_STP# Divider SATA / SRC0 ITP_EN PCI/SRC_STP# PLL 3 (non-SSC) DOT96 Divider CLKREQ[3:1] 48M SEL_SATA PLL 2 (non-SSC) 12 / 48M Divider SEL_12_48 25M OTP SCLK SDATA Logic Core VR CLKPWRGD/ PD# 2 Rev. 1.0 SL28EB742 TABLE O F C ONTENTS Section Page N ot fo R r N ec o ew m m D e es nd ig e ns d 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1. Powerdown (PD#) Clarification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2. Powerdown (PD#) Assertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3. Powerdown (PD#) Deassertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.4. CPU_STP# Assertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.5. CPU_STP# Deassertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.6. PCI/SRC_STP# Assertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.7. PCI/SRC_STP# Deassertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3. Test and Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1. Single-ended Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 3.2. Differential Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4. Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 4.1. Frequency Select Pin FS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 4.2. Serial Data Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 4.3. Data Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 5. Pin Descriptions: 56-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 7. Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 Rev. 1.0 3 SL28EB742 1. Electrical Specifications Table 1. Recommended Operating Conditions (VDD = 3.3 V, TA = 25 °C) Parameter Test Condition Min Typ Max Unit VDD(industrial) 3.3 V ±5% 3.13 3.3 3.46 V N ot fo R r N ec o ew m m D e es nd ig e ns d Supply Voltage (extended) Symbol Supply Voltage (commercial) 3.3 V ±10% VDD(commercial) 2.97 3.3 3.63 V Table 2. DC Electrical Specifications Parameter Symbol Test Condition Min Max Unit 3.3 V Operating Voltage VDD core 3.3 ± 5% 3.135 3.465 V 3.3 V Input High Voltage (SE) VIH 2.0 VDD + 0.3 V 3.3 V Input Low Voltage (SE) VIL VSS – 0.3 0.8 V Input High Voltage VIHI2C SDATA, SCLK 2.2 — V Input Low Voltage VILI2C SDATA, SCLK — 1.0 V FS Input High Voltage VIH_FS 0.7 VDD+0. 3 V FS Input Low Voltage VIL_FS VSS – 0.3 0.35 V Input High Leakage Current IIH Except internal pull-down resistors, 0 < VIN < VDD — 5 A Input Low Leakage Current IIL Except internal pull-up resistors, 0 < VIN < VDD –5 — A 3.3 V Output High Voltage (SE) VOH IOH = –1 mA 2.4 — V 3.3 V Output Low Voltage (SE) VOL IOL = 1 mA — 0.4 V High-impedance Output Current IOZ –10 10 A Input Pin Capacitance CIN 1.5 5 pF 6 pF Output Pin Capacitance Pin Inductance Power Down Current Dynamic Supply Current 4 COUT LIN — 7 nH IDD_PD — 1 mA — 115 mA IDD_3.3 V All outputs enabled. SE clocks with 5” traces. Differential clocks with 5” traces. Loading per CK505 spec. Rev. 1.0 SL28EB742 Table 3. AC Electrical Specifications Parameter Symbol Test Condition Min Max Unit LACC Measured at VDD/2 differential — 250 ppm TDC Measured at VDD/2 47 53 % CLKIN Rise and Fall Times TR/TF Measured between 0.2 VDD and 0.8 VDD 0.5 4.0 V/ns CLKIN Cycle to Cycle Jitter TCCJ Measured at VDD/2 — 250 ps CLKIN Long Term Jitter TLTJ Measured at VDD/2 350 ps Input High Voltage VIH XIN / CLKIN pin 2 VDD+0.3 V Input Low Voltage VIL XIN / CLKIN pin — 0.8 V Input High Current IIH XIN / CLKIN pin, VIN = VDD 35 µA Input Low Current IIL XIN / CLKIN pin, 0 < VIN