TS3310/12/14 Data Sheet
True 150 nA IQ, Selectable 1.8 to 5 VOUT Instant-On Boost Converter
The TS3310/12/14 is a low power boost switching regulator with an industry leading low
quiescent current of 150 nA(typ). The 150 nA is the actual current consumed from the
battery while the output is in regulation. The TS3310’s extremely low power internal circuitry consumes 120 nA on average, with periodic switching cycles which service the
load occurring at intervals of up to 25 seconds, together yielding the average 150 nA.
The TS3310/12/14 steps up input voltages from 0.9 V (TS3312: 2 V) to 5 V to sixteen
selectable output voltages ranging from 1.8 V to 5 V. The TS3310/12/14 includes two
output options, one being an always-on storage output while the additional output is an
output load switch that is designed to supply burst-on loads in a low duty cycle manner.
The TS3310/12/14 operates in Discontinuous Conduction Mode with an on-time proportional to 1/VIN, thereby limiting the maximum input current by the selection of the inductor value, ensuring the input current does not drag down the input source.
The extremely low quiescent current combined with the output load switch make the
TS3310/12/14 an ideal choice for applications where the load can be periodically powered from the output, while being disconnected from the output storage capacitor when
the load is powered off to isolate the load’s leakage current.
The TS3310/12/14 is fully specified over the –40 °C to +85 °C temperature range and is
available in a low-profile, thermally-enhanced 10-pin 2x2 mm TDFN package with an exposed back-side paddle.
Applications
• Coin-Cell-Powered Portable Equipment
• Single-Cell Lithium-Ion or Alkaline Battery-Powered Equipment
• Solar or Mechanical Energy Harvesting
• Wireless Microphones
• Wireless Remote Sensors
• RFID Tags
• Personal Health-Monitoring Devices
• ZigBee Radio Enabled Devices
• Low-Energy Bluetooth Radio Enabled Devices
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KEY FEATURES
• Market-Leading, Active-Mode, No-load
Supply Current: IQ = 150 nA
• Efficiency up to 92%
• Input Voltage Range: 0.9 to 5.0 V
• Delivers up to 35 mA at VSTORE from 1.2
VIN
• Single Inductor, Discontinuous Conduction
Mode Operation
• User-Enabled Secondary Output Load
Switch to Isolate Leaky Burst Loads
• No External Schottky Diode Required
• UVLO Threshold
• 0.9 V (TS3310/14)
• 2.0 V (TS3312)
• Pin-Selectable Output Voltages:
• 1.8 V, 2.1 V, 2.5 V, 2.85 V, 3 V, 3.3 V,
4.1 V, 5 V (TS3310)
• 2.1 V, 2.5 V, 2.85 V, 3 V, 3.3 V, 4.1 V, 5
V (TS3312)
• 4 V, 4.2 V, 4.35 V, 4.5 V, 4.6 V, 4.7 V,
4.8 V, 4.9 V (TS3314)
• 10-pin, 2 mm × 2 mm TDFN Package
Rev. 1.0
TS3310/12/14 Data Sheet
Ordering Information
1. Ordering Information
Ordering Part Number
Description
Output Voltage Options (V)
TS3310ITD1022
Boost regulator with 0.9 V UVLO
1.8, 2.1, 2.5, 2.85, 3, 3.3, 4.1, 5
TS3312ITD1022
Boost Regulator with 2 V UVLO
2.1, 2.5, 2.85, 3, 3.3, 4.1, 5
TS3314ITD1022
Boost Regulator with 0.9 V UVLO
4, 4.2, 4.35, 4.5, 4.6, 4.7, 4.8, 4.9
Note:
1. Adding the suffix “T” to the part number (e.g., TS3310ITD1022T) denotes tape and reel.
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Rev. 1.0 | 1
TS3310/12/14 Data Sheet
System Overview
2. System Overview
2.1 Typical Application Circuit
Table 2.1. Typical Application Circuit A and Circuit B Values
L
CIN = CSTORE
Circuit A
Circuit B
10 µH
100 µH
PN: CBC3225T100KR
PN: CBC3225T101KR
22 µF
2.2 µF
2.2 Functional Block Diagram
Figure 2.1. TS331x Functional Block Diagram
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TS3310/12/14 Data Sheet
System Overview
2.2.1 Theory of Operation
The TS3310/12/14 is a boost switching regulator with an industry leading low quiescent current of 150 nA.The 150 nA is the actual
current consumed from the battery while the output is in regulation. The TS3310/12/14’s extremely low power internal circuitry consumes 120 nA on average, with periodic switching cycles which service the load occurring at intervals of up to 25 seconds, as displayed
in the scope captures titled “Input Quiescent Current : Circuit A with No-Load” in 3.1 Typical Performance Characteristics. The alwayson output voltage at STORE is regulated by a comparator within the Regulation Control block. When a load discharges CSTORE and
causes the output voltage to drop below the desired regulated voltage, switching periods are initiated. When the output voltage is at or
above the desired regulated voltage, the comparator causes switching periods to stop.
Each switching cycle includes an ON period and an OFF period. During the ON period, the NMOS switch turns on to ramp current in
the inductor, while during the OFF period, the NMOS switch turns off and the PMOS switch turns on to discharge inductor current into
the CSTORE capacitor. When the ON and OFF cycles have completed, the PMOS switch turns off. The TS3310/12/14 operates in Discontinuous Conduction Mode (DCM); during any given switching cycle, the inductor current starts at and returns to zero. The switching
cycle timing is governed by the Control block, which determines the ON and OFF periods according to the input and output voltages,
regardless of the inductor current. The Control block sets the ON period according to the following equation:
tON =
2.2 µs
V IN
Equation 1. ON Period Calculation
Then, the choice of inductor value determines the peak switching currents:
I pk =
V IN × tON
2.2 µs
=
L
L
Equation 2. Peak Current Calculation
The average input current, IIN(AVG), will vary according to the load, since as the load is increased, the time between switching cycles is
decreased. However, IIN(AVG) will never exceed IIN(AVG,MAX), the maximum averaged input current, which represents the case where
switching periods are continuously initiated.
I IN (AVG,MAX ) =
I pk
2
=
1.1 µs
L
Equation 3. Maximum Average Input Current Calculation
The above equation shows that an input current limit can be set by choice of inductor value, set appropriately for the capacity and output impedance of the input source.
Maximum available output current is also a function of inductor value for the case where switching cycles are continuously initiated, the
expected maximum STORE output current is:
I STORE (MAX ) =
V IN
V OUT
× I IN (AVG,MAX ) × Efficiency
Equation 4. Expected Maximum STORE Current Calculation
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TS3310/12/14 Data Sheet
System Overview
2.2.2 Output Voltage Options
The Regulation Controls within the Control block monitor and control the regulation of the STORE output voltage. By strapping a combination of logic input pins (S0–S2) high or low, the STORE output voltage can be one of the selectable output voltages.
Table 2.2. STORE Output Value Options
S2
S2
S0
TS3310 STORE
TS3312 STORE
TS3314 STORE
0
0
0
1.8 V
—
4V
0
0
1
2.5 V
2.5 V
4.2 V
0
1
0
3.3 V
3.3 V
4.35 V
0
1
1
5V
5V
4.5 V
1
0
0
2.1 V
2.1 V
4.6 V
1
0
1
2.85 V
2.85 V
4.7 V
1
1
0
3V
3V
4.8 V
1
1
1
4.1 V
4.1 V
4.9 V
The TS3310/12/14 provides an additional Instant-On switched OUT output that completely isolates loads from the storage capacitor at
the STORE output. The OUT load switch is controlled by the logic input pin OUT_ON.
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TS3310/12/14 Data Sheet
System Overview
2.2.3 Output Load at Startup, VGOOD Output, and UVLO Feature
The TS3310/12/14 provides an Open-Drain VGOOD output that assumes a high impedance once the STORE output is greater than
90% of the target voltage.
At startup, the TS3310/12/14 can provide 5% of the maximum STORE output load current. Once the Open-Drain VGOOD output has
assumed a high impedance, the TS3310/12/14 can be loaded with the expected maximum STORE current. The startup time varies
depending upon the input voltage, output voltage selection, inductor, and input/output capacitor configuration.
The TS3310 and TS3314 come with an Under Voltage Lockout (UVLO) feature at 0.9 V, while the TS3312 comes with a UVLO feature
at 2 V. TS3310 and TS3314 UVLO features have a 20 mV hysteresis. The TS3312 UVLO feature has a 100 mV hysteresis. The UVLO
feature monitors the input voltage and inhibits the Switching Cycle Controls from initiating switching cycles if the VIN is too low. This
ensures no switching currents are drawn from the input to collapse the voltage at the terminals of the battery when the internal resistance of the battery is high. The following figure displays the UVLO feature for the TS3310.
Figure 2.2. TS3310, UVLO = 0.9 V
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Rev. 1.0 | 5
TS3310/12/14 Data Sheet
System Overview
2.2.4 Inductor Selection
When selecting an inductor value, the value should be chosen based on output current requirements. If the input source is a small battery, make sure the choice of the inductor value considers the maximum input current that the source battery can support (based on
series resistance). For example, some small button cell batteries can exhibit 5Ω series resistance, therefore a 20 mA maximum input
current may be appropriate (100 mV drop). Consider using a large STORE capacitor to support peak loads for small batteries (see
2.2.6 Bursted Load with Big STORE Buffer Capacitor).
Figure 2.3. Expected Maximum STORE Output Current with 85% Efficiency vs. Inductor Value
Figure 2.4. IIN(AVG,MAX) vs. Inductor Value
A low ESR, shielded inductor is recommended. Depending upon the application, the inductor value will vary. For applications with load
currents less than a few milliamperes, a 100 μH inductor is recommended. As shown by the efficiency curves in 3.1 Typical Performance Characteristics, the efficiency is greater with a larger inductor value for smaller load currents. Please refer to the two "Maximum
STORE Output Current vs. Input Voltage" graphs found in 3.1 Typical Performance Characteristics. Circuit A, which uses a 10 μH inductor, is able to source larger load currents than that of Circuit B with a 100 μH inductor due to the larger peak currents.
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Rev. 1.0 | 6
TS3310/12/14 Data Sheet
System Overview
Figure 2.5. Inductor Peak Current vs. Inductor Value
The chosen inductor’s saturation current for a specific inductor value should be at least 50% greater than the peak inductor current
value displayed in the above figure. The following table provides a list of inductor manufacturers.
Table 2.3. Inductor Manufacturers
Inductors
Coilcraft
www.coilcraft.com
Taiyo Yuden
www.t-yuden.com
Murata
www.murata.com
Sumida
www.sumida.com
The following tables show some example inductors for values of 10 μH and 100 μH that may be used for Circuit A or B. The tables
include the inductors’ Rdc (inductor series dc resistance or ESR) saturation current and dimensions. As mentioned previously, the inductor’s saturation current should always be greater than 150% of the peak inductor current; therefore, the appropriate size and efficiency (dependent upon ESR) may be chosen based on application requirements.
Table 2.4. Taiyo-Yuden Example Inductors
Inductor Value P/N
Inductor Type
Rdc (Ω)
Saturation Current
(mA)
(LxWxH) (mm)
10 μH
CBC
0.82
380
2 x 1.6 x 1.6
CBC20166T100K
2016
10 μH
CBC
0.36
480
2.5 x 1.8 x 1.8
CBC2518T100K
2518
10 μH
CBC
0.133
900
3.2 x 2.5 x 2.5
CBC3225T100KR
3225
100 μH
CB
4.5
70
2 x 1.6 x 1.6
CB2016T101K
2016
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TS3310/12/14 Data Sheet
System Overview
Inductor Value P/N
Inductor Type
Rdc (Ω)
Saturation Current
(mA)
(LxWxH) (mm)
100 μH
CB
2.1
60
2.5 x 1.8 x 1.8
CB2518T101K
2518
100 μH
CBC
3.7
160
2.5 x 1.8 x 1.8
CBC2518T101K
2518
100 μH
CBC
1.4
270
3.2 x 2.5 x 2.5
CBC3225T101KR
3225
Table 2.5. Murata Example Inductors
Inductor Value P/N
Inductor Type
Rdc (Ω)
Saturation Current
(mA)
(LxWxH) (mm)
10 μH
LQH
0.3
450
3.2 x 2.5 x 2.0
LQH32CN100K33
32C_33
10 μH
LQH
0.3
450
3.2 x 2.5 x 1.55
LQH32CN100K53
32C_53
10 μH
LQH
0.24
650
4.5 x 3.6 x 2.6
LQH43CN100K03
43C
100 μH
LQH
3.5
100
3.2 x 2.5 x 2.0
LQH32CN101K23
32C_23
100 μH
LQH
3.5
100
3.2 x 2.5 x 1.55
LQH32CN101K53
32C_53
100 μH
LQH
2.2
190
4.5 x 3.6 x 2.8
LQH43CN101K03
43C
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TS3310/12/14 Data Sheet
System Overview
2.2.5 Input and STORE Capacitor Selection
Ceramic capacitors are recommended for CIN and CSTORE, due to ceramics’ extremely low leakage currents (generally limited by very
high insulation resistance). Larger value ceramics (10 μF or greater) may use high constant dielectric materials, such as X5R and X7R.
These materials exhibit a strong voltage coefficient and substantially lower capacitance than rated when operated near the maximum
specified voltage. For these types of capacitors, use a 10 V or greater voltage rating.
The STORE voltage output ripple can be reduced by increasing the value of CSTORE. The figure below displays the STORE output
voltage ripple for two different storage capacitor values. The output voltage ripple reaches a floor value when the internal voltage comparator hysteresis becomes the dominant source of ripple. Below this level, larger capacitance does not help reduce the ripple.
Figure 2.6. Output Voltage Ripple Comparison
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TS3310/12/14 Data Sheet
System Overview
2.2.6 Bursted Load with Big STORE Buffer Capacitor
The TS3310 provides a switched OUT output that is capable of sourcing short bursts of large output current by utilizing a large storage
capacitor at the STORE output. The figure below displays an application circuit that utilizes this functionality.
The circuit is powered from a LR44 1.5 V Coin Cell Battery. In this example, the load needs to be powered on once every 20 seconds
for 200 μs periods. The load requires a 3.3 V source and demands 100 mA current when it is powered on. Also in this example, the
load continues to consume 10 μA of leakage current when off. By attaching the load to OUT when the load isn’t used, the TS3310
isolates the 10 μA current so that overall quiescent current can be maintained. A 220 μF storage capacitor is used for CSTORE so that it
can store the necessary charge to supply the 100 mA load current. The microcontroller brings the Instant-On Load Switch, OUT_ON,
high when the load needs to be powered on. The TS3310 on average consumes 160 nA between load bursts.
Figure 2.7. Bursted Load Application Circuit
To prevent the circuit from overloading the LR44 Coin Cell Battery, a 100 μH inductor is used to ensure the TS3310 only draws 10 mA
of current on average while recharging CSTORE after the load is powered off. After the load has been powered off, the TS3310 recharges the 220 μF CSTORE capacitor within 6 ms and is ready for the next bursted cycle. The following figure displays the load being powered on for a 200 μs period and the recharge of the 220 μF CSTORE within 6 ms.
Figure 2.8. 220 µF CSTORE Recovery Scope Capture
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TS3310/12/14 Data Sheet
Electrical Characteristics
3. Electrical Characteristics
Table 3.1. Recommended Operating Conditions1
Parameter
Input Voltage
Range
TS3310
Symbol
Condition
VIN
Typ
Max
Units
0.9
5
V
2.0
5
V
0.9
V
TS3314
TS3312
Undervoltage
Lockout
Min
TS3310
UVLO
0.855
TS3314
Hysteresis
20
TS3312
UVLO
1.9
Hysteresis
100
STORE Voltage
VSTORE
L = 10 µH; ISTORE = 1% of
ISTORE(MAX)
0.97 x VPROG
VPROG
mV
2.0
V
mV
1.03 x VPROG
V
VIN(MIN) < VIN < VIN(MAX) at any
VPROG > VIN; TA = +25 °C 2
VPROG Tempco
Startup Output Impedance
No-Load Input Current
0.027
RLOAD
IFLOOR
IQ
Active-Mode
Boost Switch On-Time
TON
%/°C
TS3310 VIN = 1.2 V, VSTORE = 5 V
4.1 k
Ω
TS3312 VIN = 2 V, VSTORE = 5 V
2.5 k
Ω
TS3314 VIN = 1.2 V, VSTORE = 4.9 V
4.1 k
Ω
@ IN3
120
@ STORE3
30
nA
TS3310 @ IN; VIN = 1.2 V4
150
nA
TS3312 @ IN; VIN = 2.0 V4
165
nA
TS3314 @ IN; VIN = 1.2 V4
150
nA
For TS3310, VIN = 1.8 V
0.75 x 2.2/VIN
230
nA
2.2/VIN
1.25 x 2.2/VIN
µs
1.3
Ω
For TS3312, VIN = 2.0 V
For TS3314, VIN = 1.8 V
On Resistance
RON NMOS
TS3310
0.8
RON PMOS
VSTORE = 1.8 V
1.1
RON Load
Switch
VSTORE GOOD
1.1
Ω
1.65
Ω
RON NMOS
TS3310
500
mΩ
RON PMOS
TS3312
650
mΩ
RON Load
Switch
VSTORE = 3 V
650
mΩ
VVGOOD
% of target STORE voltage
Hysteresis
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80
90
5
95
%
%
Rev. 1.0 | 11
TS3310/12/14 Data Sheet
Electrical Characteristics
Parameter
Symbol
Condition
VOUT_ON Input Voltage
VOUT_ON L
Low CMOS Logic Level
VOUT_ON H
High CMOS Logic Level
S0L, S1L,
S2L
Low CMOS Logic Level
S0H, S1H,
S2H
High CMOS Logic Level
S0, S1, S2 Input Voltage
Min
Typ
Max
Units
0.2
V
0.6
V
0.2
V
0.6
V
S0, S1, S2, OUT_ON Input Leakage Current
5
nA
Note:
1. For TS3310 and TS3314, VIN = 1.2 V. For TS3312, VIN = 2.0 V. VOUT_ON = VIN. VPROG is the programmed voltage according to
the S2, S1, and S0 pins. For TS3310 and TS3312, the STORE voltage is programmed for 3 V. For TS3314, the STORE voltage
is programmed for 4.5 V unless otherwise specified. TA= –40 °C to +85 °C. Typical values are at TA = +25 °C unless otherwise
specified.
2. ISTORE(MAX) is provided as the Maximum Average STORE Current by Figure 2.3 Expected Maximum STORE Output Current with
85% Efficiency vs. Inductor Value on page 6 in 2.2.4 Inductor Selection.
3. VSTORE output is driven above regulation point. No switching is occurring. L = 10 µH. CSTORE = CIN = 22 µF.
4. For TS3310 and TS3312, VSTORE = 3 V; L = 100 µH; CSTORE = CIN = 2.2 µF; for TS3314, VSTORE = 4.35 V; L = 100 µH; CSTORE
= CIN = 2.2 µF
Table 3.2. Thermal Conditions
Parameter
Symbol
Operating Temperature Range
TOP
Conditions
Min
Typ
–40
Max
Units
+85
°C
Table 3.3. Absolute Maximum Limits
Parameter
Symbol
IN Voltage
VIN
STORE Voltage
Conditions
Min
Max
Units
–0.3
+6.0
V
VSTORE
–0.3
+6.0
V
OUT Voltage
VOUT
–0.3
+6.0
V
LSW Voltage
VLSW
–0.3
+6.0
V
OUT_ON Voltage
VOUT_ON
–0.3
+6.0
V
S0 Voltage
VS0
–0.3
+6.0
V
S1 Voltage
VS1
–0.3
+6.0
V
S2 Voltage
VS2
–0.3
+6.0
V
150
°C
150
°C
Lead Temperature (Soldering, 10 s)
300
°C
Soldering Temperature (Reflow)
260
°C
Human Body Model
2000
V
Machine Model
200
V
Junction Temperature
Storage Temperature Range
–65
Typ
ESD Tolerance
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TS3310/12/14 Data Sheet
Electrical Characteristics
3.1 Typical Performance Characteristics
In the six efficiency charts on this page, the upper (red) curve applies to “Circuit B”, and the lower (black) curve applies to “Circuit A”.
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TS3310/12/14 Data Sheet
Electrical Characteristics
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TS3310/12/14 Data Sheet
Electrical Characteristics
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TS3310/12/14 Data Sheet
Electrical Characteristics
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TS3310/12/14 Data Sheet
Electrical Characteristics
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TS3310/12/14 Data Sheet
Pin Descriptions
4. Pin Descriptions
Table 4.1. Pin Descriptions
Pin
Name
1
OUT_ON
2
IN
Boost Input. Connect to input source.
3
S0
Logic Input. Sets the regulated voltage at STORE.
4
S1
Logic Input. Sets the regulated voltage at STORE.
5
S2
Logic Input. Sets the regulated voltage at STORE.
6
VGOOD
7
GND
Ground. Connect this pin to the analog ground plane.
8
LSW
Inductor Connection.
9
STORE
10
OUT
EPAD
EPAD
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Function
Logic Input. Turns on OUT switch.
Open Drain Output. High impedance when STORE>90% of regulation voltage.
Regulated output voltage set by S0, S1, S2 logic. Connect Storage capacitor.
Switched Output.
Exposed Paddle. Connect this pin to the analog ground plane.
Rev. 1.0 | 18
TS3310/12/14 Data Sheet
Packaging
5. Packaging
5.1 TS3310/12/14 Package Dimensions
Figure 5.1. TS3310/12/14 2x2 mm 10-QFN Package Diagram
Table 5.1. Package Dimensions
Dimension
Min
Nom
Max
A
0.700
0.750
0.800
A1
0.000
---
0.050
b
0.150
0.200
0.250
A3
0.203 REF
D
2.000 BSC
e
0.400 BSC
E
2.000 BSC
D2
0.850
0.900
0.950
E2
1.350
1.400
1.450
L
0.250
0.300
0.350
aaa
0.500
bbb
0.100
ccc
0.050
ddd
0.050
eee
0.080
fff
0.050
Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
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TS3310/12/14 Data Sheet
Packaging
5.2 TS3310 Top Marking
TS3310 Top Marking
Table 5.2. TS3310 Top Marking Explanation
Mark Method:
Laser
Pin 1 Mark:
0.35 mm Diameter (Lower-Left
Corner)
Font Size:
0.40 mm (16 mils)
Line 1 Mark Format:
Device Identifier
3310
Line 2 Mark Format:
TTTT = Mfg Code
Manufacturing Code from the Assembly Purchase Order Form
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TS3310/12/14 Data Sheet
Revision History
6. Revision History
Revision 1.0
February 24, 2016
• Initial external release.
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Rev. 1.0 | 21
Table of Contents
1. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2. System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.1 Typical Application Circuit .
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2.2 Functional Block Diagram . . . . . . . . . . . . .
2.2.1 Theory of Operation . . . . . . . . . . . . . .
2.2.2 Output Voltage Options . . . . . . . . . . . . .
2.2.3 Output Load at Startup, VGOOD Output, and UVLO Feature
2.2.4 Inductor Selection . . . . . . . . . . . . . . .
2.2.5 Input and STORE Capacitor Selection . . . . . . . .
2.2.6 Bursted Load with Big STORE Buffer Capacitor . . . . .
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3. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .
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3.1 Typical Performance Characteristics .
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4. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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5. Packaging
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5.1 TS3310/12/14 Package Dimensions .
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5.2 TS3310 Top Marking
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6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
Table of Contents
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Disclaimer
Silicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using
or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and
"Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to
make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the
included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses
granted hereunder to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any Life Support System without the specific written consent
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