SC3333

SC3333 ENERGY METERING IC WITH PULSE OUTPUT DESCRIPTION The SC3333 is a high accuracy electrical energy measurement IC that can provides superior stability and accuracy over extremes in environmental conditions and over time. The SC3333 does not exhibit any creep when there is no load. The SC3333 supplies average real power information on the low frequency outputs F1 and F2. This logic outputs may be used to directly drive an electromechanically counter or interface to an MCU. The CF logic output gives instantaneous real power information. This output is intended to be used for calibration purposes, or interfacing to an MCU. The SC3333 includes a power supply monitoring circuit on the VDD supply pin. If the supply falls below 4V, the SC3333 will be reset and time. The SC3333 provides synchronous frequency output for autoreading meter system. The CF logic output is synchronous with the F1 and F2 logic output to ensure the show value of the meter is consonant with the real value. F1, F2 will be set to logic high, CF will be set to logic low at the same ORDERING INFORMATION Device SC3333 Package SOP-16-225-1.27 SOP-16-225-1.27 FEATURES * Single 5V supply, low power. * On-chip power supply monitoring. * On-chip reference with external overdrive capability. * Supplies average real power on the frequency outputs F1 and F2, which can drive for electromechanical counters directly. * The high frequency output CF is intended for calibration and supplies instantaneous real power. * Less than 0.1% error over a dynamic range of 500 to 1. * On-chip creep protection (No load threshold). * The logic output REVP can be used to indicate a potential miswiring or negative power. * A PGA in the current channel make flexible to select the shunt and burden resistance. HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn REV:1.1 2008.04.29 Page 1 of 8 SC3333 BLOCK DIAGRAM ABSOLUTE MAXIMUM RATING (Tamb=25°C, unless otherwise specified) Characteristics VDD to AGND/DGND Analog Input Voltage to AGND V1P, V1N, V2P and V2N Reference Input voltage to AGND Digital Input Voltage to DGND Digital Output Voltage to DGND Power Dissipation Operating Temperature Range Storage Temperature Junction Temperature Symbol VDD AVIN VREF DVIN DVOUT PD TOPR TSTG TJ Ratings -0.3 ~ +7 -6 ~ +6 -0.3 ~ VDD+0.3 -0.3 ~ VDD+0.3 -0.3 ~ VDD+0.3 450 -40~ +85 -65~ +150 +150 Unit V V V V V mW °C °C °C ELECTRICAL CHARACTERISTICS (Tamb=25°C, unless otherwise specified) Characteristics Power Supply Power Supply Analog Input Current Digital Input Current ACCURACY Measurement Gain=1 Error on Channel 1 1 Symbol 5V±5% Test conditions Min. Typ. Max. Unit VDD AIDD DIDD 4.75 --- ---- 5.25 3 2.5 V mA (2mA) TYP. (1.5mA) TYP. Over a dynamic range 500 to 1 EM Over a dynamic range 500 to 1 --- 0.1 0.1 --- % % Gain=16 (To be continued) HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn REV:1.1 2008.04.29 Page 2 of 8 SC3333 (Continued) Characteristics Phase Error Between Channels 1 Symbol EP -- Test conditions Min. --- Typ. --0.01 0.01 Max. ±0.1 ±0.1 --- Unit ° ° % % V1 Phase Lead 37° V1 Phase Lag 60° CFA CFD V1=100mV, V2=100mV, SET=0 V1=100mV, V2=100mV, VDD=5V±250mV Output Frequency Rejection (AC) Output Frequency Rejection (DC) ANALOG INPUTS Maximum Signal Levels Input Impedance (DC) Bandwidth (-3dB) ADC Offset Error Gain Error 1 1 1,2 --- LEVS IMIN BW EADC EG EGM V1P, VIN V2N and V2P to AGND CLKIN=3.58MHz CLKIN/256, CLKIN=3.58MHz -400 --- --14 -±4 ±0.2 ±1 --15 --- V kΩ kHz mV % % V1=470mV, V2=660mV External 2.5V reference 2.5V±8% --- --- Gain Error Match REFERENCE INPUT REFIN/OUT Input Voltage Range Input Impedance Input Capacitance ON-CHIP REFERENCE Reference Error Temperature Coefficient CLKIN Input Clock Frequency LOGIC INPUTS3 Input High Voltage Input Low Voltage Input Current Input Capacitance LOGIC OUTPUTS3 Output High F1 and F2 Voltage Output Low Voltage Output High CF and REVP Voltage Output Low Voltage VOH VOL VOH VOL ISOURCE=10mA,VDD=5V ISINK=10mA, VDD=5V ISOURCE=5mA,VDD=5V ISINK=5mA, VDD=5V 4.5 -4 ------0.5 -0.5 V V V V VINH VINL IIN CIN VDD=5V±5% VDD=5V±5% Typically 10nA, VIN=0V to VDD 2.4 --------0.8 ±3 10 V V μA pF CLKIN Note all specifications for CLKIN of 3.58MHz 1 -4 MHz ER TC Nominal 2.5V ---30 200 60 mV ppm/°C VINR IMIN CIN 2.3 3.7 ----2.7 -10 V kΩ pF HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn REV:1.1 2008.04.29 Page 3 of 8 SC3333 PIN CONFIGURATION VDD V1P V1N V2N V2P RESET REFIN/OUT AGND 1 2 3 16 F1 15 F2 14 CF SC3333 4 5 6 7 8 13 DGND 12 REVP 11 CLKOUT 10 CLKIN 9 SET PIN DESCRIPTION Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol VDD V1P V1N V2N V2P RESET Description Power Supply. Positive and Negative Inputs for Channel 1 (Current Channel). Channel 1 has a PGA and the gain selections are outlined in Table I. The maximum signal level at these pins is ±1V with respect to AGND. Negative and Positive Inputs for Channel 2 (Voltage Channel). The maximum differential input voltage is ±660mV for specified operation. The maximum signal level at these pins is ±1V with respect to AGND. Reset Pin for the SC3333. A logic low is valid. Reference voltage input/output pin. Analog ground. Channel 1 gain select pin. See table 1. 3.58MHZ crystal oscillator input pin. 3.58MHZ crystal oscillator output pin. State indication pin. While negative power or a potential miswriting occurs, it will be set to logic high. Digital ground. Calibration Frequency Logic Output.. Low Frequency Logic Outputs. They can be used to directly drive a stepper motor or electromechanical impulse counter. REFIN/OUT AGND SET CLKIN CLKOUT REVP DGND CF F2 F1 HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn REV:1.1 2008.04.29 Page 4 of 8 SC3333 TIMIING CHARACTERISTICS1,2 (VDD=5V±5%, AGND=DGND=0V, On-chip Reference, CLKIN=3.58MHZ, TMIN to TMAX=-40°C~+85°C.) Parameter t1 3 Test Condition F1 and F2 Pulse-width F1 and F2 Pulse Period. Time Between F1 Falling Edge and F2 Falling Edge CF Pulse-width CF Pulse Period. Minimum Time Between F1 and F2 Pulse Test Data 275 TBD 1/2 t2 90 TBD CLKIN/4 Units ms sec sec ms sec sec t2 t3 t4 3 t5 t6 NOTE: 1. Sample tested during initial release and after any redesign or process change that may after this parameter. 2. See the following figure. 3. The pulse-widths of F1, F2 and CF are not fixed for higher output frequencies. Timing Diagram for Frequency outputs Timing Diagram for Frequency Outputs shows a timing diagram for the various frequency outputs of the SC3333. The low frequency outputs, F1 and F2 can drive electromechanical counters and two phase stepper motors directly. As the figure show, the F1 and F2 outputs provide two alternating low going pulses. The pulse width (t1) is set at 275ms and the time between the falling edges of F1 and F2 (t3) is approximately half the period of F1 (t2). If however the period of F1 and F2 falls below 550 ms (1.81Hz) the pulse width of F1 and F2 is set to half of their period. The frequency of F1 and F2 corresponds to the input voltages, and F= 2 （13.6*V1*V2*G）/ VREF ，The values of G can be set by consumers, and the selection of G please refer to the table I , V1 and V2 are the rms value of the two inputs, VREF is the voltage of reference, whose value is 2.5+0.2v when the internal bandgap reference of SC3333 is valid. The high frequency output, CF is intended for calibration and supplies instantaneous real power. CF produces a 90ms wide active high pulse (t4) at a frequency proportional to active power. As in the case of F1 and F2, if the period of CF (t5) falls below 180ms, the CF pulse-width is set to half the period. APPENDIX Table I. gain selection for channel 1 SET 0 1 Gain 1 16 Maximum Differential Signal ±470mV ±30mV REV:1.1 2008.04.29 Page 5 of 8 HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn SC3333 TYPICAL APPLICATION CIRCUIT HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn REV:1.1 2008.04.29 Page 6 of 8 SC3333 PACKAGE OUTLINE SOP-16-225-1.27 UNIT: mm HANDLING MOS DEVICES: Electrostatic charges can exist in many things. All of our MOS devices are internally protected against electrostatic discharge but they can be damaged if the following precautions are not taken: • Persons at a work bench should be earthed via a wrist strap. • Equipment cases should be earthed. • All tools used during assembly, including soldering tools and solder baths, must be earthed. • MOS devices should be packed for dispatch in antistatic/conductive containers. HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn REV:1.1 2008.04.29 Page 7 of 8 5.72±0.25 6.0±0.4 3.9±0.3