SC72131
PLL FOR DIGITAL TUNING SYSTEM(DTS)
DESCRIPTION
The SC72131 is phase-locked loop (PLL) LSI for digital turning systems (DTS). The LSI is use to configure high- performance digital tuning systems,such as radio/cassette players. They allow high-performance AM/FM tuners to be implemented easily.
SDIP-22-300-1.778
FEATURES
* Built-in prescalers. Operate at input frequency ranging from 10~160MHz during FMIN input and at 0.5~40MHz during AMIN input. * 12 possible reference frequencies (with 4.5 or 7.2 MHz crystal) 1, 3, 5, 9, 10, 3.125, 6.25, 12.5, 15, 25, 50 and 100 kHz * Built-in 20bit general-purpose counter for such as measuring intermediate frequency (IF), IF input frequency ranging from 0.4M~12MHz. * Has an unlock detector circuit an dead zone control circuit and an deadlock clear circuit * Built-in MOS transistor for forming an active low-pass filter * 4 N-channel open-drain output ports (OFF withstanding Voltage: 13V) and 2 input or output ports. * Serial data I/O — All functions controlled through 4 serial bus lines * Operating ranges — Supply voltage.....................… 5.0±0.5 V — Operating temperature........–40 to +85° C * Packages — SDIP-22-300-1.78 — SOP-20-300-1.27 * Digital Tuning Systems
SOP-20-300-1.27
ORDERING INFORMATION
Part No. SC72131 SC72131S Package SDIP-22-300-1.778 SOP-20-300-1.27
APPLICATIONS
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SC72131
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS (Tamb=25°C, VSS=0V)
Characteristics Supply Voltage Allowable Power Dissipation N-ch Open-Drain OFF Withstanding Voltage Operating Temperature Symbol VDDmax Pdmax VOFF Topr Ratings -0.3 to 7.0 350 13 -40 to +85 Unit V mW V °C
ELECTRICAL CHARACTERISTICS (Tamb=-40 to 85°C, VSS=0V)
Characteristics Symbol Rf1 Built-in Feedback Resistance Rf2 Rf3 Rf4 Built-in Pull-down Resistor Hysteresis Output High Level Voltage Rpd1 Rpd2 VHIS VOH1 IO=-1mA VDD-1.0 Test Condition Min. Typ. 1.0 500 500 250 200 200 0.1VDD Max. Unit MΩ kΩ kΩ kΩ kΩ kΩ V V
(To be continued)
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SC72131
(Continued)
Characteristics
Symbol VOL1 VOL2 VOL3
Test Condition IO=1mA IO=0.5mA IO=1mA IO=1mA IO=5mA IO=1mA IO=5mA IO=8mA IO=1mA, AIN=1.3V VI=6.5V VI=13V VI=VDD VI=VDD VI=VDD VI=6.5V VI=0 VI=0 VI=0 VI=0 VI=0 VI=0 VO=13 VO=6.5V VO=VDD VO=0V
Min.
Typ.
Max. 1.0 0.5 1.0 0.2 1.0 0.2 1.0 1.6 0.5 5.0 5.0
Unit V V V V V V V V V µA µA µA µA µA nA µA µA µA µA µA µA µA µA nA nA pF
Output Low Level Voltage
VOL4 VOL5 IIH1 IIH2 Input High Level Current IIH3 IIH4 IIH5 IIH6 Input Low Level Current IIL1 IIL2 IIL3 Input Low Level Current IIL4 IIL5 IIL6 Output Off Leakage Current High Level Three-state Off Leakage Current Low Level Three-state Off Leakage Current Input Capacitance IOFF1 IOFF2 IOFFH IOFFL CIN
2.0 4.0 8.0
11 22 44 200 5.0 5.0
2.0 4.0 8.0
11 22 44 200 5.0 5.0 0.01 0.01 6 200 200
Xtal=7.2MHz, IDD1 fIN2=130MHz, VIN2=40mVrms Current Drain PLL block stopped (PLL IDD2 INHIBIT), Xtal oscillator operating (Xtal=7.2MHz) IDD3 PLL block stopped, Xtal oscillator stopped 10 µA 0.5 mA 5 10 mA
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SC72131
PIN CONFIGURATION (SDIP22, SOP20)
PIN DESCRIPTION
Pin NO. SDIP-22 1 22 2 3 4 5 6 7 8 9 10 11 13 2 3 4 5 6 7 8 9 10 12 SOP-20 1 20 Pin Name OSCIN OSCOUT NC PERIOD DIN CLOCK DOUT
OT1 OT2 OT3
Description Connects 4.5M or 7.2M crystal oscillator to supply reference frequency and internal clock. -Serial I/O ports, These pins transfer data to and from the controller to set divisors and dividing modes, and to control the generalpurpose counter and general-purpose I/O ports.
•N channel open drain port pins. •The output states are determined by OT1 to OT4 bits in the serial data. •If the serial data TBC bit is set to 1, a time base signal (8Hz) can be output from the OT1 pin. •These pins are set to the OFF state when power is turn on.
OT4
IO1 IO2
•CMOS structure allows free use of these ports for input or output. •Ports are set for input when the power is turned on. •Input pin for measure general-purpose counter frequencies. The frequency measurement function has such uses as measuring
12
11
IFIN
intermediate frequencies (IF) •These pin feature built-in amps, Data are input by capacitor coupling.
(To be continued)
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SC72131
(Continued)
Pin NO. SDIP-22 14 15 16 17 18 19 20 21 13 14 15 16 17 18 19 SOP-20
Pin Name NC AMIN FMIN VDD DO LFIN LFOUT GND --
Description
• These pins input AM and FM band local oscillator signals by capacitor coupling. •These pins feature built-in amps. •power supply pin (Applies 5.0V±10%) •This pin is for phase comparator tristate output. •These pins for low-pass filter input pin and output pin. •The SC72131 ground.
FUNCTION DESCRIPTION
Serial Data I/O Methods The SC72131 inputs and outputs data using the 4 serial bus lines, the serial data I/O methods are selected by an 8bit address
Register assignments
Address = 82H(IN) MODE OSC CTE P10 P11 P12 P13 P14 P15 FM R0 R1 R2 R3 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9
Address = 92H(IN) IO IO
IO1
OT3
C1 C2
IO 2
OT1
OT2
OT4
*
DO DO DO UL UL DZ DZ C0 C1 C2 0 1 0 1
D G0 G1 TO O C
IF S
T0 T1 T2
Address = A2H (OUT) I1 I2 * UL IF1 IF1 IF1 IF1 IF1 IF1 IF1 IF1 IF1 IF1 9 8 7 6 5 4 3 2 1 0 IF9 IF8 IF7 IF6 IF5 IF4 IF3 IF2 IF1 IF0
Programmable divider structure Swallow counter and programmable counter circuit configuration
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SC72131
FM 1 0 0
MODE * 1 0
Input pin FMIN AMIN AMIN
Set divisor 272 to 65535 272 to 65535 4 to 4095
Actual divisor: N Twice the set value The set value The set value
Input frequency range (MHz) 10 to 160 2 to 40 0.5 to 10
Note: * Don’care. t 1.IF Counter Structure The SC72131 IF counter section consists of input amp, a gate time control circuit and a 20bit binary counter. The result, i.e., the counter’ msb, can be read serially from the Dout pin. s
G1 0 0 1 1 2. IF Counter Operation
G0 0 1 0 1
Gate time (GT) (ms) 4 8 32 64
Wait time (ms) 3~4 3~4 7~8 7~8
Note: 1. IFIN input have built-in amp. Data are input by capacitor coupling. 2. Before starting the IF count, the IF counter must be reset in advance by setting CTE in the serial data to 0. 3. The IF count is started by changing the CTE bit in the serial data from 0 to 1. The serial data is latched by the SC72131 when the CE pin is dropped from high to low. 4.The IF signal must be supplied to the IFIN pin in the period between the point the CE pin goes low and the end of the wait time at the latest. 5. The value of the IF counter at the end of the Gate-Time must be read out during the period that CTE is 1. This is because the IF counter is reset when CTE is set to 0. 6. When operating the IF counter, the control microprocessor must first check the state of the IF-IC SD (station detect) signal and only after determining that the SD signal is present turn on IF buffer output
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SC72131
and execute an IF count operation. Auto search techniques that use only the IF counter are not recommended, since it is possible for IF buffer leakage output to cause incorrect stops at points where there is no station. 3. Power Supply Pins A capacitor of at least 2000 pF must be inserted between the power supply VDD and GND pins for noise exclusion. This capacitor must be placed as close as possible to the VDD and GND pins.
PIN STATES AFTER THE POWER ON RESET
After power-on reset, the pins (DOUT OT1 OT2 OT3 OT4 ) are set to OPEN state and the pins ( IO1 , IO2 ) set to INPUT state.
Note: this circuit according to SDIP-22 package, and the circuit of SOP-20 removed two NC pins, and others are the same as the above circuit.
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SC72131
TYPICAL APPLICATION CIRCUIT
This section is susceptible to noise due to its high impedance. Therefore, the pattern lines should be kept as short as possible and this area should be covered with a ground pattern. 1 OSCIN 2 NC µ -com CE DI CL DO 3 PERIOD 4 DIN 5 CLOCK 6 DOUT 7 OT1 8 OT2 9 OT3 10 OT4 11 IO1 LFOUT 20 LFIN 19 DO 18 VDD 17 FMIN 16 AMIN 15 NC 14 IO2 1 IFIN 12 tune FM/AM-IF IF-Request FM/AM MONO/BT ST-Indicate TUNERSystem AMVCO FMVCO OSCOUT 22 GND 21
VCC
Note: this circuit according to SDIP-22 package, and the circuit of SOP-20 removed two NC pins, and others are the same as the above circuit.
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SC72131
PACKAGE OUTLINE
SDIP-22-300-1.778 UNIT: mm
SOP-20-300-1.27
UNIT: mm
0.15± 0.05
1.27 12.70±0.25
0.45
2.25MAX
11.43
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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SC72131
HANDLING MOS DEVICES:
Electrostatic charges can exist in many things. All of our MOS devices are internally protected against electrostatic discharge but they can be damaged if the following precautions are not taken: • Persons at a work bench should be earthed via a wrist strap. • Equipment cases should be earthed. • All tools used during assembly, including soldering tools and solder baths, must be earthed. • MOS devices should be packed for dispatch in antistatic/conductive containers.
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