SC84502AP

Silan Semiconductors PS/2 MOUSE CONTROLLER DESCRIPTION The SC84502 Mouse Controller is specially designed to control PS/2 mouse device. This single chip can interface three keyswitches and four photo-couples direct to 8042. SC84502 can receive command and echo status or data format which are compatible with IBM PS/2 mode mouse. Key debouncing circuit is provided to prevent false entry and improve the accuracy. In the conventional mouse, a great number of noises are generated when the grid is partially closed or opened. These noise are usually mistaken for movement signals by conventional mouse controller and the cursor of the display screen is thus moved frequently up and down or back and forth. This will consumes a great amount of energy. The SC84502 PS/2 mouse controller provides noise immunity circuits to eliminate these noise In order to reduce energy consumption. SC84502 DIP-14 DIP-16 FEATURES * Being compatible with PS/2 mouse mode * Built-in noise immunity circuit * Low power dissipation * RC oscillation * Three key-switches and four photo-couples inputs * Both key-press and key-release debounce interval 12ms * Through three key-switches input, SC84502 can exert seven different output * The motion detector of the SC84502 could sense 8m/sec maximum with 200 DPI wheels ORDERING INFORMATION SC84502AP SC84502BP DIP-14 PACKAGE DIP-16 PACKAGE APPLICATIONS * Optical mouse or pen-mouse * Mechanical mouse or pen-mouse * Optomechanical mouse or pen-mouse * Mechanical track ball * Optomechanical track ball HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 1 Silan Semiconductors PIN CONFIGURATIONS VDD OP OSC OUT CLK DATA VSS R SC84502 14 13 VDD OSCR OP Y2 NC Y1 NC X2 OSC OUT X1 CLK L DATA M VSS 1 2 3 4 5 6 7 SC84502AP 1 2 SC84502BP 3 4 5 6 7 8 16 15 14 13 12 11 10 9 OSCR Y2 Y1 X2 X1 L M R 12 11 10 9 8 BLOCK DIAGRAM( Refer to SC84502BP ) OP X1 X2 Y1 Y2 2 NOISE IMMUNTY 1 MOTION DETECTOR COUNTER VDD VSS NC NC 12 13 14 15 11 10 9 8 3 4 COMMAND DECODER DATA CONVERTER DEBOUNCE L M R TIMING CONTROLLER OSCR 16 5 OSC OUT SYSTEM CLOCK GENERATOR DATA I/O 7 DATA 6 CLK DC ELECTRICAL CHARACTERISTICS (Tamb=25~70°C) Parameter Operating Voltage Operating Current X1,X2,Y1,Y2 Low Input reference current X1,X2,Y1,Y2 High Input reference current Symbol VDD Iop Ipl Iph -No Load -- Condition Min 4.5 -70 -- Typ 5 ---- Max 5.5 1.2 -106 Unit V mA µA µA -- (to be continued) HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 2 Silan Semiconductors (continued) SC84502 Symbol Vpl Parameter X1,X2,Y1,Y2 input current Condition Schmitt trigger input, Ipl=76µA Comparator input, Ipl=80µA Comparator input, Ipl=500µA Min 0.8 0.8 1.5 3.2 1.2 -3.5 16.6 0.56 -0 Typ ------------ Max 1.2 1.2 2.1 3.8 1.9 1.5 -50 1.86 0.4 1.0 Unit V V V V V V V µA mA V µA CLK, DATA positive-going threshold voltage CLK, DATA negative-going threshold voltage Low Input Voltage, Other Pins High Input Voltage, Other Pins L,M,R Input Current PS/2 mouse mode DATA,CLK input Current PS/2 mouse mode DATA,CLK low output Voltage L,M,R,X1,X2,Y1,Y2 Input Leakage Current Vt+ VtVail Vaih Imi Idc Vprl Iil ----Pull Up Resistor, Vin=5V Vin = 0V Iprl = -2 mA Vin = 0V Note: All voltages in above table are compared with VSS. All parameters in above table are tested under VDD=5V. CLK & DATA output gates are open drains that connect to pull up resistors. AC ELECTRICAL CHARACTERISTICS ( Tamb = 0 ~ 70°C) Parameter Oscillating Frequency Key Debounce Rising Edge Crossed Width Fosc=35 kHz Falling Edge Crossed Width Fosc=35 kHz Mouse CLK Active Time Mouse CLK Inactive Time Time that Mouse Sample DATA from CLK rising Edge System CLK Active Time System CLK Inactive Time Time from DATA Transition to Falling Edge of CLK Time from rising Edge of CLK to DATA Transition Time to mouse Inhibit after the 11th CLK to ensure mouse does not start another Transmission Symbol Fosc Tkd Tr Tf Tmca Tmci Tmdc Tsca Tsci Tsdc Tscd Tpi Min 34.3-10% -14.3 14.3 -------0 Typ 34.3 12 --42.9 42.9 14.3 42.9 42.9 14.3 28.6 -- Max 34.3+10% ----------50 Unit kHz ms µs µs µs µs µs µs µs µs µs µs Note: The AC timings are measured under using 35kHz system clock signal. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 3 Silan Semiconductors X1, X2, Y1, Y2 INPUT IMPEDANCE UNIT:K SC84502 16.0 15.0 14.0 13.0 12.0 11.0 10.0 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 MAX. TYP. MIN. 1.0 2.0 3.0 4.0 5.0 INPUT VOLTAGE PIN DESCRIPTION (refer to SC84502BP) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name VDD OP NC NC OSCOUT CLK DATA VSS R M L X1 X2 I/O -I --O I/O I/O -No Connection No Connection Clock output. 8042 auxiliary port CLK line. 8042 auxiliary port DATA line. Negative Power Supply Positive Power Supply. X, Y inputs: Description Floating: Comparator input. GND: Schmitt trigger input. Short to OSC OUT: Testing Mode. Three key-switches esert seven different combinations totally. Both key-pressed and key-released signals will be sent accompanied with horizontal and vertical I state. The status of the key-switches will be preserved, whenever the value of horizontal or vertical counters will present at DATA. And the debounce interval for both key-press and key release is 12ms. Four photo-couple signal denote UP, DOWN, LEFT and RIGHT state. I During the scanning period, as long as the photo-couples change their states, the value of vertical or horizontal, counter will increase or decrease accordingly. 50kΩ ± 5% pull low for 35kHz oscillation Y1 Y2 OSCR I HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 4 Silan Semiconductors FUNCTION DESCRIPTIONS 1. OPERATING MODE There are four operating modes in PS/2 mouse: i) Reset Mode: SC84502 In this mode a self-test is initiated during power-on or by a Reset command. After reset signal, PS/2 mouse will send: 1) Completion code AA&ID code 00. 2) Set default: sampling rate: 100 reports/s non-autospeed stream mode 2 dot/count disable ii) Stream Mode: The maximum rate of transfer is the programmed sample rate. Data report is transmitted if 1) switch is pressed 2) movement has been detect iii) Remote Mode: Data is transmitted only in response to a Read Data command. iv) Wrap Mode: Any byte of data sent by the system, except hex EC(Reset wrap mode) or hex FF(Reset), is returned by SC84502. 2. PS/2 MOUSE DATA REPORT i) In stream mode: A data report is sent at the end of a sample interval. ii)In remote mode: A data report is sent in response to Read Data command. iii) Data report format: HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 5 Silan Semiconductors SC84502 Description Left button status; 1 = pressed Right button status; 1 = pressed Middle button status; 1 = pressed Reserve X data sign; 1 = negative Y data sign; 1 = negative X data overflow; 1 = overflow Y data overflow; 1 = overflow X data(D0 ~ D7) Y data(D0 ~ D7) Byte 1 Bit 0 1 2 3 4 5 6 7 2 3 0-7 0-7 3.PS/2 MOUSE DATA TRANSMISSION i) SC84502 generates the clocking signal when sending data to and receiving data from the system. ii) The system requests SC84502 receive system data output by forcing the DATA line to an inactive level and allowing CLK line to go to an active level. iii) Data transmission frame: Bit 1 2~9 10 11 Function Start bit(always 0) Data bits(D0 ~D7) Parity bit(odd parity) Stop bit (always 1) iv) Data Output (data from SC84502 to system) If CLK is low (inhibit status), data is no transmission. If CLK is high and DATA is low(request-to-send), data is updated. Data is received from the system and no transmission are started by SC84502 until CLK and DATA both high. If CLK and DATA are both high, the transmission is ready. DATA is valid prior to the falling edge of CLK and beyond the rising edge of CLK. During transmission, SC84502 check for line contention by checking for an inactive level on CLK at intervals not to exceed 100µ sec. Contention occurs when the system lowers CLK to inhibit SC84502 output after SC84502 has started a transmission. If this occurs before the rising edge of the contention does not occur by the tenth clock, the transmission is complete. Following a transmission, the system inhibits SC84502 by holding CLK low until it can service the input or until the system receives a request to send a response from SC84502. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 6 Silan Semiconductors SC84502 v) Data Input (from system to SC84502) System first check if SC84502 is transmitting data. If SC84502 is transmitting, the system can override the output forcing CLK to an inactive level prior to the tenth clock. If SC84502 transmission is beyond the tenth clock, the system receives the data. If SC84502 is not transmitting or if the system choose to override the output, the system force CLK to an inactive level for a period of not less than 100m sec while preparing for output. When the system is ready to output start bit (0), it allows CLK go to active level. If request-to-send is detected, SC84502 clocks 11 bits. Following the tenth clock SC84502 checks for an active level on the DATA line, and if found, force DATA low , and clock once more. If occurs framing error, SC84502 continue to clock until DATA is high, then clocks the line control bit and request a Resend. When the system sends out a command or data transmission that requires a response, the system waits for SC84502 to response before sending its next output. 4. PS/2 MOUSE ERROR HANDLING i) A Resend command ( FE ) following receipt of an invalid input or any input with incorrect parity. ii) If two invalid input are received in succession, an error code of hex FC send to the system. iii) The counter accumulators are cleared after receiving any command except “Resend”. iv) SC84501 receives a Resend command ( FE ), it transmit its last packet of data. v In the stream mode “Resend” is received by SC84502 following a 3-byte data packet transmission to the system. SC84502 resend the 3-byte data packet prior to clearing the counter. vi) A response is sent within 25 ms if a). The system requires a response b). An error is detected in the transmission vii). When a command requiring a response is issued by the system ,another command should not be issue until either the response is received or 25ms has passed. 5. PS/2 MOUSE COMMANDS DESCRIPTION There are 16 valid commands that transmits between the system and SC84502. The “FA” code is always the first response to any valid input received from the system other than a Set Wrap Mode or Resend command. The following table list the commands: HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 7 Silan Semiconductors SC84502 Command Reset Resend Set Default Disable Enable Set Sampling Rate Read Device Type Set Remote Mode Set Wrap Mode Reset Wrap Mode Read Data Set Stream Mode Status Request Set Resolution Set Autospeed Reset Autospeed Hex Code FF FE F6 F5 F4 F3, XX F2 F0 EE EC EB EA E9 E8, XX E7 E6 SC84502 echo code FA, AA, 00 XX, (XX, XX) FA FA FA FA, FA FA, 00 FA FA FA FA, XX, XX, XX FA FA, XX, XX, XX EA, FA FA FA The following describes valid commands: a). Reset ( FF ) SC84502 operation: i). Completion the reset. ii). Transmitted FA,AA,00 to the system. iii). Set default: sampling rate: 100 reports/s non-autospeed stream mode 2 dots/count disable b). Resend ( FE ) i). Any time SC84502 receives an invalid command, it returns a Resend command to the system. ii). When SC84502 receives a Resend command, it retransmits its last packet of data. If the last packet was a Resend command, it transmits the packet just prior to the Resend command. iii). In stream mode, if a Resend command is received by SC84502 immediately following a 3-byte data packet transmission to the system. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 8 Silan Semiconductors c). Set Default (F6) The command reinitializes all conditions to the power-on defaults. d). Disable (F5) SC84502 This command is used in the stream mode to stop transmissions from SC84502. e). Enable (F4) Begins transmissions, if in stream mode. f). Set Sampling Rate (F3, XX) In the stream mode, this command sets the sampling rate to the value indicated by byte hex XX, shown in following: Second byte XX 0A 14 28 3C 50 64 C8 Sample Rate 10/sec 20/sec 40/sec 60/sec 80/sec 100/sec 200/sec g). Read Device Type (F2) SC84502 always echoes “FA, 00 “ following this command. h). Set Remote Mode (F0) Data values are reported only in response to a Read Data command. i). Set Wrap Mode (EE) Wrap mode remains until Reset (FF) or Reset Wrap Mode (EC) is received. j). Reset Wrap Mode (EC) SC84502 returns to the previous mode of operation after receiving this command. k). Read Data (EB) This command is executed in either remote or stream mode. The data is transmitted even if there has been no movement since the last report or the button status is unchanged. Following a Read Data command, the registers are cleared after a data transmission. l). Set Stream Mode (EA) This command sets SC84502 in stream mode. m). Status Request (E9) When this command is issued by the system, SC84502 respond with a 3-byte status report as follows: HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 9 Silan Semiconductors Byte 1 SC84502 Bit 0 1 2 3 4 5 6 7 Description 1=Right button pressed 1=Middle button pressed 1= Left button pressed Reserved 0=Normal speed, 1=Autospeed 0=Disabled, 1=Enabled 0=Stream mode, 1=Remote mode Reserved Current resolution setting (D0-D7) Current sampling rate (D0-D7) 2 3 n). Set Resolution ( E8,XX ) 0–7 0-7 SC84502 provides four resolutions selected by the second byte of this command as follows: Second Byte XX 00 01 02 03 o). Set Autospeed ( E7 ) Resolution 8 dot/count 4 dot/count 2 dot/count 1 dot/count At the end of a sample interval in the stream mode, the current X and Y data values are converted new values. The sign bits are not involved in this conversion. The conversion is only in stream mode. The relationship between the input and output count follows: Input 0 1 2 3 4 5 N (≥6) p). Reset Autospeed ( E6 ) This command restore normal speed. Output 0 1 1 3 6 9 2.0*N 6.TESTING MODE Whenever OPT is connected to OSC OUT, the chip will enter buyer's testing mode. The X direction output signals of comparators will present to L and M pin. Pressing "R" key can toggle the output from X direction to Y direction. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 10 Silan Semiconductors TIMING DIAGRAM (1) Photo-couples pulse width SC84502 X1(Y1) X2(Y2) Tr Tf (2) PS/2 Mouse (A) Receiving Data Inhibit CLK Tmca Tmci 1st CLK 2rd CLK 9th CLK 10th CLK 11th CLK DATA Tmdc Start Bit Bit0-Bit7 Parity Bit Stop Bit Line Control Bit (B) Sending Data 1st CLK 2nd CLK 10th CLK 11th CLK CLK Tscl Tsca Tpi DATA Tsdc Tscd Start Bit Bit0-Bit7 Parity Bit Stop Bit AC TIMING POINT Output: DATA CLK PIN(PS/2 mouse mode) Input: VDD-2.6 VSS+0.4 VSS+1.6 X1, X2, Y1, Y2 PIN VSS VDD-0.8 CLK, DATA PIN VSS+0.8 VDD L, M, R PIN VSS HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 11 Silan Semiconductors SC84502 I/O PIN EQUIVALENT CIRCUITS CLK: X1,X2,Y1,Y2: X1,X2,Y1,Y2 SC84502 MOUSE DIGITAL SIGNAL VCC VCC 13.2k PS/2 MOUSE ENABLE CLK DATA INPUT SIGNAL VCC VCC DATA INPUT SIGNAL VPP/4 13.2k 10k R, M, L: (R,M,L) (R, L, M) INTERNAL SIGNAL DATA: VCC VCC DATA PS/2 MOUSE ENABLE DATA INPUT SIGNAL DATA INPUT SIGNAL HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 12 Silan Semiconductors APPLICATIONS CIRCUITS SC84502 2 16 3 50k¡ OP OSC DR VDD 1 +5V Y2 NC Y1 NC X2 15 14 13 12 11 510¡ 510¡ 10µ f 4 5 OSC OUT X1 CLK L DATA M Vss R CLK DATA 6 7 8 10 9 GROUND SC84502AP HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 13 Silan Semiconductors PACKAGE OUTLINE SC84502 UNIT:mm 2.54 DIP-14-300-2.54 6.40 1.50 19.4 7.62 15 degree 3.51 0.46 DIP-16-300-2.54 2.54 3.30 5.08 0.25 UNIT:mm 6.40 1.50 19.4 7.62 15 degree 3.51 0.46 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2000.12.31 14 3.30 5.08 0.25