SP312E

® SP202E/232E/233E/310E/312E High-Performance RS-232 Line Drivers/Receivers ■ Operates from Single +5V Power Supply ■ Meets All RS-232D and ITU V.28 Specifications ■ Operates with 0.1µF to 10µF Capacitors ■ High Data Rate – 120Kbps Under Load ■ Low Power Shutdown ≤1µA (Typical) ■ 3-State TTL/CMOS Receiver Outputs ■ Low Power CMOS – 3mA Operation ■ Improved ESD Specifications: ±15kV Human Body Model ±15kV IEC1000-4-2 Air Discharge ±8kV IEC1000-4-2 Contact Discharge C 1+ V+ C1C 2+ C2VT2OUT R2IN 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT Now Available in Lead Free Packaging The SP202E/232E/233E/310E/312E devices are a family of line driver and receiver pairs that meet the specifications of RS-232 and V.28 serial protocols with enhanced ESD performance. The ESD tolerance has been improved on these devices to over ±15KV for both Human Body Model and IEC1000-4-2 Air Discharge Method. These devices are pin-to-pin compatible with Sipex's SP232A/233A/310A/312A devices as well as popular industry standards. As with the initial versions, the SP202E/232E/233E/310E/312E devices feature at least 120Kbps data rate under load, 0.1µF charge pump capacitors, and overall ruggedness for commercial applications. This family also features Sipex's BiCMOS design allowing low power operation without sacrificing performance. The series is available in plastic DIP and SOIC packages operating over the commercial and industrial temperature ranges. SELECTION TABLE Number of RS232 Model Drivers Receivers SP202E 2 2 SP232E SP233E SP310E SP312E 2 2 2 2 2 2 2 2 No. of Receivers No. of External Active in Shutdown 0.1µF Capacitors 0 4 0 0 0 2 4 0 4 4 Shutdown WakeUp TTL Tri–State No No No No No Yes Yes No No No Yes No No Yes Yes SP202E DESCRIPTION Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 1 ABSOLUTE MAXIMUM RATINGS This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Vcc ................................................................................................................................................................. +6V V+ .................................................................................................................... (Vcc-0.3V) to +11.0V V- ............................................................................................................................................................ -11.0V Input Voltages TIN ......................................................................................................................... -0.3 to (Vcc +0.3V) RIN ............................................................................................................................................................ ±15V Output Voltages TOUT .................................................................................................... (V+, +0.3V) to (V-, -0.3V) ROUT ................................................................................................................ -0.3V to (Vcc +0.3V) Short Circuit Duration TOUT ......................................................................................................................................... Continuous Plastic DIP .......................................................................... 375mW (derate 7mW/°C above +70°C) Small Outline ...................................................................... 375mW (derate 7mW/°C above +70°C) ELECTRICAL CHARACTERISTICS VCC=+5V±10%; 0.1µF charge pump capacitors; TMIN to TMAX unless otherwise noted. PARAMETERS TTL INPUT Logic Threshold LOW HIGH Logic Pull-Up Current TTL OUTPUT TTL/CMOS Output Voltage, Low Voltage, High Leakage Current **; TA = +25° RS-232 OUTPUT Output Voltage Swing Output Resistance Output Short Circuit Current Maximum Data Rate RS-232 INPUT Voltage Range Voltage Threshold LOW HIGH Hysteresis Resistance MIN. TYP. MAX. UNITS CONDITIONS 0.8 2.0 15 200 Volts Volts µA TIN ; EN, SD TIN ; EN, SD TIN = 0V 0.4 3.5 0.05 ±5 300 120 -15 0.8 0.2 3 1.2 1.7 0.5 5 ±18 240 +15 2.8 1.0 7 ±6 ±10 Volts Volts µA Volts Ohms mA Kbps Volts Volts Volts Volts kΩ IOUT = 3.2mA; Vcc = +5V IOUT = -1.0mA EN = VCC, 0V≤VOUT ≤VCC All transmitter outputs loaded with 3kΩ to Ground VCC = 0V; VOUT = ±2V Infinite duration CL = 2500pF, RL= 3kΩ VCC = 5V, TA = +25°C VCC = 5V, TA = +25°C VCC = 5V, TA = +25°C TA = +25°C, -15V ≤ VIN ≤ +15V DYNAMIC CHARACTERISTICS Driver Propagation Delay Receiver Propagation Delay Instantaneous Slew Rate Transition Region Slew Rate Output Enable Time ** Output Disable Time ** POWER REQUIREMENTS VCC Power Supply Current Shutdown Supply Current ** **SP310E and SP312E only 1.5 0.1 10 400 250 3 15 1 3.0 1.0 30 µs µs V/µs V/µs ns ns TTL to RS-232; CL = 50pF RS-232 to TTL CL = 10pF, RL= 3-7kΩ; TA =+25°C CL = 2500pF, RL= 3kΩ; measured from +3V to -3V or -3V to +3V SP310E and SP312E only SP310E and SP312E only No load, TA= +25°C; VCC = 5V All transmitters RL = 3kΩ; TA = +25°C VCC = 5V, TA = +25°C 5 5 mA mA µA Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 2 PERFORMANCE CURVES -11 -10 10 8.5 12 30 9.0 -9 V– Voltage (Volts) -8 -7 -6 -5 -4 -3 VCC = 6V V+ (Volts) 8 6 VCC = 6V VCC = 5V 25 20 ICC (mA) VCC = 6V VOH (Volts) 8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.75 5.0 VCC (Volts) 5.25 5.5 Load current = 0mA TA = 25°C VCC = 5V VCC = 4V 15 VCC = 5V 10 VCC = 4V 5 VCC = 3V VCC = 4V 4 2 0 0 2 4 6 8 10 12 14 0 5 10 15 20 25 30 35 40 Load Current (mA) 0 -55 -40 0 25 70 85 125 Load Current (mA) Temperature (°C) PINOUTS C 1+ V+ C 1C 2+ C 2VT2OUT R2IN 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT C 1+ V+ C1C 2+ C2VT2OUT R2IN 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT SP202E SP232E T2IN T1IN R1OUT R1IN T1OUT GND VCC V+ GND 1 2 3 20 19 18 R2OUT R2IN T2OUT VC 2C2+ C1– C1+ C2+ C2– N.C./EN C1+ V+ C1C2+ C2VT2OUT R2IN 1 2 20 19 SHDN VCC GND SP310E_A/312E_A 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 SP233ECT 4 5 6 7 8 9 17 16 15 14 13 12 11 T1OUT R1IN R1OUT N.C. T1IN T2IN N.C. V– 10 20-PIN SOIC R2OUT 10 20-PIN SSOP NC * C 1+ V+ C 1C 2+ C 2VT2OUT R2IN 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 ON/OFF VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT EN * C 1+ V+ C1C2+ C 2VT2OUT R2IN 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 SHUTDOWN VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT SP312E SP310E * N.C. for SP310E_A, EN for SP312E_A Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 3 FEATURES… The SP202E/232E/233E/310E/312E devices are a family of line driver and receiver pairs that meet the specifications of RS-232 and V.28 serial protocols with enhanced ESD performance. The ESD tolerance has been improved on these devices to over ±15KV for both Human Body Model and IEC1000-4-2 Air Discharge Method. These devices are pin-to-pin compatible with S ipex's 2 32A/233A/310A/312A devices as well as popular industry standards. As with the initial versions, the SP202E/232E/ 233E/310E/312E devices feature10V/µs slew rate, 120Kbps data rate under load, 0.1µF charge pump capacitors, overall ruggedness for commercial applications, and increased drive current for longer and more flexible cable configurations. This family also features Sipex's BiCMOS design allowing low power operation without sacrificing performance. The SP202E/232E/233E/310E/312E devices have internal charge pump voltage converters which allow them to operate from a single +5V supply. The charge pumps will operate with polarized or non-polarized capacitors ranging from 0.1 to 10 µF and will generate the ±6V needed to generate the RS-232 output levels. Both meet all EIA RS-232 and ITU V.28 specifications. The SP310E provides identical features as the SP232E with a single control line which simultaneously shuts down the internal DC/DC converter and puts all transmitter and receiver outputs into a high impedance state. The SP312E is identical to the SP310E with separate tri-state and shutdown control lines. THEORY OF OPERATION The SP232E, SP233E, SP310E and SP312E devices are made up of three basic circuit blocks – 1) a driver/transmitter, 2) a receiver and 3) a charge pump. Each block is described below. Driver/Transmitter The drivers are inverting transmitters, which accept TTL or CMOS inputs and output the RS-232 signals with an inverted sense relative to the input logic levels. Typically the RS-232output voltage swing is ±6V. Even under worst case loading conditions of 3kOhms and 2500pF, the output is guaranteed to be ±5V, which is consistent with the RS-232 standard specifications. The transmitter outputs are protected against infinite short-circuits to ground without degradation in reliability. +5V INPUT 10 µF 6.3V + 1 0.1µ F + 6.3V 3 4 16 C+ 1 V CC V+ 0.1µ F 6.3V 2+ C 1- * Charge Pump C+ 2 0.1µ F + 16V 5 TTL/CMOS OUTPUTS TTL/CMOS INPUTS V- 6 + 0.1µ F 16V C 2400k Ω T1 IN 11 T1 400k Ω 14 T 1OUT T2 IN 10 T2 R 1 5k Ω 7 T 2OUT R 1 OUT R 1 IN R 2 OUT 9 SP202E SP232E R 2 5k Ω 8 R 2 IN GND 15 *The negative terminal of the V+ storage capacitor can be tied to either VCC or GND. Connecting the capacitor to VCC (+5V) is recommended. Figure 1. Typical Circuit using the SP202E or SP232E. Date: 7/19/04 SP202E Series High Performance RS232 Transceivers RS-232 INPUTS 12 13 RS-232 OUTPUTS © Copyright 2004 Sipex Corporation 4 +5V INPUT 7 TTL/CMOS OUTPUTS TTL/CMOS INPUTS V CC T1 IN 2 400k Ω T1 T2 5 T 1OUT T2 IN 1 400k Ω 18 T 2OUT RS-232 INPUTS R 1 OUT 3 R1 5k Ω 4 R 1 IN R 2 OUT 20 13 C + 1 14 10 17 8 R2 5k Ω C 1VVV+ 19 R 2 IN Do not make connection to these pins Internal -10V Power Supply Internal +10V Power Supply C + 12 2 C 2 + 15 SP233ECT GND GND 6 9 C2 C2 - 11 16 Figure 2. Typical Circuits using the SP233ECP and SP233ECT The instantaneous slew rate of the transmitter output is internally limited to a maximum of 30V/ µs in order to meet the standards [EIA RS-232-D 2.1.7, Paragraph (5)]. However, the transition region slew rate of these enhanced products is typically 10V/µs. The smooth transition of the loaded output from VOL to VOH clearly meets the monotonicity requirements of the standard [EIA RS-232-D 2.1.7, Paragraphs (1) & (2)]. Receivers The receivers convert RS-232 input signals to inverted TTL signals. Since the input is usually from a transmission line, where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 500mV. This ensures that the receiver is virtually immune to noisy transmission lines. The input thresholds are 0.8V minimum and 2.4V maximum, again well within the ±3V RS-232 requirements. The receiver inputs are also protected against voltages up to ±15V. Should an input be left unconnected, a 5KOhm pulldown resistor to ground will commit the output of the receiver to a high state. RS-232 OUTPUTS +5V INPUT 10 µF 6.3V +5V INPUT 10 µF 6.3V + + 2 0.1µ F + 6.3V 4 5 17 C+ 1 V CC 0.1 µF 16V 3+ V+ C 1C+ 2 * 0.1 µF 16V TTL/CMOS INPUTS Charge Pump V7 2 0.1µ F + 6.3V 4 5 17 C+ 1 V CC V+ 0.1µ F 16V 3+ C 1C+ 2 * 16V Charge Pump V7 0.1µ F + 16V 6 + 0.1µ F + 16V 6 + 0.1µ F C 2400k Ω C 2400k Ω TTL/CMOS OUTPUTS TTL/CMOS INPUTS RS-232 OUTPUTS T1 IN 12 T1 400k Ω 15 T 1OUT T1 IN 12 T1 400k Ω 15 T 1OUT T2 IN 11 T2 R 1 5k Ω 8 T 2OUT T2 IN 11 T2 8 T 2OUT R 1 OUT R 1 5k Ω R 1 IN R 2 OUT 10 R 2 5k Ω 9 R 2 IN R 2 OUT 10 R 2 5k Ω 9 R 2 IN SP310E GND 16 18 ON/OFF EN 1 SP312E GND 16 18 SHUTDOWN *The negative terminal of the V+ storage capacitor can be tied to either VCC or GND. Connecting the capacitor to VCC (+5V) is recommended. *The negative terminal of the V+ storage capacitor can be tied to either VCC or GND. Connecting the capacitor to VCC (+5V) is recommended. Figure 3. Typical Circuits using the SP310E and SP312E Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 5 RS-232 INPUTS R 1 OUT R 1 IN RS-232 INPUTS 13 14 TTL/CMOS OUTPUTS 13 14 RS-232 OUTPUTS VCC = +5V +5V C1 + – C4 + – + C2 + – – VDD Storage Capacitor VSS Storage Capacitor –5V –5V C3 Figure 4. Charge Pump — Phase 1 In actual system applications, it is quite possible for signals to be applied to the receiver inputs before power is applied to the receiver circuitry. This occurs, for example, when a PC user attempts to print, only to realize the printer wasn’t turned on. In this case an RS-232 signal from the PC will appear on the receiver input at the printer. When the printer power is turned on, the receiver will operate normally. All of these enhanced devices are fully protected. Charge Pump The charge pump is a Sipex–patented design (5,306,954) and uses a unique approach compared to older less–efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical power supplies. There is a free–running oscillator that controls the four phases of the voltage shifting. A description of each phase follows. Phase 1 — VSS charge storage —During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to +5V. Cl+ is then switched to ground and the charge in C1– is transferred to C2–. Since C2+ is connected to +5V, the voltage potential across capacitor C2 is now 10V. VCC = +5V Phase 2 — VSS transfer — Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to ground, and transfers the generated –l0V to C3. Simultaneously, the positive side of capacitor C 1 is switched to +5V and the negative side is connected to ground. Phase 3 — VDD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C1 produces –5V in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at +5V, the voltage potential across C2 is l0V. Phase 4 — VDD transfer — The fourth phase of the clock connects the negative terminal of C2 to ground, and transfers the generated l0V across C2 to C4, the VDD storage capacitor. Again, simultaneously with this, the positive side of capacitor C1 is switched to +5V and the negative side is connected to ground, and the cycle begins again. Since both V+ and V– are separately generated from VCC; in a no–load condition V+ and V– will C4 + – + C1 + – C2 + – – VDD Storage Capacitor VSS Storage Capacitor –10V C3 Figure 5. Charge Pump — Phase 2 Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 6 +10V a) C2 + GND GND b) C2– –10V Figure 6. Charge Pump Waveforms be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 15kHz. The external capacitors can be as low as 0.1µF with a 16V breakdown voltage rating. VCC = +5V Shutdown (SD) and Enable (EN) for the SP310E and SP312E Both the SP310E and SP312E have a shutdown/ standby mode to conserve power in battery-powered systems. To activate the shutdown mode, which stops the operation of the charge pump, a logic “0” is applied to the appropriate control line. For the SP310E, this control line is ON/OFF (pin 18). Activating the shutdown mode also puts the +5V C1 + – C4 + – + C2 + – – VDD Storage Capacitor VSS Storage Capacitor –5V –5V C3 Figure 7. Charge Pump — Phase 3 VCC = +5V +10V C1 + – C4 + – + C2 + – – VDD Storage Capacitor VSS Storage Capacitor C3 Figure 8. Charge Pump — Phase 4 Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 7 SP310E transmitter and receiver outputs in a high impedance condition (tri-stated). The shutdown mode is controlled on the SP312E by a logic “0” on the SHUTDOWN control line (pin 18); this also puts the transmitter outputs in a tri–state mode. The receiver outputs can be tri–stated separately during normal operation or shutdown by a logic “1” on the ENABLE line (pin 1). Wake–Up Feature for the SP312E The SP312E has a wake–up feature that keeps all the receivers in an enabled state when the device is in the shutdown mode. Table 1 defines the truth table for the wake–up function. With only the receivers activated, the SP312E typically draws less than 5µA supply current. In the case of a modem interfaced to a computer in power down mode, the Ring Indicator (RI) signal from the modem would be used to "wake up" the computer, allowing it to accept data transmission. After the ring indicator signal has propagated through the SP312E receiver, it can be used to trigger the power management circuitry of the computer to power up the microprocessor, and bring the SD pin of the SP312E to a logic high, taking it out of the shutdown mode. The receiver propagation delay is typically 1µs. The enable time for V+ and V– is typically 2ms. After V+ and V– have settled to their final values, a signal can be sent back to the modem on the data terminal ready (DTR) pin signifying that the computer is ready to accept and transmit data. Pin Strapping for the SP233ECT The SP233E packaged in the 20–pin SOIC package (SP233ECT) has a slightly different pinout than the SP233E in other package configurations. To operate properly, the following pairs of pins must be externally wired together: the two V– pins (pins 10 and 17) the two C2+ pins (pins 12 and 15) the two C2– pins (pins 11 and 16) All other connections, features, functions and performance are identical to the SP233E as specified elsewhere in this data sheet. ESD TOLERANCE The SP202E/232E/233E/310E/312E devices incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The improved ESD tolerance is at least ±15KV without damage nor latch-up. There are different methods of ESD testing applied: a) MIL-STD-883, Method 3015.7 b) IEC1000-4-2 Air-Discharge c) IEC1000-4-2 Direct Contact The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD-883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body’s potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 9. This method will test the IC’s capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. The IEC-1000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and systems. For system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside environment and human presence. The premise SD 0 0 1 1 EN 0 1 0 1 Power Up/Down Down Down Up Up Receiver Outputs Enable Tri–state Enable Tri–state Table 1. Wake-up Function Truth Table. Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 8 RC RC SW1 SW1 DC Power Source RS RS SW2 SW2 CS CS Device Under Test Figure 9. ESD Test Circuit for Human Body Model with IEC1000-4-2 is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. The transceiver IC receives most of the ESD current when the ESD source is applied to the connector pins. The test circuit for IEC1000-4-2 is shown on Figure 10. There are two methods within IEC1000-4-2, the Air Discharge method and the Contact Discharge method. With the Air Discharge Method, an ESD voltage is applied to the equipment under test (EUT) through air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. The high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. This energy, whether discharged directly or through air, is predominantly a function of the Contact-Discharge Module RC RC SW1 SW1 DC Power Source RS RS RV SW2 SW2 CS CS Device Under Test RS and RV add up to 330Ω for IEC1000-4-2. Figure 10. ESD Test Circuit for IEC1000-4-2 Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 9 30A discharged to the equipment from a person already holding the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC. The circuit models in Figures 9 and 10 represent the typical ESD testing circuit used for all three methods. The CS is initially charged with the DC power supply when the first switch (SW1) is on. Now that the capacitor is charged, the second switch (SW2) is on while SW1 switches off. The voltage stored in the capacitor is then applied through RS, the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW2 switch is pulsed so that the device under test receives a duration of voltage. For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5kΩ an 100pF, respectively. For IEC-1000-42, the current limiting resistor (RS) and the source capacitor (CS) are 330Ω an 150pF, respectively. The higher CS value and lower RS value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on. The lower current limiting resistor increases the current charge onto the test point. 15A 0A t=0ns t➙ Figure 11. ESD Test Waveform for IEC1000-4-2 t=30ns discharge current rather than the discharge voltage. Variables with an air discharge such as approach speed of the object carrying the ESD potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed. The Contact Discharge Method applies the ESD current directly to the EUT. This method was devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transferred without the air-gap arc. In situations such as hand held systems, the ESD charge can be directly SP202E Family Driver Outputs Receiver Inputs i➙ HUMAN BODY MODEL ±15kV ±15kV Air Discharge ±15kV ±15kV IEC1000-4-2 Direct Contact ±8kV ±8kV Level 4 4 Table 2. Transceiver ESD Tolerance Levels Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 10 PACKAGE: 20 PIN SSOP D N 2 NX R R1 E1 E Seaing Plane L1 L A Ø A DETAIL A 1 2 INDEX AREA D x E1 22 e A2 A Seating Plane b A1 20 PIN SSOP JEDEC MO-150 (AE) Variation A A1 A2 b c D E E1 L L1 Ø Dimensions in (mm) MIN 0.05 1.65 0.22 0.09 6.90 7.40 5.00 0.55 NOM MAX 1.75 7.20 7.80 5.30 0.75 1.25 REF 0º 4º 8º BASE METAL (b) Section A-A 2.0 1.85 0.38 0.25 7.50 8.20 WITH LEAD FINISH SEE DETAIL “A” 5.60 0.95 c 20 PIN SSOP Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 11 PACKAGE: 16 PIN NSOIC D e E/2 B E1/2 E1 E B SEE VIEW C 1 INDEX AREA (D/2 X E1/2) b TOP VIEW WITH PLATING Ø1 b L2 Seating Plane Ø1 Gauge Plane Ø L L1 c VIEW C BASE METAL SECTION B-B 16 Pin NSOIC (JEDEC MS-012, AC - VARIATION) DIMENSIONS in (mm) A A2 Seating Plane A1 SIDE VIEW SYMBOL A A1 A2 b c D E E1 e L L1 L2 Ø Ø1 MIN NOM MAX 1.75 1.35 0.25 0.10 1.25 1.65 0.31 0.51 0.17 0.25 9.90 BSC 6.00 BSC 3.90 BSC 1.27 BSC 0.40 1.27 1.04 REF 0.25 BSC 8º 0º 5º 15º 16 PIN NSOIC Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 12 PACKAGE: 16 PIN WSOIC D E/2 B E1 E B E1/2 SEE VIEW C 1 INDEX AREA (D/2 X E1/2) 2 3 b e Ø1 TOP VIEW WITH PLATING b Gauge Plane L2 Seating Plane Ø1 L L1 Ø c VIEW C BASE METAL SECTION B-B 16 Pin SOIC (WIDE) (JEDEC MS-013, AA - VARIATION) DIMENSIONS IN (mm) A A2 Seating Plane A1 SIDE VIEW SYMBOL A A1 A2 b c D E E1 e L L1 L2 Ø Ø1 MIN NOM MAX 2.65 2.35 0.30 0.10 2.05 2.55 0.31 0.51 0.20 0.33 10.30 BSC 10.30 BSC 7.50 BSC 1.27 BSC 0.40 1.27 1.40 REF 0.25 BSC 0º 8º 5º 15º 16 PIN SOIC WIDE Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 13 PACKAGE: 18 PIN PDIP A1 D A N D1 b3 e b2 b L A2 INDEX AREA E1 E 12 3 N/2 18 PIN PDIP JEDEC MS-001 (AC) Variation A A1 A2 b b2 b3 c D D1 E E1 e eA eB L Dimensions in inches MIN .015 .115 .014 .045 .030 .008 .880 .005 .300 .240 NOM MAX .130 .018 .060 .039 .010 .900 .310 .250 .100 BSC .300 BSC .115 .130 .430 .150 .210 .195 .022 .070 .045 .014 .920 .325 .280 E c eA eB b C 18 pin PDIP Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 14 ORDERING INFORMATION Part Number Temperature Range Topmark Package SP202ECN.............................0°C to +70°C.................................SP202ECN........................................................................16–pin NSOIC SP202ECN/TR.......................0°C to +70°C.................................SP202ECN........................................................................16–pin NSOIC SP202ECP.............................0°C to +70°C.................................SP202ECP.........................................................................16–pin PDIP SP202ECT.............................0°C to +70°C.................................SP202ECT.........................................................................16–pin WSOIC SP202ECT/TR.......................0°C to +70°C.................................SP202ECT.........................................................................16–pin WSOIC SP202EEN..........................–40°C to +85°C................................SP202EEN.........................................................................16–pin NSOIC SP202EEN/TR....................–40°C to +85°C................................SP202EEN.........................................................................16–pin NSOIC SP202EEP..........................–40°C to +85°C................................SP202EEP.........................................................................16–pin PDIP SP202EET..........................–40°C to +85°C................................SP202EET..........................................................................16–pin WSOIC SP202EET/TR.....................–40°C to +85°C................................SP202EET..........................................................................16–pin WSOIC SP232ECN.............................0°C to +70°C................................SP232ECN..........................................................................16–pin NSOIC SP232ECN/TR.......................0°C to +70°C................................SP232ECN..........................................................................16–pin NSOIC SP232ECP.............................0°C to +70°C.................................SP232ECP.........................................................................16–pin PDIP SP232ECT.............................0°C to +70°C.................................SP232ECT..........................................................................16–pin WSOIC SP232ECT/TR.......................0°C to +70°C.................................SP232ECT..........................................................................16–pin WSOIC SP232EEN..........................–40°C to +85°C................................SP232EEN..........................................................................16–pin NSOIC SP232EEN/TR....................–40°C to +85°C................................SP232EEN..........................................................................16–pin NSOIC SP232EEP..........................–40°C to +85°C................................SP232EEP..........................................................................16–pin PDIP SP232EET..........................–40°C to +85°C................................SP232EET...........................................................................16–pin WSOIC SP232EET/TR.....................–40°C to +85°C................................SP232EET...........................................................................16–pin WSOIC SP233ECT............................0°C to +70°C.................................SP233ECT...........................................................................20–pin WSOIC SP233ECT/TR......................0°C to +70°C.................................SP233ECT...........................................................................20–pin WSOIC SP233EET..........................–40°C to +85°C................................SP233EET...........................................................................20–pin WSOIC SP233EET/TR.....................–40°C to +85°C................................SP233EET...........................................................................20–pin WSOIC SP310ECP............................0°C to +70°C.................................SP310ECP.........................................................................18–pin PDIP SP310ECT............................0°C to +70°C.................................SP310ECT..........................................................................18–pin WSOIC SP310ECT/TR......................0°C to +70°C.................................SP310ECT..........................................................................18–pin WSOIC SP310ECA............................0°C to +70°C.................................SP310ECA..........................................................................20–pin SSOP SP310ECA/TR......................0°C to +70°C.................................SP310ECA..........................................................................20–pin SSOP SP310EEP..........................–40°C to +85°C................................SP310EEP..........................................................................18–pin PDIP SP310EET..........................–40°C to +85°C................................SP310EET...........................................................................18–pin WSOIC SP310EET/TR.....................–40°C to +85°C................................SP310EET...........................................................................18–pin WSOIC SP310EEA..........................–40°C to +85°C................................SP310EEA...........................................................................20–pin SSOP SP310EEA/TR.....................–40°C to +85°C................................SP310EEA...........................................................................20–pin SSOP SP312ECP............................0°C to +70°C.................................SP312ECP..........................................................................18–pin PDIP SP312ECT............................0°C to +70°C.................................SP312ECT...........................................................................18–pin WSOIC SP312ECT/TR......................0°C to +70°C.................................SP312ECT...........................................................................18–pin WSOIC SP312ECA............................0°C to +70°C.................................SP312ECA...........................................................................20–pin SSOP SP312ECA/TR......................0°C to +70°C.................................SP312ECA...........................................................................20–pin SSOP SP312EEP..........................–40°C to +85°C................................SP312EEP...........................................................................18–pin PDIP SP312EET..........................–40°C to +85°C................................SP312EET............................................................................18–pin WSOIC SP312EET/TR.....................–40°C to +85°C................................SP312EET............................................................................18–pin WSOIC SP312EEA..........................–40°C to +85°C................................SP312EEA............................................................................20–pin SSOP SP312EEA/TR.....................–40°C to +85°C................................SP312EEA............................................................................20–pin SSOP Available in lead free packaging. To order add "-L" suffix to part number. Example: SP312EEA/TR = standard; SP312EEA-L/TR = lead free /TR = Tape and Reel Pack quantity is 1,500 for SSOP or WSOIC and 2,500 for NSOIC. Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 REVISION HISTORY DATE 6/2/04 7/19/04 REVISION A A DESCRIPTION Incorporated new package drawings with JEDEC reference. Added typical output voltage swing value (±6V). Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. Date: 7/19/04 SP202E Series High Performance RS232 Transceivers © Copyright 2004 Sipex Corporation 15