SP332ET-L

SP332 RS-232/RS-485 Multi-Mode Serial Transceiver Description FEATURES ■■ 5V only single supply operation ■■ Software programmable RS-232 or RS-485 selection ■■ 4 drivers, 4 receivers RS-232 ■■ 2 drivers, 2 receivers RS-485 ■■ Loop back function for self test ■■ 28-pin WSOIC package The SP332 is a monolithic device that contains both RS-232 and RS-485 line drivers and receivers. The configuration of the SP332 can be changed at any time by changing the logic state of two control pins. The device also includes a loop back function which internally connects driver outputs to receiver inputs for a chip self test. An MaxLinear-patented charge pump allows 5V-only operation. Ordering Information - Back Page Typical Applications Circuit RS-232 Mode Full Duplex RS-485 Mode Mode 5V 9 0.1µF 12 11 0.1µF 0V 0V TTL/CMOS TTL/CMOS TTL/CMOS TTL/CMOS TTL/CMOS 13 24 5V 5 VCC C1+ C1- V+ C2+ V+ SP332 C2SEL A SEL B 26 TI1 27 TI2 28 TI3 1 TI4 19 RX1 VCC 0.1µF +5V TTL/CMOS VCC VCC VCC +5V 400KΩ 20 RX2 21 RX3 22 RX4 400KΩ GND TX2 7 T2 400KΩ TX3 4 T3 400KΩ TX4 3 T4 RI1 15 R1 RS-232 TTL/CMOS TTL/CMOS RS-232 RS-232 TTL/CMOS TTL/CMOS RS-232 24 2 VCC C1- V+ C2+ V+ SP332 C2SEL A SEL B 26 TI1 R3 RS-232 TTL/CMOS RI4 18 23 TX2 7 400KΩ T1 TX1 6 27 TI2 28 TI3 TX4 3 400KΩ TTL/CMOS RS-485 RS-485 TX3 4 1 TI4 19 RX1 R1 150KΩ RI1 15 20 RX2 TTL/CMOS TTL/CMOS RS-232 21 RX3 R3 150KΩ RS-485 RS-485 GND RS-485 GND RI3 17 22 RX4 150KΩ RS-485 GND RI4 18 RS-232 RS-485 T3 150KΩ GND R4 14 0.1µF LOOPBACK VCC GND RI3 17 0.1µF 10 RI12 16 RS-232 GND R2 13 5 C1+ VCC TTL/CMOS RI2 16 5KΩ 8 TX1 6 T1 5KΩ TTL/CMOS 23 12 11 14 0.1µF LOOPBACK 5KΩ TTL/CMOS 0.1µF 10 2 5KΩ TTL/CMOS 9 0.1µF RS-485 GND GND SHUTDOWN 25 8 TTL/CMOS REV 1.0.1 GND SHUTDOWN 25 TTL/CMOS 1/11 SP332 Absolute Maximum Ratings These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections to the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. VCC................................................................................... 7V Storage Temperature................................... -65°C to 150°C Input Voltages Power Dissipation Logic......................... -0.5V to (VCC + 0.5V) Drivers...................... -0.5V to (VCC + 0.5V) Power Derating, øJA Receivers.........................±30V @ ≤100mA 28-pin WSOIC.............................. 1000mW 28-pin WSOIC................................ 40°C/W Driver Outputs.............................................................. ±15V Maximum Data Rate................................................ 8Mbps(1) Electrical Characteristics Limits are specified at TA = 25°C and VCC = 5.0V unless otherwise noted. Parameters Min. Typ. Max. Units Conditions Vcc Volts Unloaded; R = ∞Ω; See Figure 1 RS-485 Driver DC Characteristics Differential output voltage Differential output voltage 2.0 5.0 Volts With load; R = 50Ω (RS-422); See Figure 1 Differential output voltage 1.5 5.0 Volts With load; R = 27Ω (RS-485); See Figure 1 0.2 Volts R = 27Ω or R = 50Ω; See Figure 1 3 Volts R = 27Ω or R = 50Ω; See Figure 1 Volts Applies to transmitter inputs, SEL A, SEL B, SD and LB Change in magnitude of driver differential output voltage for complementary states Driver common-mode output voltage Input high voltage 2.0 Input low voltage 0.8 Volts Applies to transmitter inputs, SEL A, SEL B, SD and LB Input current ±10 µA Applies to transmitter inputs, SEL A, SEL B, SD and LB Pull-up current 1.5 µA Pull-down current 3.0 µA Driver short circuit current VOUT = HIGH 35 250 mA -7V ≤ VO ≤ 10V Driver short circuit current VOUT = LOW 35 250 mA -7V ≤ VO ≤ 10V RS-485 Driver AC Characteristics Driver data rate 10 Mbps Driver data rate 8 Mbps TA = 85°C(1) Driver input to output tPLH 70 180 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; see Figures 3 and 5 Driver input to output tPHL 70 180 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; see Figures 3 and 5 Driver skew 5 10 ns From output to output; see Figures 3 and 5 15 40 ns From 10% to 90%; RDIFF = 54Ω, CL1 = CL2 = 100pF; see Figures 3 and 5 Driver rise or fall time 3 REV 1.0.1 2/11 SP332 Electrical Characteristics (Continued) Limits are specified at TA = 25°C and VCC = 5.0V unless otherwise noted. Parameters Min. Typ. Max. Units 0.2 Volts Conditions RS-485 Receiver DC Characteristics Differential input threshold -0.2 Input hysteresis Output voltage HIGH 70 3.5 Output voltage LOW Input resistance mV 0.4 12 15 -7V ≤ VCM ≤ 12V VCM = 0V Volts IO = -4mA, VID = 200mV Volts IO = 4mA, VID = -200mV kΩ -7V ≤ VCM ≤ 12V Input current (A, B); VIN = 12V 1.5 mA VIN = 12V, A is the non-inverting receiver input. B is the inverting receiver input Input current (A, B); VIN = -7V -0.8 mA VIN = -7V 85 mA 0V ≤ VCM ≤ VCC Short circuit current RS-485 Receiver AC Characteristics Receiver data rate 10 Mbps Receiver data rate 8 Mbps TA = 85°C(1) Receiver input to output tPLH 130 250 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; Figures 3 and 6 Receiver input to output tPHL 130 250 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; Figures 3 and 6 Differential receiver skew |tPHL - tPLH| 13 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; Figures 3 and 6 RS-232 Driver DC Characteristics TTL input level VIL 0.8 Volts Applies to transmitter inputs, SEL A, SEL B, SD and LB Volts Applies to transmitter inputs, SEL A, SEL B, SD and LB TTL input level VIH 2.0 High level voltage output 5.0 15.0 Volts RL = 3kΩ to GND Low level voltage output -15.0 -5.0 Volts RL = 3kΩ to GND Open circuit output ±15 Volts RL = ∞ Short circuit current ±100 mA Power off impedance 300 Ω 120 kbps VOUT = 0V VCC = 0V; VOUT = ±2V RS-232 Driver AC Characteristics Transmission rate Transition time 1.56 µs Rise/fall time, 3V to -3V; -3V to 3V, RL = 3kΩ, CL = 2500pF Propagation delay; tPHL 2 4 µs RL = 3kΩ, CL = 2500pF, from 1.5V of TIN to 50% of VOUT Propagation delay; tPLH 2 4 µs RL = 3kΩ, CL = 2500pF, from 1.5V of TIN to 50% of VOUT Slew rate 10 30 V/µs RL = 3kΩ, CL = 50pF; From 3V to -3V or -3V to 3V REV 1.0.1 3/11 SP332 Electrical Characteristics (Continued) Limits are specified at TA = 25°C and VCC = 5.0V unless otherwise noted. Parameters Min. Typ. Max. Units Conditions 0.4 Volts ISINK = 4mA Volts ISOURCE = -4mA RS-232 Receiver DC Characteristics TTL output level; VOL TTL output level; VOH 3.5 Input high threshold 2.1 Input low threshold 0.8 Input voltage range -15 Input impedance Hysteresis 3.0 1.6 Volts Volts 15 Volts 3 5 7 kΩ 0.2 0.5 1.0 Volts VIN = ±15V VCC = 5V RS-232 Receiver AC Characteristics Transmission rate 120 kbps Transition time 50 ns Rise/fall time, 10% to 90% Propagation delay tPHL 100 300 ns Propagation delay tPLH 100 200 ns No load supply current 19 25 mA No load; VCC = 5.0V; TA = 25°C Full load supply current 90 120 mA RS-232 drivers RL = 3kΩ to GND, DC input RS-485 drivers RL = 54Ω from A to B; DC input Shutdown supply current 5 50 µA TA = 25°C, VCC = 5.0V From 50% of VIN to 1.5V of ROUT Power Requirements NOTE 1. Exceeding the maximum data rate may damage the device. REV 1.0.1 4/11 SP332 Test Circuits A R VOD R 1kΩ S2 B Figure 1: RS-485 Driver DC Test Load Circuit DI A B VCC S1 CRL VOC 1kΩ Test Point Receiver Output CL1 A RDIFF RO B CL2 Figure 2. Receiver Timing Test Load Circuit 15pF S1 500Ω Output Under Test VCC CL S2 Figure 3: RS-485 Driver/Receiver Timing Test Circuit DRIVER INPUT f ≥ 1MHz; t R ≤ 10ns; t F ≤ 10ns +3V 1.5V 0V B DRIVER OUTPUT A Figure 4: RS-485 Driver Timing Test Load #2 Circuit 1.5V t PLH t PHL VO 1/2VO 1/2VO t DPLH DIFFERENTIAL VO+ OUTPUT 0V VA – VB VO– t DPHL tF tR t SKEW = |t DPLH - t DPHL| Figure 5: RS-485 Driver Propagation Delays A– B f = 1MHz; t R ≤ 10ns ; t F ≤ 10ns VOD2 + 0V VOD2 – VOH RECEIVER OUT VOL 0V INPUT 1.5V 1.5V OUTPUT t PHL t PLH Figure 6: RS-485 Receiver Propagation Delays REV 1.0.1 5/11 SP332 Pin Configuration TI4 SEL_B TX4 TX3 VCC TX1 TX2 GND C1+ V+ C2+ C1– C2– V– SP332 1 2 3 4 5 6 7 8 9 10 11 12 13 14 TI3 TI2 TI1 SD SEL_A LB RX4 RX3 RX2 RX1 RI4 RI3 RI2 RI1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Typical Applications Circuits RS-232 Mode Full Duplex RS-485 Mode Mode 5V 9 0.1µF 12 11 0.1µF 0V 0V TTL/CMOS TTL/CMOS TTL/CMOS TTL/CMOS TTL/CMOS 13 24 5V 5 VCC C1+ C1- V+ C2+ V+ SP332 C2SEL A SEL B 26 TI1 27 TI2 28 TI3 1 TI4 19 RX1 VCC 0.1µF +5V TTL/CMOS VCC VCC VCC +5V 400KΩ 20 RX2 21 RX3 22 RX4 400KΩ GND TX2 7 T2 400KΩ TX3 4 T3 400KΩ TX4 3 T4 RI1 15 R1 RS-232 TTL/CMOS TTL/CMOS RS-232 RS-232 TTL/CMOS TTL/CMOS RS-232 24 2 VCC C1- V+ C2+ V+ SP332 C2SEL A SEL B 26 TI1 R3 RS-232 TTL/CMOS T1 TX1 6 27 TI2 28 TI3 TX4 3 400KΩ TTL/CMOS RS-485 RS-485 TX3 4 1 TI4 19 RX1 R1 150KΩ TTL/CMOS TTL/CMOS RS-232 R3 150KΩ RS-485 RI1 15 RS-485 GND RS-485 GND RI3 17 22 RX4 150KΩ RS-485 GND 20 RX2 21 RX3 RS-485 T3 RI4 18 RS-232 GND R4 23 TX2 7 400KΩ 150KΩ RI4 18 14 0.1µF LOOPBACK VCC GND RI3 17 0.1µF 10 RI12 16 RS-232 TTL/CMOS RI2 16 13 5 C1+ VCC GND R2 5KΩ 8 TX1 6 T1 5KΩ TTL/CMOS 23 12 11 14 0.1µF LOOPBACK 5KΩ TTL/CMOS 0.1µF 10 2 5KΩ TTL/CMOS 9 0.1µF RS-485 GND GND SHUTDOWN 25 8 TTL/CMOS REV 1.0.1 GND SHUTDOWN 25 TTL/CMOS 6/11 SP332 SP332 Control Logic Configuration SEL A 0 0 1 1 SEL B 0 1 0 1 LB 1 1 1 1 SD 0 0 0 0 26 TI1 TX1 6 T1 26 TI1 TX1 6 T1 26 TI1 27 28 TI2 TX2 7 T2 TI3 27 TI2 28 TI3 28 TI3 1 TI4 R1 20 RX2 T3 R2 21 RX3 R3 RI1 15 19 RX1 RI2 16 R1 20 RX2 R2 R4 T1 TX3 4 28 TI3 3 1 TI4 T3 TX4 3 T4 RI1 15 RI1 15 19 RX1 R1 R1 21 RX3 R3 RI3 17 RI3 17 21 RX3 R3 22 RX4 RI4 18 R4 RI4 18 0 1 1 SEL B 0 1 0 1 LB 0 0 0 0 SD 0 0 0 0 27 28 TI2 TI3 TX1 6 T1 26 19 20 21 TI4 RX1 RX2 RX3 TX3 T3 27 6 TI2 T2 R1 R2 R3 R4 7 TX3 4 28 TI3 TI3 T3 TX4 3 T4 TX2 4 RI1 15 19 RI2 16 20 RX1 RX2 R1 R2 TX4 RI1 RI2 3 15 16 T1 T3 TX1 6 TX2 7 TX3 4 26 TI1 28 TI3 1 TI4 19 RX1 21 RX3 TX4 T4 RI1 15 R1 R3 TX1 6 T1 19 RX1 RI2 16 RX3 R3 RI4 18 17 RI4 18 22 RX4 R4 TX4 3 RI1 15 R1 RI2 16 RI3 17 21 RX3 RI3 TX2 7 TX3 4 T3 3 RI3 17 21 22 RX4 TX1 T1 26 TI1 TX2 7 T2 28 1 TI1 RI4 18 RI4 18 0 TI1 RI2 16 RI2 16 SEL A 26 TX4 3 RI1 15 19 RX1 RI2 16 RI3 17 R3 TX2 7 TX3 4 T3 RI3 17 21 RX3 22 RX4 TX4 TX1 6 26 TI1 TX2 7 TX3 4 TX4 3 T4 19 RX1 T2 TX3 4 T3 TX1 6 T1 TX2 7 RI3 17 R3 RI4 18 RI4 18 Receiver Inputs are inactive in Loopback Mode (LOOPBACK = 0) Driver Outputs are Tri-stated in Loopback Mode (LOOPBACK = 0) Unused Outputs are Tri-stated REV 1.0.1 7/11 SP332 Functional Description The SP332 is single chip device that can be configured via software for either RS-232, RS-485 or both interface modes at any time. The SP332 is made up of three basic circuit elements, single-ended drivers and receivers, differential drivers and receivers and charge pump. Differential Driver/Receiver RS-485, RS-422 Drivers The differential drivers and receivers comply with the RS-485 and RS-422 standards. The driver circuits are able to drive a minimum of 1.5V when terminated with a 54Ω resistor across the two outputs. The typical propagation delay from driver input to output is 60ns. The driver outputs are current limited to less than 250mA, and can tolerate shorts to ground, or to any voltage within a 10V to -7V range with no damage. 7kΩ over a ±15V range. The maximum operating voltage range for the receiver is ±30V, under these conditions the input current to the receiver must be limited to less than 100mA. Due to the on-chip ESD protection circuitry, the receiver inputs will be clamped to ±15V levels. The RS-232 receivers can operate up to 120kbps. Charge–Pump The charge pump is a MaxLinear–patented design (U.S. 5,306,954) and uses a unique approach compared to older less efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical 10V power supplies. Figure 7(a) shows the waveform found on the positive side of capacitor C2, and Figure 7(b) shows the negative side of capacitor C2. There is a free–running oscillator that controls the four phases of the voltage shifting. A description of each phase follows. RS-485, RS-422 Receivers The differential receivers of the SP332 comply with the RS-485 and RS-422 standards. The input to the receiver is equipped with a common mode range of 12V to -7V. The input threshold over this range is a minimum of ±200mV. The differential receivers can receive data up to 10Mbps. The typical propagation delay from the receiver input to output is 90ns. Phase 1 — VSS charge storage During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to 5V. Cl+ is then switched to ground and charge on C1– is transferred to C2–. Since C2+ is connected to 5V, the voltage potential across capacitor C2 is now 10V. Single Ended Driver / Receiver RS-232 (V.28) Drivers The single-ended drivers and receivers comply with the RS-232 and V.28 standards. The drivers are inverting transmitters which accept either TTL or CMOS inputs and output the RS-232 signals with an inverted sense relative to the input logic levels. Typically, the RS-232 driver output voltage swing is ±9V with no load and is guaranteed to be greater than ±5V under full load. The drivers rely on the V+ and V- voltages generated by the on-chip charge pump to maintain proper RS-232 output levels. With worst case load conditions of 3kΩ and 2500pF, the four RS-232 drivers can still maintain ±5V output levels. The drivers can operate up to 120kbps; the propagation delay from input to output is typically 2µs. Phase 2 — VSS transfer Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to ground, and transfers the generated –10V to C3. Simultaneously, the positive side of capacitor C1 is switched to 5V and the negative side is connected to ground. Phase 3 — VDD charge storage The third phase of the clock is identical to the first phase — the charge transferred in C1 produces –5V in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at +5V, the voltage potential across C2 is 10V. RS-232 (V.28) Receivers The RS-232 receivers convert RS-232 input signals to inverted TTL signals. Each of the four receivers features 500mV of hysteresis margin to minimize the affects of noisy transmission lines. The inputs also have a 5kΩ resistor to ground, in an open circuit situation the input of the receiver will be forced low, committing the output to a logic high state. The input resistance will maintain 3kΩ to Phase 4 — VDD transfer The fourth phase of the clock connects the negative terminal of C2 to ground and transfers the generated 10V across C2 to C4, the VDD storage capacitor. Again, simultaneously with this, the positive side of capacitor C1 is switched to 5V and the negative REV 1.0.1 8/11 SP332 side is connected to ground, and the cycle begins again. magnitude of V– compared to V+ due to the inherent inefficiencies in the design. Since both V+ and V– are separately generated from VCC in a no–load condition, V+ and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the The clock rate for the charge pump typically operates at 15kHz. The external capacitors must be 0.1µF with a 16V breakdown rating. +10V a) C2+ GND GND b) C2-10V Figure 7: Charge Pump Waveforms VCC = +5V VCC = +5V +10V C1 + C2 – + – C4 + – + – VDD Storage Capacitor VSS Storage Capacitor C3 +5V C1 + C2 – –5V – + VSS Storage Capacitor C3 VCC = +5V C4 – VDD Storage Capacitor Figure 9: Charge Pump Phase 3 VCC = +5V + – – –5V Figure 8: Charge Pump Phase 1 C1 + C4 + C2 + – –10V + – – + VDD Storage Capacitor VSS Storage Capacitor C3 +5V C1 + C2 – –5V Figure 10: Charge Pump Phase 2 + – –5V C4 + – VDD Storage Capacitor – + VSS Storage Capacitor C3 Figure 11: Charge Pump Phase 4 REV 1.0.1 9/11 SP332 Package Description WSOIC28 Top View Side View Front View Drawing No: Revision: REV 1.0.1 POD-00000106 A 10/11 SP332 Ordering Information(1) Part Number Operating Temperature Range SP332CT-L Lead-Free Package Tube 0°C to 70°C SP332CT-L/TR (3) Yes(2) SP332ET-L -40°C to 85°C SP332ET-L/TR Packaging Method 28-pin WSOIC Reel Tube Reel NOTE: 1. Refer to www.exar.com/SP332 for most up-to-date Ordering Information. 2. Visit www.exar.com for additional information on Environmental Rating. 3. NRND - Not recommended for new designs. Revision History Revision Date 9617RO - 01/26/10 1.0.0 Convert to Exar Format. Add Revision History table. Change revision to 1.0.0. Add Note 1 and change maximum RS-485 data rate at +85C. Update ABS Max Rating table. 10/16/17 1.0.1 Remove GND from Differential Output Voltage min (page 2). Update to MaxLinear logo. Update format and ordering information table. Theory of Operation section moved to after SP332 Control Logic Configuration section, and renamed Functional Description. Corporate Headquarters: 5966 La Place Court Suite 100 Carlsbad, CA 92008 Tel.:+1 (760) 692-0711 Fax: +1 (760) 444-8598 www.maxlinear.com Description Legacy Sipex Datasheet High Performance Analog: 1060 Rincon Circle San Jose, CA 95131 Tel.: +1 (669) 265-6100 Fax: +1 (669) 265-6101 Email: serial techsupport@exar.com www.exar.com The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by MaxLinear, Inc.. MaxLinear, Inc. assumes no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the user. 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MaxLinear, Inc. may have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except as expressly provided in any written license agreement from MaxLinear, Inc., the furnishing of this document does not give you any license to these patents, trademarks, copyrights, or other intellectual property. Company and product names may be registered trademarks or trademarks of the respective owners with which they are associated. © 2010-2017 MaxLinear, Inc. All rights reserved SP332_DS_101617 REV 1.0.1 11/11