SP4082EEN-L/TR

SP4082E 5V RS-485/RS-422 Transceivers 1/8th Unit Load, Slew-Rate Limited, ±15kV ESD-Protected FEATURES • 5.0V single supply operation • Receiver failsafe on open or shorted lines • 1/8th Unit Load, 256 transceivers on bus • Robust ESD protection for RS-485 pins ±15kV Human Body Model • Controlled driver slew rates 115kbps, Low EMI •Driver short circuit current limit and thermal shutdown for overload protection •Industry standard package footprints RO 1 RE 2 DE 3 DI 4 8 PIN NSOIC SP4082E 8 Vcc 7 B 6 A Half Duplex 5 GND APPLICATIONS • Motor Control • Building Automation • Security Systems • Remote Meter Reading • Long or un-terminated transmission lines DESCRIPTION The SP4082E is designed for reliable, bidirectional communication on multipoint bus transmission lines. The device contains one differential driver and one differential receiver. It is a half-duplex device. The device complys with TIA/EIA-485 and TIA/EIA-422 standards. Lead-free and RoHS compliant packages are available. This device is ruggedized for use in harsh operating conditions over the entire common-mode voltage range from -7V to +12V. Receivers are specially designed to fail-safe to a logic high output state if the inputs are un-driven or shorted. All RS-485 bus-pins are protected against severe ESD events up to ±15kV (Human Body Model). Drivers are protected from excess current flow caused by bus contention or output short-circuits by both an internal current limit and a thermal-overload shutdown. Devices are rated for industrial (-40 to +85ºC) operating temperatures. Receivers have exceptionally high input impedance, which places only 1/8th the standard load on a shared bus. Up to 256 transceivers may coexist while preserving full signal margin. The device operates from a single 5.0V power supply and draws negligible quiescent power. The device has an independent enable and disable for the driver and receiver and will enter a low power shutdown mode if both driver and receiver are disabled. All outputs maintain high impedance during shutdown or when powered-off. SP4082E_101_012920 1 PIN ASSIGNMENTS Pin Number Pin Name Pin Function 1 RO Receiver Output. When RE is low and if (A – B) ≥ -40mV, RO is high. If (A – B) ≤ - 200mV, RO is low. 2 RE Receiver Output Enable. When RE is low, RO is enabled. When RE is high, RO is high impedance. Drive RE high and DE low to enter shutdown mode. 3 DE Driver Output Enable. When DE is high, outputs are enabled. When DE is low, outputs are high impedance. Drive DE low and RE high to enter shutdown mode. 4 DI Driver Input. With DE high, a low level on DI forces noninverting output low and inverting output high. A high level on DI forces non-inverting output high and inverting output low. 5 GND 6 7 A B 8 Vcc REREE Ground Non-inverting Receiver Input and Non-inverting Driver Output Inverting Receiver Input and Inverting Driver Output Positive Supply VCC. Bypass to GND with a 0.1uF capacitor. DEVICE ARCHITECTURE AND BLOCK DIAGRAM RO 1 R 2 RE DE 3 DI 4 D 8 VCC 7 B 6 A 5 8-Pin Half Duplex GND SP4082E_101_012920 2 ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Supply Voltage (VCC)...............................................+ 7.0V Input voltage at control input pins (RE, DE) ..... -0.3V to Vcc+0.3V Driver input voltage (DI) .....................-0.3V to Vcc+0.3V Driver output voltage (A, B, Y, and Z) ...................+/-13V Receiver output voltage (RO) ........-0.3V to (Vcc + 0.3V) Receiver input voltage (A, B) ................................+/-13V Package Power Dissipation: Maximum Junction Temperature 150°C 8-Pin SO Øja = 128.4°C/W Storage Temperature.............................-65°C to +150°C Lead Temperature (soldering, 10s)..................... +300°C RECOMMENDED OPERATING CONDITIONS Vcc=5V ±5%, Tmin to Tmax, unless otherwise noted, Typical values are Vcc=5V and Ta=25°C Recommended Operating Conditions Min. Nom. Max. Unit Supply Voltage, Vcc 4.5 5 5.5 V Input Voltage on A and B pins -7 12 V High-level input voltage (DI, DE or RE), Vih 2 Vcc V Low-level input voltage (DI, DE or RE), Vih 0 0.8 V Driver -60 60 Receiver -8 8 Industrial Grade (E) -40 85 Output Current Operating Free Air Temperature, Ta mA °C Note: The least positive (most negative) limit is designated as the maxium value. SP4082E_101_012920 3 ELECTRICAL CHARACTERISTICS PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Digital Input Signals: DI, DE, RE Logic input thresholds High, Vih 2.0 Low, Vil 0.8 Logic Input Current Ta = 25°C, after first transition ±1 Input Hysteresis Ta = 25°C 100 V μA mV Driver Differential Driver Output (Vod) Differential Driver Output, Test 1 No Load Vcc Rl=100Ω (RS-422) 2 Rl=54Ω (RS-485) 1.5 Differential Driver Output, Test 2 Vcm = -7 to +12V 1.5 Change in Magnitude of Differential Output Voltage (ΔVod) (Note 1) Rl=54 or 100Ω Driver Common Mode Output Voltage (Voc) Rl=54 or 100Ω Change in Common Mode Output Voltage (ΔVoc) Driver Short Circuit Current Limit Output Leakage Current V Vcc 2.7 Vcc V Vcc ±0.2 V 3 V Rl=54 or 100Ω ±0.2 V -7V ≤ Vout ≤ +12V ±250 mA DE=0, Vout=12V 125 RE=0, Vcc=0 or 5.5V Vout= -7V 1 μA -100 Receiver Receiver Input Resistance -7V ≤ Vcm ≤ 12V Input Current (A, B pins) DE=0, RE=0, Vcc=0 or 5.5V Receiver Differential Threshold (VA-VB) -7V ≤ Vcm ≤ 12V 96 Vin= -7V 125 -100 -200 Receiver Input Hysteresis Receiver Output Voltage KΩ Vin= 12V μA -125 -40 25 mV mV Voh Iout = -8mA, Vid = -40mV Vol Iout = 8mA, Vid = -200mV Vcc-1.5 0.4 V High-Z Receiver Output Current Vcc =5.5V, 0 ≤ Vout ≤ Vcc ±1 μA Receiver Output Short Circuit Current 0V ≤ Vro ≤ Vcc ± 95 mA 900 μA 1 μA Supply and Protection Supply Current IQ, Active Mode No load, DI=0 or Vcc Shutdown Mode, Note 2 DE=0, RE=Vcc, DI=Vcc Thermal Shutdown Temperature Junction temperature Thermal Shutdown Hysteresis 400 165 15 o C Notes: 1. Change in Magnitude of Differential Output Voltage and Change in Magnitude of Common Mode Output Voltage are the changes in output voltage when DI input changes state. 2. The transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns the device does not enter shutdown. If the enable inputs are held in this state for at least 600ns the device is assured to be in shutdown. In this low power mode most circuitry is disabled and supply current is typically 1nA. 3.Characterized, not 100% tested. SP4082E_101_012920 4 TIMING CHARACTERISTICS Unless otherwise noted Vcc= +5.0±0.5V, ambient temperature TA from -40 to +85ºC DRIVER CHARACTERISTICS: Conditions Data Signaling Rate (1 / tUI) Duty Cycle 40 to 60% Driver Propagation Delay (tPHL, tPLH) RL = 54Ω, CL = 50pF, Driver Output Rise/Fall Time (tR, tF) Min. Typ. Max. Unit 115 Kbps 3500 ns 667 1200 2500 ns Driver Differential Skew (tPLH – tPHL) ±500 ns Driver Enable to Output High (tDZH) 3500 ns Driver Enable to Output Low (tDZL) 3500 ns Driver Disable from Output High (tDHZ) 100 ns Driver Disable from Output Low (tDLZ) 100 ns Shutdown to Driver Output Valid (tDZV) 6000 ns RECEIVER CHARACTERISTICS: Receiver Propagation Delay Conditions Min. Typ. Max Unit CL = 15pF, VID = ±2V 250 ns ±50 ns 50 ns Receiver Enable to Output High (tZH) 100 ns Receiver Enable to Output Low (tZL) 100 ns Receiver Disable from Output High (tHZ) 100 ns Receiver Disable from Output Low (tLZ) 100 ns Shutdown to Receiver Output Valid (tROV) 3500 ns 600 ns Prop. Delay Skew (tPLH – tPHL) Receiver Output Rise / Fall Time (tR, tF) CL = 15pF Time to Shutdown (Note 2,3) 50 SP4082E_101_012920 5 DESCRIPTION A R/2 DI VID VOD D B R/2 VOC VCC RE Receiver DC Test Circuit Driver DC Test Circuit DI RL 54Ω Y VOD D OUT R CL 50pF Z 3.3V Driver Propagation Delay Time Test Circuit and Timing Diagram DI 0 VCC Z Y VO VDIFF -VO VCC/2 tPLH tPHL VO 1/2 VO 10% tR 1/2 VO VDIFF = V(Y) - V(Z) 90% 90% VSKEW = tPLH - tPHL 10% tF SP4082E_101_012920 6 DESCRIPTION Driver Differential Output Test Circuit 375 DE= 3V A/Y D DI= 0 or VCC VOD 60 B/Z VCM 375 Driver Enable and Disable Times Test Circuit and Timing Diagram 0 or VCC DI Y OUT D Z GENERATOR S1 CL=50pF RL= 500Ω 50Ω VCC DE VCC /2 0 tZL, tZL(SHDN) VOM = (VOL + VCC)/2 OUT 0.25V tLZ 0 SP4082E_101_012920 7 tLZ VCC OUT VOM = (VOL+ VCC)/2 VOL DESCRIPTION 0.25V Receiver Propagation Delay Test Circuit and Timing Diagram A VID B R RE OUT CL 15pF A +1V B -1V tPHL tPLH 1.5V OUT VOH VOL SP4082E_101_012920 8 DESCRIPTION Receiver Enable and Disable Times Test Circuit 1.5V S3 B -1.5V S1 1KΩ A S2 RE GENERATOR VCC CL=15pF 50Ω Receiver Enable and DisableTiming Diagram S1 is closed, S2 is open, S3= -1.5V S1 is open, S2 is closed, S3=1.5V 3V 3V 1.5V RE 1.5V RE tZH, tZH(SHDN) tZL, tZL(SHDN) 0V VOH OUT VOH/2 VCC OUT 0V VOL = VCC/2 VOL S1 is open, S2 is closed, S3=1.5V RE 0.25V OUT S1 is closed, S2 is open, S3= -1.5V 3V 3V 1.5V RE 1.5V tLZ VOH 0V VCC 0V OUT 0.25V VOL SP4082E_101_012920 9 FUNCTION TABLES Transmitting RE X X 0 1 Inputs DE 1 1 0 0 Receiving Outputs DI 1 0 X X A 1 0 Inputs B 0 1 High-Z Shutdown Output RE DE VA - VB RO 0 X ≥ -40mV 1 0 X ≤-200mV 0 0 X Open/shorted 1 1 1 X High-Z 1 0 X Shutdown Note: Receiver inputs -200mV < VA - VB < -40mV, should be considered indeterminate SP4082E_101_012920 10 DESCRIPTION DETAILED DESCRIPTION The SP4082E is a 5V half-duplex RS-485 transceiver. the SP4082E is characterized for protection to the following limits: ±15kV using the Human Body Model The SP4082E contains one driver and one receiver. These devices feature fail-safe circuitry that will guarantee a logic-high receiver output when the receiver inputs are open or shorted. ESD TEST CONDITIONS ESD performance depends on a variety of conditions. Contact Sipex for a reliability report that documents test setup, methodology and results. The SP4082E features reduced slew-rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, allowing error-free data transmission up to 115kbps. MACHINE MODEL The machine model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. The objective is to emulate the stress caused when I/O pins are contacted by handling equipment during test and assembly. It operates from a single 5.0V supply. Drivers are output short-circuit current limited. Thermal-shutdown circuitry protects drivers against excessive power dissipation. When activated, the thermal-shutdown circuitry places the driver outputs into a high-impedance state. 256 TRANSCEIVERS ON THE BUS The standard RS-485 receiver input impedance is 12kΩ (1 unit load). A standard driver can drive up to 32 unit loads. The SP4032E has only a 1/8th unit load receiver input impedance (96kΩ), thereby allowing eight times as many, up to 256, transceivers to be connected in parallel on a communication line. Any combination of these devices and other RS-485 transceivers up to a total of 32 unit loads may be connected to the line. Receiver FAILSAFE Ordinary RS-485 differential receivers will be in an indeterminate state whenever A - B is less than ±200mV. This situation can occur whenever the data bus is not being actively driven. The Failsafe feature guarantees a logic-high receiver output if the receiver’s differential inputs are shorted or open-circuit. LOW POWER SHUTDOWN MODE Low-power shutdown mode is initiated by bringing both RE high and DE low simultaneously. While in shutdown devices typically draw only 50nA of supply current. DE and RE may be tied together and driven by a single control signal. Devices are guaranteed not to enter shutdown if RE is high and DE is low for less than 50ns. If the inputs are in this state for at least 600ns, the parts are shutdown. The receiver thresholds of the SP4082E are very precise and offset by at least a 40mV noise margin from ground. This results in a logic-high receiver output at zero volts input differential while maintaining compliance with the EIA/TIA485 standard of ±200mV. ±15KV ESD PROTECTION ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The driver output and receiver inputs have extra protection against static electricity. Sipex uses state of the art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, the SP4082E keeps working without latch-up or damage. Enable times tZH and tZL apply when the part is not in low-power shutdown state. Enable times tZH(SHDN) and tZL(SHDN) apply when the parts are shut down. The drivers and receivers take longer to become enabled from low power shutdown mode tZL(SHDN) and tZL(SHDN) than from driver/receiver-disable mode (tZH, tZL). DRIVER OUTPUT PROTECTION Two mechanisms prevent excessive output current and power dissipation caused by faults or by bus contention. First, a driver current limit on the output stage provides immediate protec- ESD protection can be tested in various ways. The transmitter outputs and receiver inputs of SP4082E_101_012920 11 DESCRIPTION tion against short circuits over the whole common-mode voltage range. Second, a thermalshutdown circuit forces the driver outputs into a high-impedance state if junction temperature becomes excessive. LINE LENGTH, EMI, AND REFLECTIONS It features controlled slew-rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables. Driver rise and fall times are limited to no faster than 667ns, allowing error-free data transmission up to 115kbps. The RS-485/RS-422 standard covers line lengths up to 4,000ft. Maximum achievable line length is a function of signal attenuation and noise. Use of slew-controlled drivers may help to reduce crosstalk interference and permit communication over longer transmission lines. Termination prevents reflections by eliminating the impedance mismatches on a transmission line. Line termination is typically used if rise and fall times are shorter than the round-trip signal propagation time. Slew-limited drivers may reduce or eliminate the need for cable termination in many applications. TYPICAL APPLICATIONS: Half-Duplex Network H alf -D uplex N etw ork SP4082E_101_012920 12 θ θ1 θ2 θ θ θ2 SP4082E_101_012920 13 ORDERING INFORMATION(1) Part Number Temperature Range Package -400C to +850C 8 pin NSOIC SP4082EEN-L/TR Package Method Lead-Free(2) Tape and Reel Yes NOTES: 1. Refer to www.maxlinear.com/SP4082E for most up to date Ordering Information. 2. Visit www.maxlinear.com for additional information on Environmental Rating. REVISION HISTORY Date Revision Description 12/20/07 1.0.0 Legacy Sipex datasheet. 1/29/20 1.0.1 Update to MaxLinear logo. Update ordering information. Add Revision History. MaxLinear, Inc. 5966 La Place Court, Suite 100 Carlsbad, CA 92008 760.692.0711 p. 760.444.8598 f. www.maxlinear.com The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by MaxLinear, Inc. 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