SP526CF-L

® SP526 WAN Multi-Mode Serial Transceiver 44 43 42 41 40 39 38 37 36 35 34 GND R1INA R1INB R2INA R2INB R3INA R3INB R4INA R4INB R1OUT R2OUT ■ Low-Cost Programmable Serial Transceiver ■ Four (4) Drivers and Four (4)) Receivers ■ Driver and Receiver Tri-state Control ■ Software Selectable Protocol Selection ■ Interface Modes: ✓ RS-232 (V.28) ✓ RS-422 (V.11, X.21) ✓ EIA-530 or RS-449 (V.10, V.11) ■ Designed to Meet All NET1/2 Compliancy Requirements ■ High ESD Tolerance ✓ ±15kV per Human Body Model ✓ ±15kV per IEC1000-4-2 Air Discharge ✓ ±8kV per IEC1000-4-2 Contact Discharge 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 SP526 R3OUT R4OUT VCC T4OUT T3OUTA T3OUTB T2OUTA T2OUTB T1OUTA T1OUTB GND 12 13 14 15 16 17 18 19 20 21 22 ENR4 ENR3 ENR2 ENR1 T4IN T3IN T2IN T1IN ENT4 ENT3 ENT2 ENT1 D1 D0 VSS C2C1GND C2+ VDD C1+ VCC +5V 1.0µF 1.0µF 22 1.0µF 1.0µF 21 C1+ VCC Now Available in Lead Free Packaging 31 VCC VDD 17 C1– 19 C2+ VSS SP526 T1IN 15 1.0µF 16 C2– 8 20 T1 25 T1OUTA 24 T1OUTB T2 27 T2OUTA 26 T2OUTB T3 29 T3OUTA 28 T3OUTB T4 30 T4OUT 12 DESCRIPTION The SP526 is a monolithic device that supports three (3) physical layer serial interface standards. The SP526 is fabricated using a low power BiCMOS process technology, and incorporates four (4) drivers and four (4) receivers can be configured via software for the selected interface modes at any time. The SP526 includes tri-state ability for the driver and receiver outputs through separate enable lines. A shutdown mode is also included through the mode select pins for power savings. When mated with the SP322 V.11/V.35 Programmable Transceiver, the SP526 provides the four (4) channels needed for handshaking/control lines such as CTS, RTS, etc. The two transceiver ICs are an ideal solution for WAN serial ports in networking equipment such as routers, DSU/CSU's, and other access devices. ENT1 7 T2IN 11 ENT2 6 T3IN 10 ENT3 5 T4IN 9 ENT4 35 R1OUT R1 43 R1INA 42 R1INB R2 41 R2INA 40 R2INB R3 39 R3INA 38 R3INB R4 37 R4INA 36 R4INB 4 ENR1 34 R2OUT 3 ENR2 33 R3OUT 2 ENR3 32 R4OUT 1 ENR4 14 D0 GND 18 Rev: C Date:2/1/06 GND 23 GND 13 D1 44 SP526 Multi–Mode Serial Transceiver 1 © Copyright 2006 Sipex Corporation ABSOLUTE MAXIMUM RATINGS STORAGE CONSIDERATIONS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. VCC............................................................................+7V Input Voltages: Logic...............................-0.3V to (VCC+0.5V) Drivers............................-0.3V to (VCC+0.5V) Receivers........................................±15.5V Output Voltages: Logic................................-0.3V to (VCC+0.5V) Drivers................................................±15V Receivers........................-0.3V to (VCC+0.5V) Storage Temperature..........................-65˚C to +150˚C Power Dissipation (derate 14.3mW/˚C above 70˚C)................1144mW Due to the relatively large package size of the 44-pin quad flat-pack, storage in a low humidity environment is preferred. Large high density plastic packages are moisture sensitive and should be stored in Dry Vapor Barrier Bags. Prior to usage, the parts should remain bagged and stored below 40°C and 60%RH. If the parts are removed from the bag, they should be used within 48 hours or stored in an environment at or below 20%RH. If the above conditions cannot be followed, the parts should be baked for four hours at 125°C in order remove moisture prior to soldering. Sipex ships the 44-pin QFP in Dry Vapor Barrier Bags with a humidity indicator card and desiccant pack. The humidity indicator should be below 30%RH. ELECTRICAL CHARACTERISTICS TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS 0.8 Volts Volts 0.4 Volts Volts IOUT= – 3.2mA IOUT= 1.0mA ±15 ±15 ±100 Volts Volts mA Ω per Figure 1 per Figure 2 per Figure 4 per Figure 5 VCC = +5V for AC parameters 1.5 30 µs V/µs per Figure 6; +3V to -3V per Figure 3 5 5 µs µs kbps 7 +2.0 3.0 kΩ Volts Volts Volts LOGIC INPUTS VIL VIH 2.0 LOGIC OUTPUTS VOL VOH 2.4 V.28 DRIVER DC Parameters Outputs Open Circuit Voltage Loaded Voltage Short-Circuit Current Power-Off Impedance AC Parameters Outputs Transition Time Instantaneous Slew Rate Propagation Delay tPHL tPLH Max.Transmission Rate ±5.0 300 0.5 0.5 120 1 1 230 V.28 RECEIVER DC Parameters Inputs Input Impedance Open-Circuit Bias HIGH Threshold LOW Threshold AC Parameters Propagation Delay tPHL tPLH Rev: C Date:2/1/06 - 3 0.8 1.7 1.2 per Figure 7 per Figure 8 VCC = +5V for AC parameters 50 50 100 100 500 500 ns ns SP526 Multi–Mode Serial Transceiver 2 © Copyright 2006 Sipex Corporation ELECTRICAL CHARACTERISTICS TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS V.28 RECEIVER (continued) AC Parameters (cont.) Max.Transmission Rate 120 230 kbps V.10 DRIVER DC Parameters Outputs Open Circuit Voltage Test-Terminated Voltage Short-Circuit Current Power-Off Current AC Parameters Outputs Transition Time Propagation Delay tPHL tPLH Max.Transmission Rate ±4.0 0.9VOC 50 50 120 ±150 ±100 Volts Volts mA µA 200 ns 500 500 ns ns kbps ±5.0 0.67VOC ±0.4 +3.0 ±150 ±100 Volts Volts Volts Volts Volts mA µA 25 ns 115 115 40 ns ns ns ±6.0 100 100 per Figure 9 per Figure 10 per Figure 11 per Figure 12 VCC = +5V for AC parameters per Figure 10; 10% to 90% V.11 DRIVER DC Parameters Outputs Open Circuit Voltage Test Terminated Voltage Balance Offset Short-Circuit Current Power-Off Current AC Parameters Outputs Transition Time Propagation Delay tPHL tPLH Differential Skew Max.Transmission Rate ±2.0 0.5VOC 50 50 80 80 20 10 Mbps per Figure 14 per Figure 15 per Figure 15 per Figure 15 per Figure 16 per Figure 17 VCC = +5V for AC parameters per Figures 19 and 24; 10% to 90% Using RL = 100Ω and CL = 50pF; per Figures 21 and 24 per Figures 21 and 24 per Figures 21 and 24, tSKEW = | tDPLH - tDPHL | V.11 RECEIVER DC Parameters Inputs Common Mode Range Sensitivity Rev: C Date:2/1/06 –7 +7 ±0.38 Volts Volts SP526 Multi–Mode Serial Transceiver 3 © Copyright 2006 Sipex Corporation ELECTRICAL CHARACTERISTICS TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS +3.25 mA kΩ CONDITIONS V.11 RECEIVER (continued) DC Parameters (cont.) Input Current Input Impedance AC Parameters Propagation Delay tPHL tPLH Differential Skew Max. Transmission Rate –3.25 4 80 80 110 110 20 160 160 ns ns ns Mbps 5.00 5.25 Volts 35 130 105 4 45 150 130 mA mA mA µA +70 +150 °C °C 10 per Figure 18 and 20 VCC = +5V for AC parameters Using RL = 100Ω and CL = 50pF; per Figure 21 and 26 per Figure 21 and 26 per Figure 21, tSKEW = | tPLH - tPHL | POWER REQUIREMENTS VCC ICC 4.75 (V.28/RS-232) (V.11/RS-422) (EIA-530/RS-449) (Shutdown) All ICC values are with VCC = +5V fIN = 120kbps; Drivers active & loaded. fIN = 2.1Mbps; Drivers active & loaded. fIN = 1.0Mbps; Drivers active & loaded. D0 = D1 = 0V, refer to Table 1 ENVIRONMENTAL AND MECHANICAL Operating Temperature Range Storage Temperature Range Rev: C Date:2/1/06 - 0 –65 SP526 Multi–Mode Serial Transceiver 4 © Copyright 2006 Sipex Corporation OTHER AC CHARACTERISTICS TA = +25°C and VCC = +5.0V unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS DRIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE RS-232/V.28 DRIVERS tPZL; Tri-state to Output LOW 0.70 5.0 µs tPZH; Tri-state to Output HIGH 0.40 2.0 µs tPLZ; Output LOW to Tri-state 0.20 2.0 µs tPHZ; Output HIGH to Tri-state 0.40 2.0 µs RS-423/V.10 DRIVERS tPZL; Tri-state to Output LOW 0.15 2.0 µs tPZH; Tri-state to Output HIGH 0.20 2.0 µs tPLZ; Output LOW to Tri-state 0.20 2.0 µs tPHZ; Output HIGH to Tri-state 0.15 2.0 µs RS-422,/V.11 DRIVERS tPZL; Tri-state to Output LOW 2.80 10.0 µs tPZH; Tri-state to Output HIGH 0.10 2.0 µs tPLZ; Output LOW to Tri-state 0.10 2.0 µs tPHZ; Output HIGH to Tri-state 0.10 2.0 µs CONDITIONS CL = 100pF, Fig. 22 & 28 ; S1 closed CL = 100pF, Fig. 22 & 28 ; S2 closed CL = 100pF, Fig. 22 & 28 ; S1 closed CL = 100pF, Fig. 22 & 28 ; S2 closed CL = 100pF, Fig. 22 & 28 ; S1 closed CL = 100pF, Fig. 22 & 28 ; S2 closed CL = 100pF, Fig. 22 & 28 ; S1 closed CL = 100pF, Fig. 22 & 28 ; S2 closed CL = 100pF, Fig. 22 & 25; S1 closed CL = 100pF, Fig. 22 & 25; S2 closed CL = 15pF, Fig. 22 & 25; S1 closed CL = 15pF, Fig. 22 & 25; S2 closed RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE RS-232/V.28 RECEIVERS tPZL; Tri-state to Output LOW 0.12 2.0 µs CL = 100pF, Fig. 23 & 27 ; S1 closed tPZH; Tri-state to Output HIGH 0.10 2.0 µs CL = 100pF, Fig. 23 & 27 ; S2 closed tPLZ; Output LOW to Tri-state 0.10 2.0 µs CL = 100pF, Fig. 23 & 27 ; S1 closed tPHZ; Output HIGH to Tri-state 0.10 2.0 µs CL = 100pF, Fig. 23 & 27 ; S2 closed RS-422/V.11RECEIVERS tPZL; Tri-state to Output LOW 0.10 2.0 µs CL = 100pF, Fig. 23 & 27; S1 closed tPZH; Tri-state to Output HIGH 0.10 2.0 µs CL = 100pF, Fig. 23 & 27; S2 closed tPLZ; Output LOW to Tri-state 0.10 2.0 µs CL = 15pF, Fig. 23 & 27; S1 closed tPHZ; Output HIGH to Tri-state 0.10 2.0 µs CL = 15pF, Fig. 23 & 27; S2 closed Rev: C Date:2/1/06 SP526 Multi–Mode Serial Transceiver 5 © Copyright 2006 Sipex Corporation 44 43 42 41 40 39 38 37 36 35 34 GND R1INA R1INB R2INA R2INB R3INA R3INB R4INA R4INB R1OUT R2OUT PINOUT 1 2 3 4 5 6 7 8 9 10 11 SP526 33 32 31 30 29 28 27 26 25 24 23 R3OUT R4OUT VCC T4OUT T3OUTA T3OUTB T2OUTA T2OUTB T1OUTA T1OUTB GND ENT1 D1 D0 VSS C2C1GND C2+ VDD C1+ VCC 12 13 14 15 16 17 18 19 20 21 22 ENR4 ENR3 ENR2 ENR1 T4IN T3IN T2IN T1IN ENT4 ENT3 ENT2 PIN DESCRIPTION Pin 1 — ENR4 — Enables receiver 4; active high; TTL input. Pin 8 — T1IN — TTL input; transmit data source for DRA1 and DRB1 outputs. Pin 2 — ENR3 — Enables receiver 3; active high; TTL input. Pins 9 — ENT4 — Enables driver 4, active low; TTL input. Pin 3 — ENR2 — Enables receiver 2; active high; TTL input. Pins 10 — ENT3 — Enables driver 3, active low; TTL input. Pin 4 — ENR1 — Enables receiver 1; active high; TTL input. Pins 11 — ENT2 — Enables driver 2, active low; TTL input. Pin 5 — T4IN — TTL input; transmit data source for DRA4 and DRB4 outputs. Pins 12 — ENT1 — Enables driver 1, active low; TTL input. Pin 6 — T3IN — TTL input; transmit data source for DRA3 and DRB3 outputs. Pins 13 — D1 — Transmitter and receiver decode register; configures transmitter and receiver modes; TTL inputs. Pin 7 — T2IN — TTL input; transmit data source for DRA2 and DRB2 outputs. Rev: C Date:2/1/06 - SP526 Multi–Mode Serial Transceiver 6 © Copyright 2006 Sipex Corporation Pins 14 — D0 — Transmitter and receiver decode register; configures transmitter and receiver modes; TTL inputs. Pin 31 — VCC — +5V input. Pin 32 — R4OUT — TTL output; sourced from RINA4 and RINB4 inputs. Pin 15 — VSS — –10V Charge Pump Capacitor — Connects from ground to VSS. Suggested capacitor size is 1.0µF, 16V. Pin 33 — R3OUT — TTL output; sourced from RINA3 and RINB3 inputs. Pin 34 — R2OUT — TTL output; sourced from RINA2 and RINB2 inputs. Pin 16 — C2– — Charge Pump Capacitor — Connects from C2+ to C2–. Suggested capacitor size is 1.0µF, 16V. Pin 35 — R1OUT — TTL output; sourced from RINA1 and RINB1 inputs. C1– Pin 17 — — Charge Pump Capacitor — Connects from C1+ to C1–. Suggested capacitor size is 1.0µF, 16V. Pin 36 — R4INB — Non-inverted analog input to receiver 4. Pin 18 — GND — Ground. Pin 37 — R4INA — Inverted analog input to receiver 4. Pin 19 — C2+ — Charge Pump Capacitor — Connects from C2+ to C2–. Suggested capacitor size is 1.0µF, 16V. Pin 38 — R3INB — Non-inverted analog input to receiver 3. Pin 20 — VDD — +10V Charge Pump Capacitor — Connects from VDD to VCC. Suggested capacitor size is 1.0µF, 16V. Pin 39— R3INA — Inverted analog input to receiver 3. Pin 40 — R2INB — Non-inverted analog input to receiver 2. Pin 21 — C1+ — Charge Pump Capacitor — Connects from C1+ to C1–. Suggested capacitor size is 1.0µF, 16V. Pin 41 — R2INA — Inverted analog input to receiver 2. Pin 22 — VCC — +5V input. Pin 23 — GND — Ground. Pin 42 — R1INB — Non-inverted analog input to receiver 1. Pin 24 — T1OUTB — Analog Out — Send data, non-inverted; sourced from TIN1. Pin 43 — R1INA — Inverted analog input to receiver 1. Pin 25 — T1OUTA — Analog Out — Send data, inverted; sourced from TIN1. Pin 44 — GND — Ground. Pin 26 — T2OUTB — Analog Out — Send data, non-inverted; sourced from TIN2. Pin 27 — T2OUTA — Analog Out — Send data, inverted; sourced from TIN2. Pin 28 — T3OUTB — Analog Out — Send data, non-inverted; sourced from TIN3. Pin 29 — T3OUTA — Analog Out — Send data, inverted; sourced from TIN3. Pin 30 — T4OUT — Analog Out — Send data, inverted; sourced from TIN4. Rev: C Date:2/1/06 SP526 Multi–Mode Serial Transceiver 7 © Copyright 2006 Sipex Corporation TEST CIRCUITS A A VOC VT 3kΩ C C Figure 1. V.28 Driver Output Open Circuit Voltage Figure 2. V.28 Driver Output Loaded Voltage A A VT 7kΩ Isc Oscilloscope C C Scope used for slew rate measurement. Figure 4. V.28 Driver Output Short-Circuit Current Figure 3. V.28 Driver Output Slew Rate VCC = 0V A A Ix 3kΩ 2500pF Oscilloscope ±2V C C Figure 6. Driver Output Rise/Fall Times Figure 5. V.28 Driver Output Power-Off Impedance Rev: C Date:2/1/06 - SP526 Multi–Mode Serial Transceiver 8 © Copyright 2006 Sipex Corporation A A Iia ±15V Voc C C Figure 7. V.28 Receiver Input Impedance Figure 8. V.28 Receiver Input Open Circuit Bias A A 3.9kΩ VOC Vt 450Ω C C Figure 9. V.10 Driver Output Open-Circuit Voltage Figure 10. V.10 Driver Output Test Terminated Voltage VCC = 0V A A Isc Ix ±0.25V C C Figure 11. V.10 Driver Output Short-Circuit Current Rev: C Date:2/1/06 Figure 12. V.10 Driver Output Power-Off Current SP526 Multi–Mode Serial Transceiver 9 © Copyright 2006 Sipex Corporation A VOCA A 3.9kΩ VOC VOCB Oscilloscope 450Ω B C C Figure 13. V.10 Driver Output Transition Time Figure 14. V.11 Driver Output Open-Circuit Voltage A Isa A 50Ω VT 50Ω B B Isb VOS C C Figure 15. V.11 Driver Output Test Terminated Voltage Rev: C Date:2/1/06 - Figure 16. V.11 Driver Output Short-Circuit Current SP526 Multi–Mode Serial Transceiver 10 © Copyright 2006 Sipex Corporation VCC = 0V A Iia A ±10V Ixa ±0.25V B B C C VCC = 0V A A ±10V ±0.25V Ixb B Iib B C C Figure 18. V.11 Receiver Input Current Figure 17. V.11 Driver Output Power-Off Current V.11 RECEIVER +3.25mA A 50Ω Oscilloscope –10V 50Ω B 50Ω VE –3V +3V +10V Maximum Input Current versus Voltage C –3.25mA Figure 19. V.11 Driver Output Rise/Fall Time Rev C Date:2/1/06 Figure 20. V.11 Receiver Input IV Graph SP526 Multi–Mode Serial Transceiver 11 © Copyright 2006 Sipex Corporation CL1 DI A A RL B Output Under Test RO B CL2 15pF CL Figure 22. Driver Timing Test Load Circuit 1KΩ Test Point V CC S1 CRL VCC S2 Figure 21. Driver/Receiver Timing Test Circuit Receiver Ou tpu t S1 500Ω 1KΩ S2 Figure 23. Receiver Timing Test Load Circuit f = 1MHz; tR ≤ 10ns; tF ≤ 10ns +3V DRIVER INPUT DRIVER OUTPUT 1.5V 0V A 1.5V tPLH tPHL VO 1/2VO 1/2VO B tDPHL DIFFERENTIAL VO+ OUTPUT 0V VA – VB VO– tDPLH tR tF tSKEW = |tDPLH - tDPHL| Figure 24. Driver Propagation Delays +3V or Tx_E nable DXDEC or TXX_Enable 0V A, B 5V f = 1MHz; tR < 10ns; tF < 10ns 1.5V 1.5V tZL 2.3V V OL V OH A, B 2.3V 0V tLZ Output normally LOW 0.5V Output normally HIGH 0.5V tZH tHZ Figure 25. V.11 Driver Enable and Disable Times Rev: C Date:2/1/06 - SP526 Multi–Mode Serial Transceiver 12 © Copyright 2006 Sipex Corporation f = 1MHz; tR ≤ 10ns; tF ≤ 10ns VOD2+ 0V A–B VOD2– VOH RECEIVER OUT VOL 0V INPUT 50% 50% OUTPUT tPLH tPHL tSKEW = |tPHL - tPLH| Figure 26. Receiver Propagation Delays f = 1MHz; tR ≤ 10ns; tF ≤ 10ns DECX +3V D0 or D1 1.5V 0V 1.5V tZL 5V RECEIVER OUT VIL 50% VIH RECEIVER OUT 0V 50% tLZ Output normally LOW 0.5V Output normally HIGH 0.5V tZH tHZ Figure 27. Receiver Enable and Disable Times f = 60kHz; tR < 10ns; tF < 10ns +3V DX or ENTX TOUT VOL(MIN) tLZ tZL 0V 0.5V f = 60kHz; tR < 10ns; tF < 10ns 1.5V 1.5V 0V tZH VOH(MIN) TOUT 0.5V Output LOW +3V DX or ENTX 1.5V 1.5V 0V Output HIGH tHZ 0.5V 0.5V 0V Figure 28. V.28 (RS-232) and V.10 Driver Enable and Disable Times Rev: C Date:2/1/06 SP526 Multi–Mode Serial Transceiver 13 © Copyright 2006 Sipex Corporation +5V 1.0µF 1.0µF 22 1.0µF 1.0µF VCC 21 C1+ 31 VCC VDD 17 C1– VSS SP526 19 C2+ T1IN 15 1.0µF 16 C2– 8 20 T1 25 T1OUTA 24 T1OUTB T2 27 T2OUTA 26 T2OUTB T3 29 T3OUTA 28 T3OUTB T4 30 T4OUT 12 ENT1 7 T2IN 11 ENT2 6 T3IN 10 ENT3 5 T4IN 9 ENT4 35 R1OUT R1 43 R1INA 42 R1INB R2 41 R2INA 40 R2INB R3 39 R3INA 38 R3INB R4 37 R4INA 36 R4INB 4 ENR1 34 R2OUT 3 ENR2 33 R3OUT 2 ENR3 32 R4OUT 1 ENR4 14 D0 GND GND 18 23 GND 13 D1 44 Figure 29. Typical Operating Circuit for the SP526 Rev: C Date:2/1/06 - SP526 Multi–Mode Serial Transceiver 14 © Copyright 2006 Sipex Corporation FEATURES THEORY OF OPERATION The SP526 contains highly integrated serial transceivers that offer programmability between interface modes through software control. The SP526 offers the hardware interface modes for RS-232 (V.28), RS-423 (V.10), RS-422 (V.11), and RS-485. The interface mode selection is done via two control pins. The SP526 device is made up of 1) the drivers, 2) the receivers, and 3) a charge pump. Drivers The SP526 has four enhanced independent drivers. Control for the mode selection is done via a two–bit control word into DP0 and DP1. The drivers are prearranged such that for each mode of operation, the relative position and functionality of the drivers are set up to accommodate the selected interface mode. As the mode of the drivers is changed, the electrical characteristics will change to support the required signal levels. The mode of each driver in the different interface modes that can be selected is shown in Table 1. The SP526 has four drivers, four receivers, and an on-board charge pump that is ideally suited for low-cost wide area network connectivity and other multi-protocol applications. Based on our multi-mode SP500 family, Sipex has allocated specific transceiver cells, or "building blocks," from this product series and created the SP526. Sipex's "building blocks" concept allows these small transceiver cells to be packaged to offer a simple low-cost solution to networking applications that need only 4 interface modes. For example, an 8-channel applications requiring eight serial transceivers can be achieved implementing two SP526 devices. The SP526 can be implemented in series with other devices in our SP500 family. A 9-channel network application can be achieved implementing the SP505 which contains seven transceivers in conjunction with the SP526. There are four basic types of driver circuits — RS-232 (V.28), RS-423 (V.10), RS-422 (V.11), and RS-485. The RS-232 (V.28) drivers output single–ended signals with a minimum of 5V (with 3K & 2500pF loading), and can operate to at least 120Kbps. Since the SP526 uses a charge pump to generate the RS-232 output rails, the driver outputs will never exceed 10V. The RS-423 (V.10) drivers are also single– ended signals which produce open circuit VOL D1 D0 and VOH measurements of 4.0V to 6.0V. DRIVERS RECEIVERS When terminated with a 450 load to ground, T1 T2 T3 T4 w R1 R2 R3 R4 the driver output will not deviate more than 10% 0 0 SHUTDOWN - Tx and Rx Outputs in Tri-State of Mode the open circuit value. This is in compliance 0 1 V.11 V.11 V.11 V.10 V.11 V.11 V.11 V.11 1 0 V.11 V.11 V.10 V.10 V.11 V.11 V.11 V.11 1 1 V.28 V.28 V.28 V.28 V.28 V.28 V.28 V.28 Table 1. SP526 Driver and Receiver D1 DRIVMode ERSSelection with the Control Lines RE CE IVand ERSD0 D1 D0 0 D0 D1 00 0 11 1 1 0 1 0 1 T1 T2 T3 T4 R1 R2 R3 0 SHUTDrivers DOWN - Tx and Rx Outputs in Tri-SReceivers tate Mode T1A T1B T2A T2B T3A T3B T4 R1A R1B R2A R2B R3A R3B 1 V.11 V.11 V.11 High V.1Z0 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.10 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 V.11 .11 V.11V.V.10 11 V.10 V.1V.10 0 V.11 V.1V.11 0 V.11V.11 V.11 V.11V.11 0 V.11 V V.28 X V.28 X V.28 X V.28 V.28 X V.28 X V.28 X 1 V.28 V.28 V.28 V.28 V.28 V.28 R4 R4A R4B V.11 V.11 V.28 V.28 V.11 V.11 VV.11 .11 V.11V.11 V.28 X Table 1. SP526 Driver and Receiver Mode Selection with the Control Lines D1 and D0 Rev: C Date:2/1/06 SP526 Multi–Mode Serial Transceiver 15 R1A © Copyright 2006 Sipex Corporation Receivers of the ITU V.10 specification. The RS-423 drivers are used in RS-449, EIA-530, EIA-530A and V.36 modes as Category II signals from each of their corresponding specifications. The SP526 has four independent receivers which can be programmed for the different interface modes. Control for the mode selection is done via a two–bit control word that is the same as the driver control word. Therefore, if the modes for the drivers and receivers are supposed to be identical in the application, the control lines can be tied together. The third and fourth type of drivers are RS-422 (V.11)/RS-485 type differential drivers. Due to the nature of differential signaling, the drivers are more immune to noise as opposed to singleended transmission methods. The advantage is evident over high speeds and long transmission lines. The strength of the driver outputs can produce differential signals that can maintain RS-485, ±1.5V differential output levels with a worst case load of 54Ω. The signal levels and drive capability of these drivers allow the drivers to also support RS-422 (V.11) requirements of ±2V differential output levels with 100Ω loads. The driver is designed to operate over a common mode range of +7V to -7V which follows the V.11 specification. The RS-422 drivers are used in RS-449, EIA-530, EIA-530A and V.36 modes as Category I signals which are used for clock and data. All of the differential drivers can operate to at least 10Mbps. Like the drivers, the receivers are prearranged for the specific requirements of the synchronous serial interface. As the operating mode of the receivers is changed, the electrical characteristics will change to support the required serial interface protocols of the receivers. Table 1 shows the mode of each receiver in the different interface modes that can be selected. There are two basic types of receiver circuits — RS-232 (V.28) and RS-422 (V.11). The RS-232 (V.28) receiver is single–ended and accepts RS-232 signals from the RS-232 driver. The RS-232 receiver has an operating voltage range of ±15V and can receive signals downs to ±3V. The input sensitivity complies with RS232 and V.28 at ±3V. The input impedance is 3kΩ to 7kΩ in accordance to RS-232 and V.28. The receiver output produces a TTL/CMOS signal with a +2.4V minimum for a logic "1" and a +0.8V maximum for a logic "0". RS-232(V.28) receivers can be used in RS-232 mode for data, clock or control signals. They are also used in V.35 mode for control line signals: CTS, DSR, LL, and RL. The RS-232 receivers can operate to at least 120kbps. The drivers also have separate enable pins which simplifies half-duplex configurations for some applications and also provides simpler DTE/ DCE flexibility with one integrated circuit. The enable pins will tri-state the drivers when the ENT1, ENT2, ENT3, and ENT4 pins are at a logic HIGH ("1"). During tri-stated conditions, the driver outputs will be at a high impedance state. The driver inputs are both TTL or CMOS compatible. Each driver input should have a pulldown or pull-up resistor so that the output will be at a defined state. Unused driver inputs should have pull-up resistors to +5V connected so that the output is at a logic LOW ("0"). Unused driver inputs should not be left floating. For differential drivers, the non-inverting output will be at a logic HIGH ("1"). The typical pull-up resistor value should be 400kΩ. Rev: C Date:2/1/06 - SP526 Multi–Mode Serial Transceiver 16 © Copyright 2006 Sipex Corporation The third type of receiver is a differential which supports RS-422/V.11 signals. This receiver has a typical input impedance of 10KΩ and a differential threshold of ±0.3V, which complies with the RS-422/V.11 specifications. Since the characteristics of the RS-422 (V.11) receivers are actually subsets of RS-485, the RS-422/ V.11 receivers can accept RS-485 signals. However, these receivers cannot support 32 transceivers on the signal bus due to the lower input impedance as specified in the RS-485 specifications. V.11 receivers are used in RS-422, RS-449, EIA-530, EIA-530A and V.36 as Category I signals for receiving clock, data, and some control line signals not covered by Category II V.10 circuits. The differential receivers can receive signals up to at least 10Mbps. Charge Pump The charge pump is a Sipex–patented design (U.S. 5,306,954) and uses a unique approach compared to older less–efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical 10V power supplies. There is a free–running oscillator that controls the four phases of the voltage shifting. A description of each phase follows. Phase 1 — VSS charge storage —During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to +5V. Cl+ is then switched to ground and the charge in C1– is transferred to C2–. Since C2+ is connected to +5V, the voltage potential across capacitor C2 is now 10V. All four receivers include an enable line for tri-state of the receiver output allowing convenient half-duplex configurations. When the enable lines are at a logic LOW ("0") active, the receiver outputs are high impedance and will be at approximately 10kΩ during tri-state. Phase 2 — VSS transfer — Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to ground, and transfers the generated –l0V to C 3 . Simultaneously, the positive side of capacitor C 1 is switched to +5V and the negative side is connected to ground. All receivers include a fail-safe feature that outputs a logic high when the receiver inputs are open. For single-ended RS-232 receivers, there are internal 5kΩ pull-down resistors on the inputs which produces a logic high ("1") at the receiver outputs. The single-ended RS-423 receivers produce a logic LOW ("0") on the output when the inputs are open. This is due to a pull-up device connected to the input. The differential receivers have the same internal pull-up device on the non-inverting input which produces a logic HIGH ("1") at the receiver output. Phase 3 — VDD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C1 produces –5V in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at +5V, the voltage potential across C2 is l0V. VCC = +5V +5V C1 + -5V C2 + -5V C4 + - VDD Storage Capacitor - + V Storage Capacitor SS C3 Figure 30. Charge Pump — Phase 1 Rev: C Date:2/1/06 SP526 Multi–Mode Serial Transceiver 17 © Copyright 2006 Sipex Corporation VCC = +5V C4 C1 + - + - C2 -10V + - VDD Storage Capacitor - + V Storage Capacitor SS C3 Figure 31. Charge Pump — Phase 2 +10V + 2 a) C GND GND b) C – 2 –10V Figure 32. Charge Pump Waveforms VCC = +5V +5V C1 + - + - C2 -5V -5V C4 + - VDD Storage Capacitor - + V Storage Capacitor SS C3 Figure 33. Charge Pump — Phase 3 VCC = +5V +10V C1 + - C2 + - C4 + - VDD Storage Capacitor - + V Storage Capacitor SS C3 Figure 34. Charge Pump — Phase 4 Rev: C Date:2/1/06 - SP526 Multi–Mode Serial Transceiver 18 © Copyright 2006 Sipex Corporation Phase 4 — VDD transfer — The fourth phase of the clock connects the negative terminal of C2 to ground, and transfers the generated l0V across C2 to C4, the VDD storage capacitor. Again, simultaneously with this, the positive side of capacitor C1 is switched to +5V and the negative side is connected to ground, and the cycle begins again. There are different methods of ESD testing applied: a) MIL-STD-883, Method 3015.7 b) IEC1000-4-2 Air-Discharge c) IEC1000-4-2 Direct Contact The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD-883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body’s potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 35. This method will test the IC’s capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. Since both V+ and V– are separately generated from VCC; in a no–load condition V+ and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 15kHz. The external capacitors can be as low as 1.0µF with a 16V breakdown voltage rating. The IEC-1000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and systems. For system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside environment and human presence. The premise with IEC1000-4-2 is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. The transceiver IC receives most ESD Tolerance The SP526 device incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The improved ESD tolerance is at least ±15kV without damage nor latch-up. RC RS SW SW2 CS DC Power Source Device Under Test Figure 35. ESD Test Circuit for Human Body Model Rev: C Date:2/1/06 SP526 Multi–Mode Serial Transceiver 19 © Copyright 2006 Sipex Corporation Contact-Discharge Module RS RC RV SW1 SW2 Device Under Test CS DC Power Source RS and RV add up to 330Ω for IEC1000-4-2 Figure 36. ESD Test Circuit for IEC1000-4-2 of the ESD current when the ESD source is applied to the connector pins. The test circuit for IEC1000-4-2 is shown on Figure 36. There are two methods within IEC1000-4-2, the Air Discharge method and the Contact Discharge method. 30A With the Air Discharge Method, an ESD voltage is applied to the equipment under test (EUT) through air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. The high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. This energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. Variables with an air discharge such as approach speed of the object carrying the ESD 15A 0A t=0nS t=30nS t Figure 37. ESD Test Waveform for IEC1000-4-2 Device Pin Tested Human Body Model Air Discharge Driver Outputs Receiver Inputs ±15kV ±15kV ±15kV ±15kV IEC1000-4-2 Direct Contact ±8kV ±8kV Level 4 4 Table 2. Transceiver ESD Tolerance Levels Rev: C Date:2/1/06 - SP526 Multi–Mode Serial Transceiver 20 © Copyright 2006 Sipex Corporation potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed. For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5kΩ an 100pF, respectively. For IEC-1000-42, the current limiting resistor (RS) and the source capacitor (CS) are 330Ω an 150pF, respectively. The Contact Discharge Method applies the ESD current directly to the EUT. This method was devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transferred without the air-gap arc. In situations such as hand held systems, the ESD charge can be directly discharged to the equipment from a person already holding the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC. The higher CS value and lower RS value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on. The lower current limiting resistor increases the current charge onto the test point. NET1/NET2 European Compliancy As with all of Sipex's previous multi-protocol serial transceiver ICs, the drivers and receivers have been designed to meet all the requirements to NET1/NET2. The SP526 is also tested and adheres to all the NET1/2 physical layer testing and the ITU Series V specifications. Please note that although the SP526, as with its predecessors, adheres to NET1/2 testing, any complex or unusual configuration should be double-checked to ensure NET compliance. Consult the factory for details. The circuit models in Figures 35 and 36 represent the typical ESD testing circuits used for all three methods. The CS is initially charged with the DC power supply when the first switch (SW1) is on. Now that the capacitor is charged, the second switch (SW2) is on while SW1 switches off. The voltage stored in the capacitor is then applied through RS, the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW2 switch is pulsed so that the device under test receives a duration of voltage. Rev: C Date:2/1/06 SP526 Multi–Mode Serial Transceiver 21 © Copyright 2006 Sipex Corporation PACKAGE:44 PIN LQFP 0.2 RAD. MAX. D c D1 0.08 RAD. MIN. Pin 1 11° - 13° E1 CL 0° Min E 0°–7° 11° - 13° -D- L L1 CL A2 A b DIMENSIONS Minimum/Maximum (mm) SYMBOL A1 e 44–PIN LQFP JEDEC MS-026 (BCB) Variation MIN NOM MAX A c 0.11 0.15 L 0.73 L1 0.05 A2 1.35 1.40 1.45 b 0.30 0.37 0.50 D D1 10.00 BSC e 0.80 BSC E 12.00 BSC E1 10.00 BSC N 44 COMMON DIMENTIONS SYMBL MIN 1.60 A1 12.00 BSC Seating Plane NOM MAX 23.00 0.88 1.03 0.25 BASIC 44 PIN LQFP Rev: C Date:2/1/06 - SP526 Multi–Mode Serial Transceiver 22 © Copyright 2006 Sipex Corporation ORDERING INFORMATION Part Number Temperature Range Package Types SP526CF------------------------------------------------------------- 0° C to +70°C------------------------------------------------------------------- 44–pin JEDEC LQFP Please consult the factory for pricing and availability on a Tape-On-Reel option. Available in lead free packaging. To order add “-L” suffix to part number. Example: SP526CF = standard; SP526CF-L = lead free REVISION HISTORY DATE 1/27/04 7/7/04 2/1/06 REVISION A B C DESCRIPTION Implemented tracking revision. Available in LQFP package. Added table describing pin function in different modes. Corporation SOLVED BY SIPEX Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Rev: C Date:2/1/06 SP526 Multi–Mode Serial Transceiver 23 © Copyright 2006 Sipex Corporation Date 29-Nov-05 Changes Implemented Changing links and metatags for more suitable search engine results. 06-Dec-05 Ordering information can't have dots, must have dashes. 11-Jan-06 Added "Solved by Sipex tm" @ end 02-Feb-06 Added modes table. POD This information is not to be given out to customers. Input Source Brad Hudon Mark Levi Kevin O'Malley Mike Delurio