SP690A/692A/802L/
802M/805L/805M
®
Low Power Microprocessor Supervisory
with Battery Switch-Over
FEATURES
■ Precision Voltage Monitor:
SP690A/SP802L/SP805L at 4.65V
SP692A/SP802M/SP805M at 4.40V
■ Reset Time Delay - 200ms
■ Watchdog Timer - 1.6 sec timeout
■ Minimum component count
■ 60µA Maximum Operating Supply Current
■ 0.6µA Maximum Battery Backup Current
■ 0.1µA Maximum Battery Standby Current
■ Power Switching
250mA Output in VCC Mode (0.6Ω)
25mA Output in Battery Mode (5Ω)
■ Voltage Monitor for Power Fail or
Low Battery Warning
■ Available in 8 pin SO and DIP packages
■ RESET asserted down to VCC = 1V
VOUT
1
8 PIN NSOIC
8
VBATT
VCC
2
7
RESET (RESET)*
GND
3
6
WDI
PFI
4
5
PFO
*SP805 only
Now Available in Lead Free Packaging
■ Pin Compatible Upgrades to
MAX690A/692A/802L/802M/805L
APPLICATIONS
■ Critical µP Power Monitoring
■ Intellegent Instruments
■ Computers
■ Controllers
DESCRIPTION
The SP690A/692A/802L/802M/805L/805M are a family of microprocessor (µP) supervisory
circuits that integrate a myriad of components involved in discrete solutions to monitor powersupply and battery-control functions in µP and digital systems. The series will significantly
improve system reliability and operational efficiency when compared to discrete solutions.
The features of the SP690A/692A/802L/802M/805L/805M include a watchdog timer, a µP
reset and backup-battery switchover, and power-failure warning, a complete µP monitoring
and watchdog solution. The series is ideal for applications in automotive systems, computers,
controllers, and intelligent instruments. All designs where it is critical to monitor the power
supply to the µP and it’s related digital components will find the series to be an ideal solution.
PART NUMBER
RESET
Threshold
RESET
Accuracy
RESET Active
PFI Accuracy
SP690A
4.65 V
125mV
LOW
4%
SP692A
4.40 V
125mV
LOW
4%
SP802L
4.65 V
75mV
LOW
2%
SP802M
4.40 V
75mV
LOW
2%
SP805L
4.65 V
125mV
HIGH
4%
SP805M
4.40 V
125mV
HIGH
4%
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time
may affect reliability and cause permanent damage to
the device.
VCC........................................................-0.3V to 6.0V
VBATT.....................................................-0.3V to 6.0V
All Other Inputs (NOTE 1)..................-0.3V to (VCC to 0.3V)
Input Current:
VCC.........................................................250mA
VBATT........................................................50mA
GND........................................................20mA
Output Current:
VOUT.....Short-Circuit Protected for up to 10sec
All Other Inputs.................................20mA
Rate of Rise, VCC,VBATT..................100V/µs
Continuous Power Dissipation.......500mW
Storage Temperature.......-65°C to +160°C
Lead Temperature(soldering,10sec).................+300°C
ESD Rating.............................................................4KV
ELECTRICAL CHARACTERISTICS
Vcc=4.75v to 5.50V for SP690A/SP802L/SP805L, VCC=4.50V to 5.50V for SP692A/SP802M/SP805M, VBATT=2.80V, TA=TMIN to TMAX, typical specified at 25OC,
unless otherwise noted.
PARAMETERS
MIN.
Operating Voltage Range,
TYP.
MAX.
UNITS
5.5
Volts
35
60
µA
0.001
0.6
µA
0.02
µA
0
CONDITIONS
VCC or VBATT, Note 2
Supply Current, ISUPPLY,
ISUPPLY in Battery Backup Mode,
VCC = 0V, VBATT = 2.8V
VBATT Standby Current, NOTE 3
VOUT Output
VOUT in Battery-Backup Mode
VCC < VBATT - 0.2V
-0.1
VCC - 0.03
VCC - 0.15
Volts
IOUT = 50mA
IOUT = 250mA
VBATT -0.15
VBATT - 0.04
VBATT - 0.20
Volts
IOUT = 5mA
IOUT = 25mA
20
-20
mV
Power-up
Power-down
mV
Peak to Peak
Battery Switchover Hysteresis
Date: 11/29/04
VCC > VBATT + 0.2V
VCC - 0.1
Battery Switch Threshold,
VCC to VBATT
Reset Threshold
excluding IOUT
40
4.50
4.65
4.75
SP690A, SP802L, SP805L
4.25
4.55
4.30
4.40
4.50
4.70
4.45
SP692A, SP802M, SP805M
SP802L, TA = +25° C, VCC falling
SP802M, TA = +25° C, VCC falling
Volts
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
ELECTRICAL CHARACTERISTICS
Vcc=4.75v to 5.50V for SP690A/SP802L/SP805L, VCC=4.50V to 5.50V for SP692A/SP802M/SP805M, VBATT=2.80V, TA=TMIN to TMAX, typical specified at 25OC,
unless otherwise noted.
PARAMETERS
MIN.
Reset Threshold Hysteresis
Reset Pulse Width, tRS
RESET Output Voltage,
NOTE 6
MAX.
40
140
200
280
1.00
50
WDI Input Threshold,
VCC = 5V, NOTE 4
3.5
0.1
0.4
0.004
0.3
PFO Output Voltage
Peak to Peak
ms
Volts
ISINK = 3.2mA
ISINK = 50µA, VCC = 1.0
ISOURCE = 4µA, VCC = 1.0V,
Volts
0.1
0.4
1.60
2.25
sec
Volts
50
-50
150
-150
1.200
1.225
1.250
1.250
1.300
1.275
Volts
-25
0.01
25
nA
0.1
0.4
VCC - 1.5
ISOURCE = 800µA
ISINK = 3.2mA
ns
0.8
WDI Input Current
PFI Input Current
mV
0.8
WDI Pulse Width, tWP NOTE 7
PFI Input Threshold
CONDITIONS
ISOURCE = 800µA
VCC - 1.5
Watchdog Timeout, tWD
UNITS
VCC - 1.5
NOTE 5
RESET Output Voltage,
TYP.
µA
Volts
VIL = 0.4V, VIH = (0.8)(VCC)
Logic low
Logic high
WDI =VCC
WDI = 0V
SP690A/692A, SP805L/M
SP802L/M
ISOURCE = 800µA
ISINK = 3.2mA
NOTE 1: The input voltage limits on PFI (pin 4) and WDI (pin 6) may be exceeded if the current into
these pins is limited to less than 10 mA.
NOTE 2: Either VCC or VBATT can go to 0V if the other is greater than 2.0V.
NOTE 3: "-" equals the battery-charging current, "+" equals the battery-discharging current.
NOTE 4: WDI is guaranteed to be in an intermediate, non-logic level state if WDI is floating and VCC
is in the operating voltage range. WDI is internally biased to 35% of VCC with an input impedance of
50KΩ.
NOTE 5: SP690A, SP692A, SP802L, and SP802M only.
NOTE 6: SP805L and SP805M only.
NOTE 7: WDI Minimum Rise/Fall time is 2µs.
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
VBATT
VOUT
1
8
VBATT
VCC
2
7
RESET (RESET)*
GND
3
6
WDI
PFI
4
5
PFO
BATTERY-SWITCHOVER
CIRCUITRY
VCC
RESET
GENERATOR
VOUT
RESET
(RESET)*
1.25V
*( ) SP805 only
3.5V
WATCHDOG
TIMER
WDI
Figure 10. Pinout
PIN ASSIGNMENTS
0.8V
Pin 1 —VOUT — Output Supply Voltage. VOUT
connects to VCC when VCC is greater than
VBATT and VCC is above the reset threshold. When VCC falls below VBATT and
VCC is below the reset threshold, VOUT
connects to VBATT. Connect a 0.1µF
capacitor from VOUT to GND.
PFI
PFO
1.25V
Pin 2 — VCC — +5V Supply Input
*( ) SP805 only
Figure 11. Internal Block Diagram
Pin3 — GND — Ground reference for all signals
Pin 7 for SP805 only — RESET (Active High)–
Reset Output is the inverse of RESET;
when RESET is asserted, the RESET
output voltage = V CC or V BATT ,
whichever is higher.
Pin 4 — PFI — Power-Fail Input. This is the
noninverting input to the power-fail comparator. When PFI is less than 1.25V,
PFO goes low. Connect PFI to GND or
VOUT when not used.
Pin 8 — VBATT — Backup-Battery Input. When
VCC falls below the reset threshold, VBATT
will be switched to VOUT if VBATT is
20mV greater than VCC. When VCC rises
20mV above V BATT , V OUT will be
reconnected to V CC . The 40mV
hysteresis prevents repeated switching if
VCC falls slowly.
Pin 5 — PFO — Power-Fail Output.
Pin 6 — WDI — Watchdog Input. WDI is a
three level input. If WDI remains high or
low for 1.6sec, the internal watchdog timer
triggers a reset. If WDI is left floating or
connected to a high-impedance tri-state
buffer, the watchdog feature is disabled.
The internal watchdog timer clears whenever reset is asserted.
Pin 7 for SP690A/692A/802 only — RESET
(Active Low)– Reset Output. RESET Output goes low whenever VCC falls below
the reset threshold or whenever WDI
remains high or low longer than 1.6
seconds. RESET remains low for 200ms
after VCC crosses the reset threshold
voltage on power-up or after being triggered by WDI.
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
TYPICAL PERFORMANCE CHARACTERISTICS
VCC Supply Current vs.
Temperature (Normal Mode)
2.9
2.4
1.9
1.4
0.9
0
30
60
90
-0.1
-60 -40 -20 0 20 40 60 80 100 120 140
120 150
1.252
1.250
1.248
1.246
-60
VBATT=4.5V
0.7
0.6
0.5
0.4
0.3
-30
0
30
60
90
120
150
-60 -30
Temperature Deg. C
212
600
Reset Delay (mS)
VCC=5V,VBATT=2.8V
500 Soucing Current
400
300
200
0
-60
VCC=0V,VBATT=2.8V
Sink Current
-30
0
30
60
90
30
60
90
120 150
4.70
4.69
4.68
4.67
4.66
4.65
4.64
4.63
4.62
4.61
4.60
120 150
Temperature Deg. C
VCC=0V to 5V Step,
VBATT=2.8V
210
208
206
204
202
200
-60
-30
0
30
60
90
60
90
120 150
120 150
Temperature Deg. C
VBATT=0V
Power Down
SP690A
-60 -30
0
30
60
90
120 150
Temperature Deg. C
Reset Delay
vs. Temperature
Reset Output Resistance
vs. Temperature
100
0
30
Reset Threshold
vs. Temperature
Temperature Deg. C
Battery Current vs. VCC Voltage
VBATT Current(µA) Log Scale
0
-60
VCC=5V
VBATT=0V
0.8
Reset Threshold (V)
Resistance (ohms)
VBATT=2.8V
5
0
Temperature Deg. C
0.9
VBATT=2V
10
-30
VCC to VOUT On
Resistance vs. Temperature
15
VCC=0V
VCC=5V
VBATT=0
NO LOAD ON PFO
1.254
Temperature Deg. C
VBATT to VOUT ON
Resistance vs. Temperature
Resistance (ohms)
1.256
0.4
Temperature Deg. C
Resistance (ohms)
VCC=0V
VBATT=2.8V
PFI Threshold (V)
VCC=5V
VBATT=2.8V
VBATT Current (µA)
VCC Current (µA)
51
47
43
39
35
31
27
23
19
-60 -30
PFI Threshold
vs. Temperature
Battery Supply Current vs.
Temperature (Backup Mode)
IE+2
IE+1
IE+0
IE-1
IE-2
IE-3
IE-4
IE-5
IE-6
IE-7
IE-8
VBATT=2.8V
.0000
VCC (0.5V/div)
5.000
(25oC, unless otherwise noted)
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
1000
1000
VBATT=4.5V
VCC=0V
Slope=5Ω
Voltage Drop(mV)
Voltage Drop(mV)
VCC=4.5V
VBATT=0V
Slope=0.6Ω
100
10
1
1
10
100
100
10
1
1000
1
10
IOUT (mA)
100
IOUT (mA)
Figure 1. VCC to VOUT Vs. Output Current
Figure 2. VBATT to VOUT Vs. Output Current
VCC
VBATT = 0V
TA = +25 C
VCC
VBATT = 0V
TA = 25oC
2V
div
VCC
0V
2KΩ
RESET
RESET
RESET
0V
330pF
GND
1sec/div
Figure 3A. SP690A RESET Output Voltage vs.
Supply Voltage
Figure 3B. Circuit for the SP690A/802L RESET
Output Voltage vs. Supply Voltage
VCC
VCC
VCC
2V
div
0V
5V
RESET
RESET
VBATT
0V
330pF
10KΩ
GND
1sec/div
Figure 4A. SP805L RESET Output Voltage vs.
Supply Voltage
Date: 11/29/04
Figure 4B. Circuit for the SP805 RESET Output
Voltage vs. Supply Voltage
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
VCC
VCC
+5V
TA = +25 C
+4V
VCC
RESET
+5V
10KΩ
RESET
0V
30pF
GND
2µs/div
Figure 5B. Circuit for the SP690A/802L RESET
Response Time
Figure 5A. SP690A RESET Response Time
VCC
+5V
VCC
VCC
+4V
RESET
+4V
RESET
VBATT
0V
330pF
10KΩ
GND
2µs/div
Figure 6B. Circuit for the SP805 RESET
Response Time
Figure 6A. SP805L RESET Response Time
+5V
VCC = 5V
VBATT = 0V
+1.3V
PFI
VCC = +5V
TA = +25 C
+1.2V
5V
1KΩ
PFO
PFI
0V
+1.25V
PFO
30pF
500ns/div
Figure 7B. Circuit for the Power-Fail Comparator
Response Time (FALL)
Figure 7A. Power-Fail Comparator Response Time (FALL)
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
+1.3V
VCC = 5V
VBATT = 0V
PFI
+5V
VCC = +5V
TA = +25 C
+1.2V
PFI
PFO
3V
PFO
+1.25V
0V
30pF
1KΩ
2µs/div
Figure 8A. Power-Fail Comparator Response Time (RISE)
Figure 8B. Circuit for the Power-Fail Comparator
Response Time (RISE)
+5V
VCC
0V
+5V
RESET*
tRS
0V
+5V
RESET**
3.0V
0V
+5V
VOUT
3.0V
0V
PFO
+5V
0V
VBATT = PFI = 3.0V
*SP690A/692A/802L/802M
**SP805L/805M
Figure 9. Timing Diagram
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
FEATURES
THEORY OF OPERATION
The SP690A/692A/802L/802M/805L/805M
provide four key functions:
1. A battery backup switching for CMOS RAM,
CMOS microprocessors, or other logic.
2. A reset output during power-up, power-down
and brownout conditions.
3. A reset pulse if the optional watchdog timer
has not been toggled within a specified time.
4. A 1.25V threshold detector for power-fail
warning, low battery detection, or to monitor a
power supply other than +5V.
The SP690A/692A/802L/802M/805L/805M
microprocessor (µP) supervisory circuits
monitor the power supplied to digital circuits
such as microprocessors, microcontrollers, or
memory. The series is an ideal solution for
portable, battery-powered equipment that
requires power supply monitoring. Implementing
this series will reduce the number of
components and overall complexity. The
watchdog functions of this product family will
continuously oversee the operational status of a
system. The operational features and benefits of
the SP690A/692A/802L/802M/805L/805M are
described in more detail below.
The parts differ in their reset-voltage threshold
levels and reset outputs. The SP690A/802L/
805L generate a reset when the supply voltage
drops below 4.65V. The SP692A/802M/805M
generate a reset below 4.40V.
Reset Output
The microprocessor's (µP's) reset input starts
the µP in a known state. When the µP is in an
unknown state, it should be held in reset. The
SP690A/SP692A/SP802 assert reset during
power-up and prevent code execution errors
during power-down or brownout conditions.
The SP690A/692A/802L/802M/805L/805M
are ideally suited for applications in automotive
systems, intelligent instruments, and batterypowered computers and controllers. All designs
into an environment where it is critical to
monitor the power supply to the µP and it’s
related digital components will find the
SSP690A/692A/802L/802M/805L/805M ideal.
On power-up, once VCC reaches 1V, RESET is
guaranteed to be a logic low. As VCC rises,
RESET remains low. When VCC exceeds the
reset threshold, RESET will remain low for
200ms, Figure 9. If a brownout condition
occurs and VCC dips below the reset threshold,
RESET is triggered. Each time RESET is
triggered, it stays low for the reset pulse width
interval. If a brownout condition interrupts a
previously initiated reset pulse, the reset pulse
continues for another 200ms. On power-down,
once VCC goes below the threshold, RESET is
guaranteed to be logic low until VCC drops
below 1V.
Regulated +5V
Unregulated
DC
0.1µF
VCC
VCC
RESET
µP
NMI
PFO
I/O LINE
WDI
GND
PFI
R2
VOUT
VBATT
RESET is also triggered by a watchdog timeout.
If WDI remains either high or low for a period
that exceeds the watchdog timeout period (1.6
sec), RESET pulses low for 200mS. As long as
RESET is asserted, the watchdog timer remains
clear. When RESET comes high, the watchdog
resumes timing and must be serviced within
1.6sec. If WDI is tied high or low, a RESET
pulse is triggered every 1.8sec (tWD plus tRS).
GND
BUS
CMOS
RAM
R1
RESET
VCC
3.6V
Lithium
Battery
GND
Figure 12. Typical Operating Circuit
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
Power-Fail Comparator
The SP805L/M active-high RESET output is
the inverse of the SP690A/SP692A/SP802 RESET output, and is valid with VCC down to 1V.
Some µP's, such as Intel's 80C51, require an
active-high reset pulse.
The Power-Fail Comparator can be used as an
under-voltage detector to signal the failing of a
power supply (it is completely separate from the
rest of the circuitry and does not need to be
dedicated to this function). The PFI input is
compared to an internal 1.25V reference. If PFI
is less than 1.25V, PFO goes low. The external
voltage divider drives PFI to sense the
unregulated DC input to the +5V regulator. The
voltage-divider ratio can be chosen such that the
voltage at PFI falls below 1.25V just before the
+5V regulator drops out. PFO then triggers an
interrupt which signals the µP to prepare for
power-down.
Watchdog Input
The watchdog circuit monitors the µP's activity.
If the µP does not toggle the watchdog input
(WDI) within 1.6sec, a reset pulse is triggered.
The internal 1.6sec timer is cleared by either a
reset pulse or by floating the WDI input. As long
as RESET is asserted or the WDI input is
floating, the timer remains cleared and does not
count. As soon as RESET is released and WDI
is driven high or low, the timer starts counting.
It can detect pulses as short as 50ns.
When VBATT connects to VOUT, the power-fail
comparator is turned off and PFO is forced low
to conserve backup-battery power.
Backup-Battery Switchover
VBATT
D2
D1
SW1
In the event of a brownout or power failure, it
may be necessary to preserve the contents of
RAM. With a backup battery installed at VBATT,
the RAM is assured to have power if VCC fails.
As long as VCC exceeds the reset threshold,
VOUT connects to VCC through a 0.6Ω PMOS
power switch. Once VCC falls below the reset
threshold, VCC or VBATT, whichever is higher,
switches to VOUT. VBATT connects to VOUT
through a 5Ω switch only when VCC is below the
reset threshold and VBATT is greater than VCC.
VCC
SW2
D3
VOUT
GND
CONDITION
SW1
SW2
VCC > Reset Threshold
Open
Closed
VCC < Reset Threshold and
VCC > VBATT
Open
Closed
VCC < Reset Threshold and
VCC < VBATT
Closed
Open
When VCC exceeds the reset threshold, it is
connected to VOUT, regardless of the voltage
applied to VBATT Figure 13. During this time,
the diode (D1) between VBATT and VOUT will
conduct current from VBATT to VOUT if VBATT is
more than .6V above VOUT.
When VBATT connects to VOUT, backup mode is
activated and the internal circuitry will be powered from the battery Figure 14. When VCC is
just below VBATT, in the backup mode the
current drawn from VBATT will be typically
30µA. When VCC drops to more than 1V below
VBATT, the internal switchover comparator shuts
off and the supply current falls to less than 0.6µA.
Reset Threshold = 4.65V in SP690A/802L/805L
Reset Threshold = 4.40V in SP692A/802M/805M
Figure 13. BACKUP-BATTERY Switchover Block Diagram
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
SIGNAL
STATUS
VCC
+5V
Disconnected from VOUT
VCC
Connected to VBATT through
VOUT
an internal 8Ω PMOS switch
Connected to VOUT. Current
drawn from the battery is
less than 0.6µA, as long as
VCC < VBATT - 1V.
VBATT
PFI
Power-fail comparator is
disabled.
PFO
Logic low
RESET
Logic low
RESET
Logic high (SP805 only)
WDI
GND
If VCC is above the reset threshold and VBATT
is 0.5V above VCC, current flows to VOUT and
VCC from VBATT until the voltage at VBATT is
less than 0.5V above VCC.
Leakage current through the capacitor charging
diode and the SP690A/SP802L/SP805L internal
power diode eventually discharges the capacitor
to VCC. Also, if VCC and VBATT start from 0.5V
above the reset threshold and power is lost at
VCC, the capacitor on VBATT discharges through
VCC until VBATT reaches the reset threshold; the
SP690A/SP802L/SP805L then switches to
battery-backup mode.
Using a High Capacity Capacitor
as a Backup Power Source
VBATT has the same operating voltage range as
VCC, and the battery-switchover threshold voltages are typically +20mV centered at VBATT,
allowing use of a capacitor and a simple charging
circuit as a backup source (see Figure 16).
MAXIMUM
BACKUP-BATTERY
VOLTAGE [V]
+5V
VCC
VOUT
VBATT
4.80
0.1F
SP692A
SP802M
SP805M
GND
4.55
CONNECT TO
STATIC RAM
RESET
(RESET)*
100KΩ
Figure 15. Allowable BACKUP-BATTERY Voltages
Date: 11/29/04
*( ) SP805L only
Figure 16. Backup Power Source Using High Capacity
Capacitor with SP690A/802L/805L and a +5V ±5% Supply
Watchdog timer is disabled
SP690A
SP802L
SP805L
CONNECT
TO µP
RESET
(RESET)*
0.1F
Figure 14. Input and Output Status in Battery-Backup Mode.
To enter the Battery-Backup mode, VCC must be less than the
Reset threshold and less than VBATT.
PART
NUMBER
CONNECT TO
STATIC RAM
VOUT
VBATT
CONNECT
TO µP
*( ) SP805M only
Figure 17. Backup Power Source Using High Capacity
Capacitor with SP692A/802M/805M and a +5V ±10% Supply
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
Operation Without a Backup Power
Source
+5V
VIN
VCC
If a backup power source is not used, ground
VBATT and connect VOUT to VCC. Since there is
no need to switch over to any backup power
source, VOUT does not need to be switched. A
direct connection to VCC eliminates any voltage
drops across the switch which may push VOUT
below VCC.
R1
PFI
R2
*C1
R3
PFO
*optional
connect to µP
GND
VTRIP =
1.25
R2
=
VL - 1.25
+ 5.0 - 1.25
R3
R1
The backup battery can be removed while VCC
remains valid, without danger of triggering
RESET/RESET. As long as VCC stays above the
reset threshold, battery-backup mode cannot be
entered.
1.25
R2 || R3
R1 + R2 || R3
Adding Hysteresis to the Power-Fail
Comparator
VH =
PFO
+5V
0V
0V
Replacing the Backup Battery
1.25
R2
R1 + R2
VL VTRIP VH
Hysteresis adds a noise margin to the power-fail
comparator and prevents repeated triggering of
PFO when VIN is close to its trip point. Figure 18
shows how to add hysteresis to the power-fail
comparator. Select the ratio of R1 and R2 such
that PFI sees 1.25V when VIN falls to its trip
point (VTRIP). R3 adds the hysteresis. It will
typically be an order of magnitude greater (about
10 times) than R1 or R2. The current through R1
and R2 should be at least 1µA to ensure that the
25nA (max) PFI input current does not shift the
trip point. R3 should be larger than 10KΩ so it
does not load down the PFO pin. Capacitor C1
adds additional noise rejection.
VIN
Figure 18. Adding Hysteresis to the POWER-FAIL
Comparator
Allowable Backup Power-Source
Batteries
Lithium batteries work very well as backup
batteries due to very low self-discharge rate and
high energy density. Single lithium batteries
with open-circuit voltages of 3.0V to 3.6V are
ideal. Any battery with an open-circuit voltage
less than the minimum reset threshold plus 0.3V
can be connected directly to the VBATT input of
this series with no additional circuitry; see
FIGURE 12. However, batteries with opencircuit voltages that are greater than this value
cannot be used for backup, as current is sourced
into VOUT through the diode (D1 in Figure 13)
when VCC is close to the reset threshold.
Date: 11/29/04
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor
a negative supply rail using the circuit of Figure
19. When the negative rail is valid, PFO is low.
When the negative supply voltage drops, PFO
goes high. This circuit's accuracy is
affected by the PFI threshold tolerance, the VCC
voltage, and the resistors, R1 and R2.
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
12
© Copyright 2004 Sipex Corporation
+5V
Buffered RESET connects to System Components
VCC
R1
+5V
PFI
+5V
VCC
R2
VCC
PFO
µP
V-
RESET
RESET
4.7KΩ
GND
5.0 - 1.25 = 1.25 - VTRIP
R2
R1
GND
PFO
Figure 20. Interfacing to Microprocessors with
Bidirectional RESET I/O
+5V
*VTRIP
0V
0V
GND
V-
*VTRIP is a negative voltage
Figure 19. Monitoring a Negative Voltage
Interfacing to Microprocessors with
Bidirectional Reset Pins
Microprocessors with bidirectional reset pins,
such as the Motorola 68HC11 series, can contend with this series' RESET output. If, for
example, the RESET output is driven high and
the µP wants to pull it low, indeterminate logic
levels may result. To correct this, connect a
4.7KΩ resistor between the RESET output and
the µP reset I/O, as in Figure 20. Buffer the
RESET output to other system components.
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
13
© Copyright 2004 Sipex Corporation
PACKAGE: 8 PIN PDIP
N
E
INDEX
AREA
E1
1
2
3
E
N/2
c
eA
A1
eB
D
A
e
A2
D1
L
b3
b
b2
b
c
8 PIN PDIP JEDEC MS-001 (BA) Variation
SYMBOL
MIN
NOM
MAX
A
0.21
A1
0.15
A2
0.115
0.13
0.195
b
0.014
0.018
0.022
b2
0.045
0.06
0.07
b3
0.3
0.039
0.045
c
0.008
0.01
0.014
D
0.355
0.365
0.4
D1
0.005
E
0.3
0.31
0.325
E1
0.24
0.25
0.28
.100 BSC
e
.300 BSC
eA
eB
0.43
L
0.115
0.13
0.15
Note: Dimensions in (mm)
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
14
© Copyright 2004 Sipex Corporation
PACKAGE: 8 PIN NSOIC
D
Ø
e
E/2
L2
E1/2 E1
E
Seating Plane
L1
1
Ø
L
Ø1
Gauge Plane
VIEW C
b
INDEX AREA
(D/2 X E1/2)
TOP VIEW
A1
A
Seating Plane
A2
8 Pin NSOIC JEDEC MO-012 (AA) Variation
MIN
NOM
MAX
SYMBOL
A
1.35
1.75
A1
0.1
0.25
A2
1.25
1.65
b
0.31
0.51
c
0.17
0.24
4.90 BSC
D
6.00 BSC
E
3.90 BSC
E1
1.27 BSC
e
L
0.4
1.27
1.04 REF
L1
0.25 BSC
L2
ø
0º
8º
ø1
5º
15º
SIDE VIEW
B
B
SEE VIEW C
b
c
Note: Dimensions in (mm)
BASE METAL
SECTION B-B
WITH PLATING
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
15
© Copyright 2004 Sipex Corporation
ORDERING INFORMATION
Model
Temperature Range
Package Types
SP690ACN........................................................0°C to +70°C.....................................................8-Pin NSOIC
SP690ACN/TR...................................................0°C to +70°C.....................................................8-Pin NSOIC
SP690ACP........................................................0°C to +70°C.........................................................8-Pin PDIP
SP690AEN......................................................-40°C to +85°C.....................................................8-Pin NSOIC
SP690AEN/TR.................................................-40°C to +85°C.....................................................8-Pin NSOIC
SP690AEP.......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP692ACN........................................................0°C to +70°C......................................................8-Pin NSOIC
SP692ACN/TR..................................................0°C to +70°C......................................................8-Pin NSOIC
SP692ACP........................................................0°C to +70°C.........................................................8-Pin PDIP
SP692AEN......................................................-40°C to +85°C.....................................................8-Pin NSOIC
SP692AEN/TR................................................-40°C to +85°C.....................................................8-Pin NSOIC
SP692AEP.......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP802LCN........................................................0°C to +70°C......................................................8-Pin NSOIC
SP802LCN/TR..................................................0°C to +70°C......................................................8-Pin NSOIC
SP802LCP........................................................0°C to +70°C.........................................................8-Pin PDIP
SP802LEN.......................................................-40°C to +85°C....................................................8-Pin NSOIC
SP802LEN/TR.................................................-40°C to +85°C....................................................8-Pin NSOIC
SP802LEP.......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP802MCN.......................................................0°C to +70°C......................................................8-Pin NSOIC
SP802MCN/TR.................................................0°C to +70°C......................................................8-Pin NSOIC
SP802MCP.......................................................0°C to +70°C.........................................................8-Pin PDIP
SP802MEN......................................................-40°C to +85°C....................................................8-Pin NSOIC
SP802MEN/TR................................................-40°C to +85°C....................................................8-Pin NSOIC
SP802MEP......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP805LCN........................................................0°C to +70°C......................................................8-Pin NSOIC
SP805LCN/TR..................................................0°C to +70°C......................................................8-Pin NSOIC
SP805LCP........................................................0°C to +70°C.........................................................8-Pin PDIP
SP805LEN.......................................................-40°C to +85°C....................................................8-Pin NSOIC
SP805LEN/TR.................................................-40°C to +85°C....................................................8-Pin NSOIC
SP805LEP.......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP805MCN.......................................................0°C to +70°C......................................................8-Pin NSOIC
SP805MCN/TR..................................................0°C to +70°C......................................................8-Pin NSOIC
SP805MCP.......................................................0°C to +70°C.........................................................8-Pin PDIP
SP805MEN......................................................-40°C to +85°C....................................................8-Pin NSOIC
SP805MEN/TR................................................-40°C to +85°C....................................................8-Pin NSOIC
SP805MEP......................................................-40°C to +85°C.......................................................8-Pin PDIP
Available in lead free packaging. To order add “-L” suffix to part number.
Example: SP802LCN/TR = standard; SP802LCN-L/TR = lead free
/TR = Tape and Reel
Pack quantity 2,500 for NSOIC.
CLICK HERE TO ORDER SAMPLES
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Corporation
ANALOG EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
Date: 11/29/04
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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© Copyright 2004 Sipex Corporation
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