SP7651ER

Solved by SP7651 TM Evaluation Board Manual Easy Evaluation for the SP7651ER 12V Input, 0 to 3A Output Synchronous Buck Converter Built in Low RDS(ON) Power FETs UVLO Detects Both Vcc and VIN Highly Integrated Design, Minimal Components High Efficiency: 88% Feature Rich: UVIN, Programmable Softstart, External Vcc Supply and Output Dead Short Circuit Shutdown Protection SP7651EB SCHEMATIC Sept12-06 SP7651 Evaluation Manual ©2006 Sipex Corporation USING THE EVALUATION BOARD 1) Powering Up the SP7651EB Circuit Connect the SP7651 Evaluation Board with an external +12V power supply. Connect with short leads and large diameter wire directly to the “VIN” and “GND” posts. Connect a Load between the VOUT and GND2 posts, again using short leads with large diameter wire to minimize inductance and voltage drops. 2) Measuring Output Load Characteristics VOUT ripple can best be seen touching the probe tip to the pad for C3 and the scope GND collar touching the GND side of C3 using short wrapped wire around the collar – avoid a GND lead on the scope which will increase noise pickup. 3) Using the Evaluation Board with Different Output Voltages While the SP7651 Evaluation Board has been tested and delivered with the output set to 3.30V, by simply changing one resistor, R2, the SP7651 can be set to other output voltages. The relationship in the following formula is based on a voltage divider from the output to the feedback pin VFB, which is set to an internal reference voltage of 0.80V. Standard 1% metal film resistors of surface mount size 0603 are recommended. VOUT = 0.80V (R1 / R2 + 1) => R2 = R1 / [ ( Vout / 0.80V ) – 1 ] Where R1 = 68.1KΩ and for VOUT = 0.80V setting, simply remove R2 from the board. Furthermore, one could select the value of the R1 & R2 combination to meet the exact output voltage setting by restricting R1 resistance range such that 50KΩ ≤ R1 ≤ 100KΩ for overall system loop stability. Note that since the SP7651 Evaluation Board design was optimized for 12V down conversion to 3.30V, changes of output voltage and/or input voltage will alter performance from the data given in the Power Supply Data section. In addition, the SP7651ER provides short circuit protection by sensing VOUT at GND. POWER SUPPLY DATA The SP7651ER is designed with a very accurate 1.0% reference over line, load and temperature. Figure 1 data shows a typical SP7655 Evaluation Board Efficiency plot, with efficiencies to 87% (including generation of 5V Vcc) and output currents to 3A. SP7651ER Load Regulation is shown in Figure 2 to have only 0.5% change in output voltage from 0.5A load to 3A load. Figures 3 and 4 illustrate a 1.5A to 3A and 0A to 3A Load Step. Start-up Responses in Figures 5, 6 and 7 show a controlled start-up with different output load behavior when power is applied where the input current rises smoothly as the Softstart ramp increases. In Figure 8 the SP7651ER is configured for hiccup mode in response to an output dead short circuit condition and will Soft-start until the over-load is removed. Figure 9 and 10 show output voltage ripple less than 25mV at no load to 3A load. While data on individual power supply boards may vary, the capability of the SP7651ER of achieving high accuracy over a range of load conditions shown here is quite impressive and desirable for accurate power supply design. Sept12-06 SP7651 Evaluation Manual Page 2 of 8 ©2006 Sipex Corporation 100 90 Efficiency vs Load Current Output Voltage (V) Output Voltage vs Load Current 3.320 3.310 3.300 3.290 3.280 Efficiency (%) 80 70 60 50 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Vi=12V Vo=3.3V Vi=12V Vo=3.3V 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Load current (A) Load current (A) Figure 1. Efficiency vs Load Figure 2. Load Regulation Vout Vout Vi=12V Vo=3.3V Vi=12V Vo=3.3V Iout (1A/div) Iout (2A/div) Figure 3. Load Step Response: 1.5->3A Figure 4. Load Step Response: 0->3A Vin Vin Vout SoftStart Vi=12V Vo=3.3V Vout SoftStart Vi=12V Vo=3.3V Ichoke (0.5A/div) Ichoke (2A/div) Figure 5. Start-Up Response: No Load Figure 6. Start-Up Response: 3A Load Sept12-06 SP7651 Evaluation Manual Page 3 of 8 ©2006 Sipex Corporation SoftStart SoftStart Vi=12V Vo=3.3V Vout Vout Vi=12V Vo=3.3V Ichoke 25A/div Ichoke 25A/div Figure 7. Output Load Short Circuit Figure 8. Output Load Short Circuit (Zoom-in) Vout ripple = 10mV Vout ripple = 10mV Vi=12V Vo=3.3V Ichoke (2A/div) Ichoke (1A/div) Vi=12V Vo=3.3V Figure 9. Output Ripple: No Load Figure 10. Output Ripple:3A Load Sept12-06 SP7651 Evaluation Manual Page 4 of 8 ©2006 Sipex Corporation TYPE III LOOP COMPENSATION DESIGN The open loop gain of the SP7651EB can be divided into the gain of the error amplifier Gamp(s), PWM modulator Gpwm, buck converter output stage Gout(s), and feedback resistor divider Gfbk. In order to cross over at the selecting frequency fco, the gain of the error amplifier must compensate for the attenuation caused by the rest of the loop at this frequency. The goal of loop compensation is to manipulate the open loop frequency response such that its gain crosses over 0dB at a slope of –20dB/dec. The open loop crossover frequency should be higher than the ESR zero of the output capacitors but less than 1/5 to 1/10 of the switching frequency fs to insure proper operation. Since the SP7651EB is designed with Ceramic Type output capacitors, a Type III compensation circuit is required to give a phase boost of 180° in order to counteract the effects of the output LC underdamped resonance double pole frequency. Type III Voltage Loop Compensation Gamp(S) Gain Block Vref (Volts ) (SRz2Cz2+1)(SR1Cz 3+1) SR1Cz2(SRz3Cz3+1)(SRz2C p1+1) PWM Stage Gpwm Gain Block Vin Vramp_p p Output Stage Gout(S) Gain Block (SResrCout+ 1) [S^2LCout+S(Resr+Rdc)Co ut+1] Vout (Volts ) Voltage Feedback Gfbk Gain Block R2 Vref OR (R1+R2 Vout ) Definition s: Resr := Output Capacitor Equivalent Series Resitance Rdc := Output Inductor DC Resistance Vramp_pp := SP7651 Internal RAMP Amplitude Peak to Peak Voltage Condition s: Cz2 >> Cp1 and R1 >> Rz3 Output Load Resistance >> Resr and Rdc Vfbk (Volts ) Figure 11. Voltage Mode Control Loop with Loop Dynamic for Type III Compensation Sept12-06 SP7651 Evaluation Manual Page 5 of 8 ©2006 Sipex Corporation The simple guidelines for positioning the poles and zeros and for calculating the component values for Type III compensation are as follows: a. b. Choose fco = fs / 5 Calculate fp_LC fp_LC = 1 / [2π (L ●C) ^ 1/2 ] Calculate fz_ESR fz_ESR = 1 / 2π (RESR) ● (COUT) Select R1 component value such that 50kΩ ≤ R1 ≤ 100kΩ Calculate R2 base on the desired VOUT R2 = R1 / [(VOUT / 0.80V) – 1] Select the ratio of Rz2 / R1 gain for the desired gain bandwidth Rz2 = R1 (VRAMP_PP / VIN_MAX) (fco / fp_LC) Calculate Cz2 by placing the zero at ½ of the output filter pole frequency Cz2 = 1 / [π (Rz2) ● (fp_LC) ] Calculate Cp1 by placing the first pole at ESR zero frequency Cp1 = 1 / [2π (Rz2) ● (fz_ESR) ] Calculate Rz3 by setting the second pole at ½ of the switching frequency and the second zero at the output filter double pole frequency Rz3 = 2 (R1) (fp_LC) / fs Calculate Cz3 from Rz3 component value above Cz3 = 1 / π (Rz3) ● (fs) Choose 100pF ≤ Cf1 ≤ 220pF to stabilize the SP7651ER internal Error Amplifier Note: Loop Compensation component calculations discussed in this section are further elaborated in the application note #ANP16, “Loop Compensation of Voltage-Mode Buck Converters”. These calculations shown here can be quickly iterated with the Type III Loop Compensation Calculator on the web at: www.sipex.com/files/Application-Notes/TypeIIICalculator.xls c. d. e. f. g. h. i. j. k. Sept12-06 SP7651 Evaluation Manual Page 6 of 8 ©2006 Sipex Corporation PCB LAYOUT DRAWINGS Figure 12. SP7651EB Layout Top Side & Component Placement Figure 13. SP7651EB PC Layout Bottom Side & Component Placement Figure 14. SP7651EB PC Layout Inner Layer 1 Figure 15. SP7651EB PC Layout Inner Layer 2 Sept12-06 SP7651 Evaluation Manual Page 7 of 8 ©2006 Sipex Corporation Table 1: SP7651EB List of Materials MANUFACTURER NAME SIPEX Sipex Diodes Inc. Intertechnical TDK CORPORATION TDK CORPORATION TDK CORPORATION TDK CORPORATION AVX CORPORATION ROHM AVX CORPORATION AVX CORPORATION AVX CORPORATION ROHM VISHAY DALE SEI ELECTRONICS VISHAY DALE VISHAY DALE VISHAY DALE VISHAY DALE ROHM Vector Electronic REF. DES. U1 U2 DBST L1 C3 C4 CVCC C2 CBST CSS CP1 CZ2 CZ3 CF1 RZ2 R2 RZ3 R1 R3 R4 RBST VIN,VOUT, GND,GND2 QTY 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 Manufacturer Part Number SP7651ER SPX5205M5-5.0 SD101AWS-7 SC7232-2R2M C3225X5R0J226M C3225X5R1C226M C1608X5R1A225K C1608X7R1H104K 06035C682KAT2A MCH185CN153KK 06035A100JAT2A 06035A391JAT2A 06035A101JAT2A MCH185A101JK CRCW0603-1502FRT1 RMC-1/16W-21.5K-1%-TR CRCW0603-2001FRT1 CRCW0603-6812FRT1 CRCW0603-2003FRT1 CRCW0603-1003FRT1 MCR03EZPEFX20R0 K24C/M SIZE DFN-26 SOT-23-5 SOD-323 7 X 7mm 1210 1210 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 .042 Dia DESCRIPTION 2-FETs Buck Ctrl 150mA LDO Voltage Regulator Schottky Diode, 15mA Inductor, 2.2uH, 8A, 10.4mohm Capacitor, Ceramic, 22uF, 6.3V, X5R, 20% Capacitor, Ceramic, 22uF, 16V, X5R, 20% Capacitor, Ceramic, 2.2uF, 10V, X5R, 10% Capacitor, Ceramic, 0.1uF, 50V, X7R, 10% Capacitor, Ceramic, 6.8nF, 50V, X7R, 10% Capacitor, Ceramic, 15nF, 50V, X7R, 10% Capacitor, Ceramic, 10pF, 50V, C0G, 5% Capacitor, Ceramic, 390pF, 50V, C0G, 5% Capacitor, Ceramic, 100pF, 50V, C0G, 5% Capacitor, Ceramic, 100pF, 50V, C0G, 5% Resistor, 15K, 1/16W, 1% Resistor, 21.5K, 1/16W, 1% Resistor, 2K, 1/16W, 1% Resistor, 68.1K, 1/16W, 1% Resistor, 200K, 1/16W, 1% Resistor, 100K, 1/16W, 1% Resistor, 20, 1/16W, 1% Input/Output Terminal Posts ORDERING INFORMATION Model Temperature Range Package Type SP7651EB…................................-40°C to +85°C...............…SP7651 Evaluation Board SP7651ER..............................…. -40°C to +85°C.................................……26-pin DFN Sept12-06 SP7651 Evaluation Manual Page 8 of 8 ©2006 Sipex Corporation