XR76203-Q / XR76205-Q / XR76208-Q
AEC-Q100 Qualified 40V
3A/5A/8A Synchronous Step Down COT Regulators
General Description
FEATURES
■ Automotive AEC-Q100 qualified
The XR76203-Q, XR76205-Q and XR76208-Q are synchronous stepdown regulators combining the controller, drivers, bootstrap diode and
MOSFETs in a single package for point-of-load supplies well suited for
automotive applications. Qualified per AEC-Q100, the XR76203-Q,
XR76205-Q and XR76208-Q have load current ratings of 3A, 5A and 8A
respectively. A wide 5.5V to 40V input voltage range allows for single
supply operation from 12V battery systems required to withstand load
dump, industry standard 24V ±10%, 18V-36V, and rectified 18VAC and
24VAC rails.
Temperature Grade 1: -40°C to 125°C
HBM ESD Class Level 2
CDM ESD Class Level C4B
■ Controller, drivers, bootstrap diode and
MOSFETs integrated in one package
■ 3A, 5A and 8A step down regulators
Wide 5.5V to 40V input voltage range
≥0.6V adjustable output voltage
■ Proprietary Constant On-Time control
No loop compensation required
Stable ceramic output capacitor operation
Programmable 200ns to 2µs on-time
Constant 100kHz to 800kHz frequency
■ Selectable CCM or CCM / DCM
CCM / DCM for high efficiency at light-load
CCM for constant frequency at light-load
■ Programmable hiccup current limit with thermal
compensation
■ Precision enable and Power Good flag
■ Programmable soft-start
■ 30-pin 5x5mm QFN package with wettable flanks
With a proprietary emulated current mode Constant On-Time (COT)
control scheme, the XR76203-Q, XR76205-Q and XR76208-Q provide
extremely fast line and load transient response using ceramic output
capacitors. They require no loop compensation, simplifying circuit
implementation and reducing overall component count. The control loop
also provides 0.07% load and 0.15% line regulation and maintains
constant operating frequency. A selectable power saving mode allows the
user to operate in discontinuous conduction mode (DCM) at light current
loads, thereby significantly increasing the converter efficiency.
A host of protection features, including over-current, over-temperature,
short-circuit, and UVLO helps achieve safe operation under abnormal
operating conditions.
The XR76203-Q, XR76205-Q and XR76208-Q are available in a RoHScompliant, green / halogen-free, space-saving QFN 5x5mm package.
APPLICATIONS
■ Automotive systems
■ Distributed power architecture
■ Point-of-Load converters
■ Power supply modules
■ FPGA, DSP, and processor supplies
■ Industrial and military
Typical Application
Ordering Information - Back Page
1
3.340
VIN
VIN
PVIN
EN/MODE
BST
PGOOD
SW
CBST
Enable/Mode
3.320
VOUT
CIN
VCC
R
SS
TON
CSS
RON
AGND
XR76208-Q
XR76205-Q
XR76203-Q ILIM
3.310
VOUT (V)
L1
Power Good
CVCC
3.330
RLIM
CFF
R1
COUT
FB
R2
PGND
3.300
3.290
3.280
3.270
3.260
5
10
15
20
25
30
35
40
VIN (V)
Line Regulation
1.
1 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Absolute Maximum Ratings
Operating Conditions
Stresses beyond the limits listed below may cause
permanent damage to the device. Exposure to any
Absolute Maximum Rating condition for extended periods
may affect device reliability and lifetime.
PVIN.................................................................................5V to 40V
SW, ILIM.....................................................................-1V to 40V(1)
PVIN, VIN.....................................................................-0.3V to 43V
PGOOD, VCC, TON, SS, EN, FB.................................-0.3V to 5.5V
VCC.............................................................................-0.3V to 6.0V
Switching frequency......................................100kHz to 800kHz(3)
BST..........................................................................-0.3V to 48V(1)
Junction temperature range................................-40°C to +125°C
BST-SW.........................................................................-0.3V to 6V
XR76203-Q package thermal resistance, JA....................28°C/W
SW, ILIM..................................................................-1V to 43V(1, 2)
XR76205-Q package thermal resistance, JA.....................26°C/W
ALL other pins...................................................-0.3V to VCC+0.3V
XR76208-Q package thermal resistance, JA.....................25°C/W
Storage temperature............................................-65°C to +150°C
XR76203-Q package power dissipation at 25°C.....................3.6W
Junction temperature...........................................................150°C
XR76205-Q package power dissipation at 25°C.....................3.8W
Power dissipation................................................Internally Limited
XR76208-Q package power dissipation at 25°C.....................4.0W
VIN................................................................................5.5V to 40V
Lead temperature (Soldering, 10 sec)..................................300°C
ESD rating (HBM - Human Body Model)...............................±2kV
Note 1: No external voltage applied.
Note 2: SW pin’s minimum DC range is -1V, transient is -5V for less than
50ns.
ESD rating (Charged Device Model (CDM) per AEC Q100-011,
Non-corner pins...................................................................±500V
Note 3: Recommended frequency.
ESD Rating (Charged Device Model (CDM) per AEC Q100-011,
Corner pins 1, 7, 8, 14, 15, 22, 23, 30..................................±750V
Electrical Characteristics
Unless otherwise noted: TJ = 25°C, VIN = 24V, BST = VCC, SW = AGND = PGND = 0V, CVCC = 4.7µF. Limits applying over
the full operating temperature range are denoted by a “•”
Symbol
Parameter
Conditions
Min
Typ
Max
Units
40
V
2
mA
Power Supply Characteristics
VIN
Input voltage range
VCC regulating
IVIN
VIN input supply current
Not switching, VIN = 24V, VFB = 0.7V
IVIN
VIN input supply current (XR76203-Q)
f = 300kHz, RON = 215kΩ, VFB = 0.58V
12
mA
IVIN
VIN input supply current (XR76205-Q)
f = 300kHz, RON = 215kΩ, VFB = 0.58V
15
mA
IVIN
VIN input supply current (XR76208-Q)
f = 300kHz, RON = 215kΩ, VFB = 0.58V
19
mA
IOFF
Shutdown current
Enable = 0V, VIN = 12V
1
µA
5.5
0.7
Enable and Under-Voltage Lock-Out UVLO
VIH_EN_1
EN pin rising threshold
VEN_H_1
EN pin hysteresis
VIH_EN_2
EN pin rising threshold for DCM / CCM
operation
VEN_H_2
EN pin hysteresis
1.8
1.9
2.0
70
2.8
3.0
100
2 / 22
V
mV
3.1
V
mV
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Symbol
Parameter
Conditions
VCC UVLO start threshold, rising edge
Min
Typ
Max
Units
4.00
4.25
4.40
V
VCC UVLO hysteresis
230
mV
Reference Voltage
VREF
Reference voltage
VIN = 5.5V to 40V, VCC regulating
VIN = 5.5V to 40V, VCC regulating
0.596
0.600
0.604
V
0.594
0.600
0.606
V
DC line regulation
CCM, closed loop, VIN=5.5V-40V, applies
to any COUT
±0.33
%
DC load regulation
CCM, closed loop, applies to any COUT
±0.39
%
Programmable Constant On-Time
On-time 1
RON = 237kΩ, VIN = 40V
1570
1840
2120
ns
f corresponding to on-time 1
VOUT= 24V, VIN = 40V, RON = 237kΩ
283
326
382
kHz
TON(MIN)
Minimum programmable on-time
RON = 14kΩ, VIN = 40V
TON2
On-time 2
RON = 14kΩ, VIN = 24V
174
205
236
ns
TON3
On-time 3
RON = 35.7kΩ, VIN = 24V
407
479
550
ns
f corresponding to on-time 3
VOUT = 3.3V, VIN = 24V, RON = 35.7kΩ
250
287
338
kHz
f corresponding to on-time 3
VOUT = 5.0V, VIN = 24V, RON = 35.7kΩ
379
435
512
kHz
250
350
ns
TON1
Minimum off-time
120
ns
Diode Emulation Mode
Zero crossing threshold
DC value measured during test
-2
mV
Soft-start
-14
Fault present
1
VIN = 6V to 40V, ILOAD = 0 to 30mA
4.8
5.0
VIN = 5V, ILOAD = 0 to 20mA
4.51
4.7
-10
-6.9
-5
%
1.6
4
%
SS charge current
SS discharge current
-10
-6
µA
mA
VCC Linear Regulator
VCC output voltage
5.2
V
V
Power Good Output
Power Good threshold
Power Good hysteresis
Power Good sink current
1
mA
Protection: OCP, OTP, Short-Circuit
Hiccup timeout
110
ILIM pin source current
45
ILIM current temperature coefficient
55
0.4
OCP comparator offset
Current limit blanking
50
ms
GL rising > 1V
3 / 22
-8
0
100
µA
%/°C
+8
mV
ns
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Symbol
Parameter
Thermal shutdown threshold(1)
Conditions
Min
Rising temperature
Thermal hysteresis(1)
VSCTH feedback pin short-circuit
threshold
Percent of VREF, short circuit is active after
PGOOD is asserted
50
Typ
Max
Units
150
°C
15
°C
60
70
%
115
160
mΩ
40
59
mΩ
XRP76203 Output Power Stage
RDSON
IOUT
High-side MOSFET RDSON
Low-side MOSFET RDSON
IDS = 1A
Maximum output current
3
A
XRP76205 Output Power Stage
RDSON
IOUT
High-side MOSFET RDSON
Low-side MOSFET RDSON
IDS = 2A
Maximum output current
42
59
mΩ
40
59
mΩ
5
A
XRP76208 Output Power Stage
RDSON
IOUT
High-side MOSFET RDSON
Low-side MOSFET RDSON
IDS = 2A
Maximum output current
8
42
59
mΩ
16.2
21.5
mΩ
A
Note 1: Guaranteed by design.
4 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Pin Configuration, Top View
BST
SW
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
30
29
28
27
26
25
24
23
PVIN PAD
ILIM
1
EN
2
21 PVIN
TON
3
20
SW
SS
4
19
PGND
PGOOD
5
18
PGND
PGND 17
PAD
PGND
16
PGND
15
PGND
FB
6
AGND
7
22 PVIN
SW PAD
AGND PAD
8
9
10
11
12
13
14
VIN
VCC
AGND
SW
SW
SW
SW
5 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Pin Assignments
Pin No.
Pin Name
Type
Description
1
ILIM
A
Over-current protection programming. Connect with a resistor to SW.
2
EN/MODE
I
Precision enable pin. Pulling this pin above 1.9V will turn the regulator on and it will operate in
CCM. If the voltage is raised above 3.0V, then the regulator will operate in DCM / CCM
depending on load.
3
TON
A
Constant on-time programming pin. Connect with a resistor to AGND.
4
SS
A
Soft-start pin. Connect an external capacitor between SS and AGND to program the soft-start
rate based on the 10µA internal source current.
5
PGOOD
O, OD
Power-Good output. This open-drain output is pulled low when VOUT is outside the regulation.
6
FB
A
Feedback input to feedback comparator. Connect with a set of resistors to VOUT and AGND
in order to program VOUT.
AGND
A
Signal ground for control circuitry. Connect AGND Pad with a short trace to pins 7 and 10.
8
VIN
A
Supply input for the regulator’s LDO. Normally it is connected to PVIN.
9
VCC
A
The output of regulator’s LDO. For operation using a 5V rail, VCC should be shorted to VIN.
11-14, 20,
29, SW Pad
SW
PWR
Switch node. The drain of the low-side N-channel MOSFET. The source of the high-side
MOSFET is wire-bonded to the SW Pad. Pins 20 and 29 are internally connected to the SW
pad.
15-19,
PGND Pad
PGND
PWR
Ground of the power stage. Should be connected to the system’s power ground plane. The
source of the low-side MOSFET is wire-bonded to PGND Pad.
21-28, PVIN
Pad
PVIN
PWR
Input voltage for power stage. The drain of the high-side N-channel MOSFET.
30
BST
A
7, 10, AGND
Pad
High-side driver supply pin. Connect a bootstrap capacitor between BST and pin 29.
Type: A = Analog, I = Input, O = Output, I/O = Input/Output, PWR = Power, OD = Open-Drain
6 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Functional Block Diagram
VCC
TON
VCC UVLO
Enable LDO
4.25 V
VIN
BST
PVIN
Switching
Enabled
+
-
LDO
VCC
VCC
OTP
TJ
150 C
PGOOD
10uA
SS
+
+
FB
0.6V
-
current
emulation &
DC correction
VIN
On-Time
-
Switching
Enabled
0.6 V
Feedback
comparator
FB
-
R
Q
S
Q
SW
PGOOD comparator
+
+
-
GL
R
Q
S
Q
Enable
Hiccup
Hiccup
Mode
Enable LDO
1.9 V
Enable LDO
-
If four
consecutive OCP
CCM or CCM/DCM
+
3V
-
If 8 consecutive ZCD
Then DCM
If 1 non-ZCD
Then exit DCM
OCP
comparator
50uA
+
-
+
EN/MODE
VCC
Switching
Enabled
Short-circuit detection
0.36 V
Dead
Time
Control
Minimum
On Time
-
0.555 V
GH
TON
+
Zero Cross Detect
SW
+
-2 mV
-
AGND
7 / 22
ILIM
PGND
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Typical Performance Characteristics
3.340
3.340
3.330
3.330
3.320
3.320
3.310
3.310
VOUT (V)
VOUT (V)
Unless otherwise noted: VIN = 24V, VOUT = 3.3V, IOUT = 8A, f = 400kHz, TA = 25°C. Schematic from the application information section.
3.300
3.290
3.300
3.290
3.280
3.280
3.270
3.270
3.260
3.260
0
2
4
6
5
8
10
15
20
25
30
35
40
VIN (V)
IOUT (A)
Figure 2: Line Regulation
Figure 1: Load Regulation
1,500
1,000
Calculated
Typical
1,300
Calculated
Typical
TON (ns)
TON (ns)
1,100
100
900
700
500
300
100
10
1
10
5
100
10
15
Figure 3: TON versus RON
25
30
35
40
Figure 4: TON versus VIN, RON = 27.4kΩ
600
600
500
500
400
400
f (kHz)
f (kHz)
20
VIN (V)
RON (kΩ)
300
300
200
200
100
100
0
0
0
2
4
6
5
8
10
15
20
25
30
35
40
VIN (V)
IOUT (A)
Figure 6: Frequency versus VIN
Figure 5: Frequency versus IOUT
8 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Typical Performance Characteristics
Unless otherwise noted: VIN = 24V, VOUT=3.3V, IOUT=8A, f=400kHz, TA = 25°C. Schematic from the application information
section.
8
14
12
IOCP (A)
IOCP (A)
6
10
8
4
6
2
4
0
2
2
3
4
5
4
6
5
7
8
Figure 8: XR76205-Q IOCP versus RLIM
Figure 7: XR76208-Q IOCP versus RLIM
5
70
4
60
3
ILIM (uA)
IOCP (A)
6
RLIM (kΩ)
RLIM (kΩ)
2
50
40
1
30
0
2.5
3.0
3.5
4.0
-40 -20 0
4.5
RLIM (kΩ)
20 40 60 80 100 120
TJ (°C)
Figure 9: XR76203-Q IOCP versus RLIM
Figure 10: ILIM versus Temperature
530
610
520
510
500
TON (ns)
VREF (mV)
605
600
490
480
470
460
595
450
440
430
590
-40 -20 0
-40 -20 0
20 40 60 80 100 120
TJ (°C)
20 40 60 80 100 120
TJ (°C)
Figure 12: TON versus Temperature, RON = 35.7kΩ
Figure 11: VREF versus Temperature
9 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Typical Performance Characteristics
Unless otherwise noted: VIN = 24V, VOUT = 3.3V, IOUT = 8A, f = 400kHz, TA = 25°C. Schematic from the application
information section.
Figure 13: Steady State, IOUT=8A
Figure 14: Steady State, DCM, IOUT=0A
Figure 15: Power-up, Forced CCM
Figure 16: Power-up, DCM / CCM
Figure 17: Load Step, Forced CCM, 0A - 4A - 0A
Figure 18: Load Step, DCM / CCM, 0A - 4A - 0A
10 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Efficiency
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
3.3uH
2.2uH
Efficiency %
Efficiency %
Unless otherwise noted: TAMBIENT = 25°C, no air flow, f = 400kHz, inductor losses are included, the schematic is from the
Application Information section.
1.5uH
5.0V DCM
3.3V DCM
1.8V DCM
0.1
5.0V CCM
3.3V CCM
1.8V CCM
1.0
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
200kHz, 8.2uH
3.3uH
2.2uH
1.5uH
0.1
10.0
IOUT (A)
3.3V CCM
1.8V DCM
1.8V CCM
1.0
10.0
Figure 20: XR76208-Q Efficiency, VIN = 24V
4.7uH
3.3uH
Efficiency %
Efficiency %
5.0V CCM
3.3V DCM
100
2.2uH
76
74
72
70
0.1
5.0V DCM
5.0V CCM
3.3V DCM
3.3V CCM
1.8V DCM
1.8V CCM
1.0
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
10.0
200kHz
6.8uH
4.7uH
3.3uH
2.2uH
0.1
IOUT (A)
12V DCM
12V CCM
5.0V DCM
5.0V CCM
3.3V DCM
3.3V CCM
1.8V DCM
1.8V CCM
1.0
10.0
IOUT (A)
Figure 21: XR76205-Q Efficiency, VIN = 12V
Figure 22: XR76205-Q Efficiency, VIN = 24V
100
98
100
98
94
6.8uH
92
Efficiency %
4.7uH
90
88
3.3uH
86
200kHz
96
94
96
Efficiency %
12V CCM
5.0V DCM
IOUT (A)
Figure 19: XR76208-Q Efficiency, VIN = 12V
100
98
96
94
92
90
88
86
84
82
80
78
12V DCM
84
82
80
78
10uH
92
90
6.8uH
4.7uH
88
86
84
3.3uH
82
80
78
76
74
76
5.0V DCM
3.3V DCM
1.8V DCM
74
72
5.0V CCM
3.3V CCM
1.8V CCM
72
70
70
0.1
1.0
12V DCM
5.0V DCM
3.3V DCM
1.8V DCM
0.1
10.0
1.0
12V CCM
5.0V CCM
3.3V CCM
1.8V CCM
10.0
IOUT (A)
IOUT (A)
Figure 24: XR76203-Q Efficiency, VIN = 24V
Figure 23: XR76203-Q Efficiency, VIN = 12V
11 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Thermal Derating
130
130
120
120
110
110
TAMBIENT(°C)
TAMBIENT(°C)
Unless otherwise noted: no air flow, f = 400kHz, the schematic is from the Application Information section.
100
90
1.8 VOUT
3.3 VOUT
80
100
200kHz
90
1.8 VOUT
80
3.3 VOUT
5.0 VOUT
70
70
60
60
5.0 VOUT
12 VOUT
50
50
1
2
3
4
5
6
7
1
8
2
3
4
6
7
Figure 26: XR76208-Q, VIN = 24V
130
130
120
120
110
110
TAMBIENT(°C)
Figure 25: XR76208-Q, VIN = 12V
100
90
80
1.8 VOUT
100
200kHz
90
80
1.8 VOUT
3.3 VOUT
3.3 VOUT
70
8
IOUT (A)
IOUT (A)
TAMBIENT(°C)
5
70
5.0 VOUT
5.0 VOUT
12 VOUT
60
60
50
50
1
2
3
4
5
1
2
4
Figure 28: XR76205-Q, VIN = 24V
130
130
120
120
110
110
100
90
80
1.8 VOUT
100
200kHz
90
1.8 VOUT
80
3.3 VOUT
3.3 VOUT
70
5
IOUT (A)
Figure 27: XR76205-Q, VIN = 12V
TAMBIENT(°C)
TAMBIENT(°C)
IOUT (A)
3
70
5.0 VOUT
5.0 VOUT
12 VOUT
60
60
50
50
1.0
1.5
2.0
2.5
1.0
3.0
1.5
2.0
2.5
3.0
IOUT (A)
IOUT (A)
Figure 30: XR76203-Q, VIN = 24V
Figure 29: XR76203-Q, VIN = 12V
12 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Functional Description
XR76203-Q,
XR76205-Q
and
XR76208-Q
are
synchronous step-down, proprietary emulated currentmode Constant On-Time (COT) regulators. The on-time,
which is programmed via RON, is inversely proportional to
VIN and maintains a nearly constant frequency. The
emulated current-mode control is stable with ceramic
output capacitors.
be directly connected to EN/MODE. In applications where
an external control is not available, EN/MODE input can be
derived from VIN. If VIN is well regulated, use a resistor
divider and set the voltage to 4V. If VIN varies over a wide
range, the circuit shown in Figure 32 can be used to
generate the required voltage.
Each switching cycle begins with GH signal turning on the
high-side (control) FET for a preprogrammed time. At the
end of the on-time, the high-side FET is turned off and the
low-side (synchronous) FET is turned on for a preset
minimum time (250ns nominal). This parameter is termed
Minimum Off-Time. After the Minimum Off-Time, the
voltage at the feedback pin FB is compared to an internal
voltage ramp at the feedback comparator. When VFB drops
below the ramp voltage, the high-side FET is turned on and
the cycle repeats. This voltage ramp constitutes an emulated current ramp and makes possible the use of ceramic
capacitors, in addition to other capacitor types, for output
filtering.
V
IN
RZ
10k
R1
30.1k, 1% EN/MODE
Zener
MMSZ4685T1G or Equivalent
R2
35.7k, 1%
Enable / Mode Input (EN/MODE)
The EN/MODE pin accepts a tri-level signal that is used to
control turn on / off. It also selects between two modes of
operation: ‘Forced CCM’ and ‘DCM / CCM’. If EN/MODE is
pulled below 1.8V, the regulator shuts down. A voltage
between 2.0V and 2.8V selects the Forced CCM mode,
which will run the regulator in continuous conduction at all
times. A voltage higher than 3.1V selects the DCM / CCM
mode, which will run the regulator in discontinuous
conduction at light loads.
Figure 31: Selecting Forced CCM by Deriving EN/MODE from VIN
V
IN
RZ
10k
Selecting the Forced CCM Mode
In order to set the regulator to operate in Forced CCM, a
voltage between 2.0V and 2.8V must be applied to EN/
MODE. This can be achieved with an external control
signal that meets the above voltage requirement. Where an
external control is not available, the EN/MODE can be
derived from VIN. If VIN is well regulated, use a resistor
divider and set the voltage to 2.5V. If VIN varies over a wide
range, the circuit shown in Fgure 31 can be used to
generate the required voltage. Note that at VIN of 5.5V and
40V, the nominal Zener voltage is 4.0V and 5.0V
respectively. Therefore for VIN in the range of 5.5V to 40V,
the circuit shown in Figure 31 will generate VEN required for
Forced CCM.
V
EN
EN/MODE
Zener
MMSZ4685T1G or Equivalent
Figure 32: Selecting DCM/CCM by Deriving EN/MODE from VIN
Selecting the DCM / CCM Mode
In order to set the regulator operation to DCM / CCM, a
voltage between 3.1V and 5.5V must be applied to EN/
MODE pin. If an external control signal is available, it can
13 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Programming the On-Time
IOCP is the over-current threshold to be programmed
The on-time TON is programmed via resistor RON according to following equation:
RDS is the MOSFET rated On Resistance; XR76208-Q =
21.5mΩ, XR76205-Q = 59mΩ, XR76203-Q = 59mΩ
8mV is the OCP comparator maximum offset
–9
V IN T ON – 25 10
R ON = ----------------------------------------------------------– 10
3.05 10
ILIM is the internal current that generates the necessary
OCP comparator threshold (use 45μA)
Note that ILIM has a positive temperature coefficient of
0.4%/°C (Figure 10). This is meant to roughly match and
compensate for the positive temperature coefficient of the
synchronous FET. A graph of typical IOCP versus RLIM is
shown in Figures 7-9. The maximum allowable RLIM for
XR76205-Q is 8.06kΩ.
where TON is calculated from:
V OUT
T ON = ------------------------------V IN f Eff
Short-Circuit Protection (SCP)
f is the desired switching frequency at nominal IOUT
If the output voltage drops below 60% of its programmed
value, the regulator will enter hiccup mode. The hiccup
will persist until the short-circuit is removed. The SCP
circuit becomes active after PGOOD asserts high.
Eff is the regulator efficiency corresponding to nominal IOUT
shown in Figures 19 - 24
Over-Temperature (OTP)
where:
OTP triggers at a nominal die temperature of 150°C. The
gate of the switching FET and synchronous FET are turned
off. When die temperature cools down to 135°C, soft-start
is initiated and operation resumes.
Substituting for TON in the first equation, we get:
V OUT
--------------- – 25 10–9 V IN
f Eff
R ON= ------------------------------------------------------------------------– 10
3.05 10
Programming the Output Voltage
Use an external voltage divider as shown in the Application
Circuit to program the output voltage VOUT.
V OUT
R1 = R2 ------------- – 1
0.6
Over-Current Protection (OCP)
If load current exceeds the programmed over-current IOCP,
for four consecutive switching cycles, the regulator enters
the hiccup mode of operation. In the hiccup mode, the
MOSFET gates are turned off for 110ms (hiccup timeout).
Following the hiccup timeout, a soft-start is attempted. If
OCP persists, the hiccup timeout will repeat. The regulator
will remain in hiccup mode until load current is reduced
below the programmed IOCP . In order to program the overcurrent protection, use the following equation:
where R2 has a nominal value of 2kΩ.
Programming the Soft-Start
Place a capacitor CSS between the SS and AGND pins to
program the soft-start. In order to program a soft-start time
of tSS, calculate the required capacitance CSS from the
following equation:
I OCP RDS + 8mV
RLIM = ---------------------------------------------------ILIM
10A
C SS = t SS --------------
0.6V
Where:
RLIM is resistor value for programming IOCP
14 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Feed-Forward Capacitor (CFF)
Maximum Allowable Voltage Ripple at FB pin
A feed-forward capacitor (CFF) may be necessary,
depending on the Equivalent Series Resistance (ESR) of
COUT. If only ceramic output capacitors are used for COUT,
then a CFF is necessary. Calculate CFF from:
Note that the steady-state voltage ripple at feedback pin FB
(VFB,RIPPLE) must not exceed 50mV in order for the
regulator to function correctly. If VFB,RIPPLE is larger than
50mV, then COUT should be increased as necessary in
order to keep the VFB,RIPPLE below 50mV.
1
C FF = -----------------------------------------------2 R1 7 f LC
Feed-Forward Resistor (RFF)
Poor PCB layout can cause FET switching noise at the
output and may couple to the FB pin via CFF. Excessive
noise at FB will cause poor load regulation. To solve this
problem place a resistor RFF in series with CFF. An RFF
value up to 2% of R1 is acceptable.
where:
R1 is the resistor that CFF is placed in parallel with
fLC is the frequency of output filter double-pole
fLC frequency must be less than 11kHz when using ceramic
COUT. If necessary, increase L and / or COUT in order to
meet this constraint.
When using capacitors with higher ESR such as PANASONIC TPE series, a CFF is not required, provided the
following conditions are met:
1. The frequency of output filter LC double-pole fLC should
be less than 11kHz.
2. The frequency of ESR Zero fZero,ESR should be at least
five times larger than fLC.
Note that if fZero,ESR is less than 5xfLC, then it is
recommended to set the fLC at less than 2kHz. CFF is still
not required.
15 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Application Circuit, XR76208-Q
OPTIONAL
CSNB 0.56nF
23
PVIN
24
PVIN
25
PVIN
26
PVIN
27
PVIN
28
PVIN
29
SW
30
BST
31
AGND PAD
FB
PGND
AGND
PGND
22
2x 10uF/50V
21
20
19
18
17
16
15
SW
14
SW
SW
PGND
13
7
PGND
12
FB
PGOOD
PGND
XR762084
SW
6
10k
SS
AGND
R5
PVIN
SW
U1
11
5
TON
10
4
VCC
3
CIN
PVIN
9
VCC
28k
VIN
RON
47nF
EN
PGND PAD
2
ILIM
8
5.49k 1
32
24VIN
PVIN PAD
SW RLIM
CSS
CBST 1uF
18.2k
33
R3
SW PAD
2k
34
R4
RSNB 1 Ohm
IHLP-5050FD-01
2.2uH
400kHz, 3.3V @ 0-8A
COUT
CIN
CVCC
0.1uF
PVIN
CFF
0.27nF
R1
9.09k
3x 47uF/10V
FB
4.7uF
R2
2k
16 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Application Circuit, XR76205-Q
OPTIONAL
CSNB 0.33nF
23
PVIN
24
PVIN
25
PVIN
26
PVIN
27
PVIN
28
PVIN
29
SW
30
BST
31
AGND PAD
32
PGND PAD
33
FB
PGND
AGND
PGND
SW
1x 10uF/50V
22
21
20
19
18
17
16
15
SW
14
13
SW
PGND
12
7
PGND
SW
6
FB
PGOOD
PGND
XR762054
AGND
10k
SS
11
R5
U1
10
5
PVIN
SW
TON
VCC
4
CIN
PVIN
9
3
EN
VIN
VCC
29.4k
47nF
ILIM
8
8.06k 1
2
RON
1uF
24VIN
PVIN PAD
SW RLIM
CSS
CBST
18.2k
SW PAD
R3
2k
34
R4
RSNB 1 Ohm
Wurth-74437368033
3.3uH
400kHz, 3.3V @ 0-5A
COUT
CIN1 0.1uF
CVCC
PVIN
CFF
0.27nF
R1
9.09k
2x 47uF/10V
FB
4.7uF
R2
2k
17 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Application Circuit, XR76203-Q
23
PVIN
24
PVIN
25
PVIN
26
PVIN
27
PVIN
28
PVIN
30
29
SW
AGND PAD
BST
31
32
AGND
PGND
10uF/50V
22
21
20
19
18
17
16
15
SW
14
SW
PGND
13
7
PGND
SW
FB
FB
12
6
PGND
SW
10k
PGOOD
PGND
XR762034
AGND
R5
U1
SS
11
5
10
4
PVIN
SW
TON
VCC
VCC
47nF
3
CIN
PVIN
9
CSS
28k
VIN
RON
EN
8
2
ILIM
24VIN
PGND PAD
4.02k 1
PVIN PAD
SW RLIM
33
18.2k
SW PAD
R3
2k
34
R4
1uF
SW
CBST
Wurth-74437368047
4.7uH
400kHz, 3.3V @ 0-3A
COUT
CIN1 0.1uF
CVCC
PVIN
CFF
0.22nF
R1
9.09k
47uF/10V
FB
4.7uF
R2
2k
18 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Mechanical Dimensions
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19 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Recommended Land Pattern and Stencil
5:1*$"-3&$0..&/%&%-"/%1"55&3/
5:1*$"-3&$0..&/%&%45&/$*-
'UDZLQJ1R32'
5HYLVLRQ%
20 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Ordering Information(1)
Part Number
Operating Temperature Range
Package
Packaging Method
Lead-Free(2)
XR76208EL-Q
-40°C ≤ TJ ≤ 125°C
5x5mm QFN
Tray
Yes
XR76208ELTR-Q
-40°C ≤ TJ ≤ 125°C
5x5mm QFN
Tape and Reel
Yes
XR76208-Q
XR76208EVB-Q
XR76208-Q Evaluation Board
XR76205-Q
XR76205EL-Q
-40°C ≤ TJ ≤ 125°C
5x5mm QFN
Tray
Yes
XR76205ELTR-Q
-40°C ≤ TJ ≤ 125°C
5x5mm QFN
Tape and Reel
Yes
XR76205EVB-Q
XR76205-Q Evaluation Board
XR76203-Q
XR76203EL-Q
-40°C ≤ TJ ≤ 125°C
5x5mm QFN
Tray
Yes
XR76203ELTR-Q
-40°C ≤ TJ ≤ 125°C
5x5mm QFN
Tape and Reel
Yes
XR76203EVB-Q
XR76203-Q Evaluation Board
Notes:
1. Refer to www.maxlinear.com/XR76203-Q, www.maxlinear.com/XR76205-Q, and www.maxlinear.com/XR76208-Q for most up-to-date Ordering
Information.
2. Visit www.maxlinear.com for additional information on Environmental Rating.
Revision History
Revision
Date
Description
1A
January 2017
1B
March 2017
Removed preliminary from XR76203-Q
1C
March 2017
Removed preliminary from XR76208-Q
1D
June 2018
1E
October 2019
Initial Release
Updated to MaxLinear logo. Updated format and Ordering Information table. Added recommended land
pattern and stencil.
Correct block diagram by changing the input gate into the Hiccup Mode from an AND gate to an OR gate.
Updated Ordering Information.
21 / 22
Rev 1E
XR76203-Q / XR76205-Q / XR76208-Q
Corporate Headquarters:
5966 La Place Court
Suite 100
Carlsbad, CA 92008
Tel.:+1 (760) 692-0711
Fax: +1 (760) 444-8598
www.maxlinear.com
The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by MaxLinear, Inc. MaxLinear, Inc. assumes no
responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the user. Without
limiting the rights under copyright, no part of this document may be reproduced into, stored in, or introduced into a retrieval system, or transmitted in any form or by any means (electronic, mechanical, photocopying, recording, or otherwise), or for any purpose, without the express written permission of MaxLinear, Inc.
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system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless MaxLinear, Inc. receives, in writing, assurances to its satisfaction that: (a) the risk of
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MaxLinear, Inc. may have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except as expressly provided in any written
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MaxLinear, the MaxLinear logo, and any MaxLinear trademarks, MxL, Full-Spectrum Capture, FSC, G.now, AirPHY and the MaxLinear logo are all on the products sold, are all trademarks of MaxLinear, Inc.
or one of MaxLinear’s subsidiaries in the U.S.A. and other countries. All rights reserved. Other company trademarks and product names appearing herein are the property of their respective owners.
© 2016 - 2019 MaxLinear, Inc. All rights reserved
22 / 22
Rev 1E