XRD8775AIU

XRD8775 CMOS 8-Bit High Speed Analog-to-Digital Converter April 2002-4 FEATURES · 3V Version: XRD87L75 · 8-Bit Resolution · Small 20-Pin SOIC/SSOP Packages · Up to 20MHz Sampling Rate · Internal S/H Function · Single Supply: 5V · VIN DC Range: 0V to VDD · VREF DC Range: 1V to VDD · Low Power: 75mW typ. (excluding reference) APPLICATIONS · Digital Color Copiers · Cellular Telephones · CCD-Based Systems · Hardware Scanners · Video Capture Boards · Latch-Up Free · ESD Protection: 2000V Minimum GENERAL DESCRIPTION The XRD8775 is an 8-bit Analog-to-Digital Converter in a small 20-pin SOIC/SSOP package. Designed using an advanced 5V CMOS process, this part offers excellent performance, low power consumption and latch-up free operation. This device uses a two-step flash architecture to maintain low power consumption at high conversion rates. The input circuitry of the XRD8775 includes an on-chip S/H function and allows the user to digitize analog input signals between AGND and AVDD. Careful design and chip layout have achieved a low analog input capacitance. This reduces “kickback” and eases the requirements of the buffer/amplifier used to drive the XRD8775. The designer can choose the internally generated reference voltages by connecting VRB to VRBS and VRT to VRTS , or provide external reference voltages to the VRB and VRT pins. The internal reference generates 0.6V at VRB and 2.6V at VRT. Providing external reference voltages allows easy interface to any input signal range between GND and VDD. This also allows the system to adjust these voltages to cancel zero scale and full scale errors, or to change the input range as needed. The device operates from a single +5V supply. Power consumption is 75mW at FS = 15MHz. Specified for operation over the commercial / industrial (-40 to +85°C) temperature range, the XRD8775 is available in Surface Mount (SOIC), Shrink Small Outline (SSOP) and Plastic Dual-In-line (PDIP) Packages. SIMPLIFIED BLOCK AND TIMING DIAGRAM Rev. 4.00 EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 • (510) 668-7000 • FAX (510) 668-7017 XRD8775 ORDERING INFORMATION Package Type Temperature Range Part No. DNL (LSB) INL (LSB) SOIC -40 to +85°C XRD8775AID +/-0.75 +/-1.5 PDIP -40 to +85°C XRD8775AIP +/-0.75 +/-1.5 SSOP -40 to +85°C XRD8775AIU +/-0.75 +/-1.5 PIN CONFIGURATIONS See Packaging Section for Package Dimensions 20-Pin PDIP (300 MIL) - P20 20-Pin SOIC (Jedec, 300 MIL) - D20 20-Pin SSOP (5.3mm) - U20 PIN OUT DEFINITIONS PIN NO. NAME DESCRIPTION PIN NO. NAME DESCRIPTION 1 DGND Digital Ground 11 CLK Sample Clock 2 DB0 3 DB1 Data Output Bit 0 (LSB) 12 DVDD Digital Power Supply Data Output Bit 1 13 VRTS Generates 2.6V if tied to VRT 4 DB2 Data Output Bit 2 14 VRT Top Reference 5 DB3 Data Output Bit 3 15 AVDD Analog Power Supply 6 DB4 Data Output Bit 4 16 VIN Analog Input 7 DB5 Data Output Bit 5 17 AGND Analog Ground VRBS Generates 0.6V if tied to VRB 8 DB6 Data Output Bit 6 18 9 DB7 Data Output Bit 7 (MSB) 19 VRB Bottom Reference 10 DVDD Digital Power Supply 20 DGND Digital Ground Rev. 4.00 2 XRD8775 ELECTRICAL CHARACTERISTICS TABLE UNLESS OTHERWISE SPECIFIED: AVDD = DVDD = 5V, FS = 15MHZ (50% DUTY CYCLE), VRT = 2.6V, VRB = 0.6V, TA = 25°C 25°C Parameter Symbol Min FS 0.1 Typ Max Units Test Conditions/Comments 15 20 MHz +/-0.75 LSB @ 15MHz LSB @ 10MHz LSB Best Fit Line KEY FEATURES Resolution 8 Sampling Rate Bits ACCURACY Differential Non-Linearity DNL Differential Non-Linearity DNL Integral Non-Linearity INL Zero Scale Error EZS +3 LSB Full Scale Error EFS -2 LSB +/-0.5 +/-1.5 (Max INL – Min INL)/2 REFERENCE VOLTAGES Positive Ref. Voltage VRT Negative Ref. Voltage VRB Differential Ref. Voltage3 Ladder Resistance Ladder Temp. Coefficient 2.6 AGND V REF 1.0 RL 245 AVDD V AVDD V 550 Ω 0.6 350 V RTCO 2000 ppm/°C Short VRB and VRBS VRB 0.6 V Short VRT and VRTS VRT-VRB 2 V 2.3 V VREF = VRT – VRB Self Bias 1 Self Bias 2 VRB = AGND, VRT Short VRT and VRTS ANALOG INPUT Input Bandwidth (–1 dB)2, 4 BW Input Voltage Range VIN Input Capacitance 5 Aperture Delay2 50 VRB MHz VRT V CIN 16 pF tAP 3 ns DIGITAL INPUTS Logical “1” Voltage VIH Logical “0” Voltage VIL DC Leakage Current 6 IIN 4.0 V 1.0 V VIN =DGND to DVDD CLK Input Capacitance 5 µA 5 pF Clock Timing ( See Figure 1.)7 Clock Period 1/FS 50 66.7 ns High Pulse Width tPWH 25 33.3 ns Low Pulse Width tPWL 25 33.3 ns Logical “1” Voltage VOH 4.5 Logical “0” Voltage VOL Data Valid Delay 8 t DL C OUT =15 pF DIGITAL OUTPUTS 0.4 10 Rev. 4.00 3 V I LOAD = 4 mA V I LOAD = 4 mA ns XRD8775 ELECTRICAL CHARACTERISTICS TABLE (CONT'D) UNLESS OTHERWISE SPECIFIED: AVDD = DVDD = 5V, FS = 15MHZ (50% DUTY CYCLE), VRT = 2.6V, VRB = 0.6V, TA = 25°C 25°C Parameter Symbol Min Typ Max Units Test Conditions/Comments AC PARAMETERS Differential Gain Error dG 2 % FS = 4 x NTSC Differential Phase Error dPH 1 Degree FS = 4 x NTSC POWER SUPPLIES Operating Voltage (AVDD, DVDD)9 VDD Current (AGND + DGND) I DD 4.5 5 5.5 V 15 25 mA Does not include ref. current NOTES 1. The difference between the measured and the ideal code width (VREF/256) is the DNL error (Figure 3). The INL error is the maximum distance (in LSBs) from the best fit line to any transition voltage (Figure 4). Accuracy is a function of the sampling rate (FS). 2. Guaranteed, not tested. 3. Specified values guarantee functionality. Refer to other parameters for accuracy. 4. –1dB bandwidth is a measure of performance of the A/D input stage (S/H + amplifier). Refer to other parameters for accuracy within the specified bandwidth. 5. See VIN input equivalent circuit (Figure 5). Switched capacitor analog input requires driver with low output resistance. 6. All inputs have diodes to DVDD and DGND. Input DC currents will not exceed specified limits for any input voltage between DGND and DVDD . 7. tR , tF should be limited to >5ns for best results. 8. Depends on the RC load connected to the output pin. 9. AGND & DGND pins are connected through the silicon substrate. Connect together at the package and to the analog ground plane. Specifications are subject to change without notice ABSOLUTE MAXIMUM RATINGS (TA = +25°C unless otherwise noted)1, 2, 3 VDD to GND .......................................................... 7V Storage Temperature .........................–65 to +150°C VRT & V RB ......................... VDD +0.5 to GND –0.5V Lead Temperature (Soldering 10 seconds) ... +300°C VIN ..................................... VDD +0.5 to GND –0.5V Package Power Dissipation Rating @ 75°C All Inputs ............................ VDD +0.5 to GND –0.5V PDIP, SOIC, SSOP .............................. 650mW All Outputs ......................... VDD +0.5 to GND –0.5V Derates above 75°C ............................. 9mW/°C NOTES: 1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2. Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps (HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short transients outside the supplies of less than 100µA for less than 100ms. 3. VDD refers to AVDD and DVDD. GND refers to AGND and DGND. Rev. 4.00 4 XRD8775 Figure 1. XRD8775 Timing Diagram Figure 2. DNL Measurement Figure 3. INL Error Calculation Figure 4. Equivalent Input Circuit Figure 5. Typical Circuit Connections Rev. 4.00 5 XRD8775 APPLICATION NOTES The digital outputs should not drive long wires or buses. The capacitive coupling and reflections will contribute noise to the conversion. Signals should not exceed AVDD +0.5V or go below AGND -0.5V or DVDD +0.5V or DGND -0.5V. All pins have internal protection diodes that will protect them from short transients (