DATA SHEET
AAT2630: Wireless Data Card PMIC 10-Channel DC-DC
Converter
Applications
Description
Wireless mini, or half-mini PCI express cards
The AAT2630 contains two fully integrated, step-down converters,
eight low-dropout (LDO) regulators, a 1.25 V voltage reference, a
19.2 MHz clock buffer, a 32 kHz frequency output, and three LED
drivers in a 3 mm 3 mm Wafer Level Chip Scale Package
(WLCSP), making it ideal for wireless data cards or modules and
on-board modems.
Express cards
USB wireless modules
SDIO modules
On-board wireless modems
Features
VIN range: 3.0 V to 5.5 V
Two 1.92 MHz synchronous step-down converters:
180° out-of-phase operation
Buck1: 1.375 V, 500 mA output
Buck2: 2.1 V, 500 mA output
Light load, low noise switching mode
Eight LDO regulators:
Two with 300 mA output:
LDO1 for MSME: 1.8 V
LDO3 for MSMA: 2.6 V
Three with 150 mA output:
LDO2 for MSMP: 2.6 V
LDO4 for MMC: 3.0 V
LDO8 for RFRX: 2.75 V
Three with 50mA output:
LDO5 for RUIM: 1.8 V/3.0 V
LDO6 for TCXO: 2.85 V
LDO7 for USB: 3.1 V
The two step-down converters are synchronous with internal
compensation. Switching at 1.92 MHz, they operate 180° out of
phase to minimize the number and size of the external
components and to provide efficiencies higher than 90%.
The eight LDOs are high PSRR type, requiring only a small output
ceramic capacitor for stability.
Power-on reset and automatic power-up sequence, which are
common in system architectures involving a processor, are
defined for the supplies. The AAT2630 also includes over-current
and over-temperature protection.
The AAT2630 is available in a 49-bump, 3 mm 3 mm WLCSP
package.
A typical application circuit is shown in Figure 1. The pin
configurations are shown in Figure 2. Signal pin assignments
descriptions are provided in Table 1.
Skyworks Green™ products are compliant with
all applicable legislation and are halogen-free.
For additional information, refer to Skyworks
Definition of Green™, document number
SQ04-0074.
High PSRR (70 dB @1 KHz)
Over-current and over-temperature protection
Power-on reset
Power up with defined sequence
1.25 V voltage reference
19.2 MHz clock buffer
32.7645 kHz frequency output
WLCSP (49-bump, 3 mm 3 mm) package (MSL1, 260 ºC per
JEDEC J-STD-020)
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
3 V ~ 5 V available in USB/EC/PCIe
EN_LED3
EN_LED2
EN_LED1
Resistors are
optional
TCXO_IN
TCXO OUT
TCXO_OUT
32 k_OUT
SLEEP_ OUT
EN_RUIM
EN_RUIM
SEL_RUIM
SEL_RUIM
POWER_ON
POWER_ON
Power-On Reset#
LED_RED
LED_BLUE
TCXO IN
LED_EN3
EN_TCXO
LED_EN2
LED_EN1
EN_TCXO
LED_GREEN
VDD_IN3
LDOs’ Input
VDD_IN4
LDOs’ Input
BYP
BYP
VREF
VREF
MSME
1.8 V, 300 mA
VREG_MSME
3 V ~ 5.5 V
4.7μF
2.2μF
RESET
2.2μF
0.1μF
4.7μF
VBUS
0.47 μF
RF_RX
2.75 V, 150 mA
MSMP
2.6 V, 150 mA
MSMA
2.6 V, 300 mA
MMC
3.0 V, 150 mA
VREG_RFRX
AAT2630
3 V ~ 5.5 V
VDD_IN1
10 μF
VREG_MSMP
VREG_MSMA
VREG_MMC
2.2 μH
VSW_MSMC
MSMC
1.375 V, 500 mA
2.2 μF
2.2 μF
2.2 μF
2.2 μF
VREG_MSMC
10 μF
RUIM
1.8 V/3 V, 50 mA
TCXO
2.85 V, 50 mA
USB 3.1 V, 50 mA
VREG_RUIM
VREG_TCXO
VDD_IN2
3 V ~ 5.5 V
10 μF
VREG_USB
2.2 μH
VSW_RFTX
VIN_MSME
VREG_RFTX
RF_TX
2.1 V , 500 mA
10 μF
2.2 μF
2.2 μF
GND_RFTX GND_MSMC GND_TCXO GND_REF AGND
2.2 μF
tc201
Figure 1. AAT2630 Typical Application Circuit
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A
VIN_
MSME
VREG_
MSME
VREG_
MSMA
VDD_
IN3
VREG_
MMC
VREG_
TCXO
AGND
B
VREG_
RFTX
LED_
EN2
LED_
EN1
LED_
EN3
LED_
GREEN
LED_
BLUE
LED_
RED
C
GND_
RFTX
SLEEP
_OUT
AGND
AGND
AGND
GND_
TCXO
TCXO_
IN
D
VSW_
RFTX
RESET
AGND
AGND
AGND
GND_
REF
TCXO_
OUT
E
VDD_
IN2
EN_
TCXO
AGND
AGND
AGND
VREF
VREG_
MSMP
F
VDD
_IN1
POWER
_ON
BYP
EN_
RUIM
SEL_
RUIM
VREG_
RUIM
VREG_
RFRX
G
VBUS
VSW_
MSMC
GND_
MSMC
VREG_
MSMC
VREG_
USB
VDD_
IN4
AGND
1
2
3
4
5
6
7
tc202
DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Figure 2. AAT2630 Pinout – 49-Bump, 3 mm 3 mm WLCSP
(Top View)
Table 1. AAT2630 Signal Descriptions (1 of 2)
Pin
Name
Type
PWR
Description
A1
VIN_MSME
Supply voltage for LDO MSME.
A2
VREG_MSME
O
LDO1 output for MSME.
A3
VREG_MSMA
O
LDO3 output for MSMA.
A4
VDD_IN3
PWR
Supply voltage for LDO3/4/6 = VREG_MSMA/VREG_MMC/VREG_TCXO and internal analog blocks such as band-gap.
UVLO senses VDD_IN3.
A5
VREG_MMC
O
LDO4 output for MMC.
A6
VREG_TCXO
O
LDO6 output for TCXO.
A7
AGND
GND
Analog ground.
B1
VREG_RFTX
O
Buck2 output for RFTX.
B2
LED_EN2
I
Active high LED2 driver enable for red.
B3
LED_EN1
I
Active high LED1 driver enable for blue.
B4
LED_EN3
I
Active high LED3 driver enable for green.
B5
LED_GREEN
O
LED3 driver output for green.
B6
LED_BLUE
O
LED1 driver output for blue.
B7
LED_RED
O
LED2 driver output for red.
C1
GND_RFTX
GND
Switching current return path of Buck2 for RFTX.
C2
SLEEP_OUT
O
32 kHz frequency signal output.
C3
AGND
GND
Ground.
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Table 1. AAT2630 Signal Descriptions (2 of 2)
Pin
Name
Type
Description
C4
AGND
GND
Ground.
C5
AGND
GND
Ground.
C6
GND_TCXO
GND
GND for the 19.2 MHz buffer.
C7
TCXO_IN
I
19.2 MHz frequency signal buffer input.
D1
VSW_RFTX
O
Switching node of Buck2 for RFTX, connect to an inductor.
D2
RESET
O
System power on reset (Active low) with 100 k pull up resistor to VREG_MSMP internally.
D3
AGND
GND
Ground.
D4
AGND
GND
Ground.
D5
AGND
GND
Ground.
D6
GND_REF
GND
Reference ground.
D7
TCXO_OUT
O
19.2 MHz frequency signal buffer output.
E1
VDD_IN2
PWR
Supply voltage of the Buck2 power switches for RFTX.
E2
EN_TCXO
I
19.2 MHz frequency signal buffer enable input (active high) with internal 1.5 M pull down resistor.
E3
AGND
GND
Ground.
E4
AGND
GND
Ground.
E5
AGND
GND
Ground.
E6
VREF
O
1.25 V reference voltage output.
E7
VREG_MSMP
O
LDO2 output for MSMP.
F1
VDD_IN1
PWR
Supply voltage of the Buck1 power switches for MSMC.
F2
POWER_ON
I
Active high PMU power on with internal 1.5 M pull down resistor.
F3
BYP
I
Bypass pin.
F4
EN_RUIM
I
Enable LDO5 input (Active High) for RUIM with internal 1.5 M pull down resistor.
F5
SEL_RUIM
I
LDO5 voltage select for RUIM High = 3.0 V, Low = 1.8 V with 1.5 M pull down resistor.
F6
VREG_RUIM
O
LDO5 output for RUIM.
F7
VREG_RFRX
O
LDO8 output for RFRX.
G1
VBUS
I
Supply voltage for VREG_USB and buck converter control blocks. VBUS must be shorted to VDD_IN1 and VDD_IN2.
G2
VSW_MSMC
O
Switching node of Buck1 for MSMC, connect to an inductor.
G3
GND_MSMC
GND
Switching current return path of Buck1 for MSMC.
G4
VREG_MSMC
O
Buck1 output for MSMC.
G5
VREG_USB
O
LDO7 output for USB.
G6
VDD_IN4
PWR
Supply voltage for LDO2/5/8 = VREG_MSMP/VREG_RUIM/VREG_RFRX.
G7
AGND
GND
Analog ground.
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Electrical and Mechanical Specifications
Table 2, the thermal information is listed in Table 3, and electrical
specifications are provided in Table 4.
The absolute maximum ratings of the AAT2630 are provided in
Table 2. AAT2630Absolute Maximum Ratings (Note 1)
Parameter
Symbol
Minimum
Typical
Maximum
Units
VDD_IN1 to GND_MSMC, VDD_IN2 to GND_RFTX, LED_BLUE,
LED_RED, LED_GREEN, VDD_IN3, VDD_IN4, RESET to AGND
VIN_ABS
0.3
6.5
V
VSW_MSMC to GND_MSMC, VSW_RFTX to GND_RFTX
VP_ABS
0.3
VDD_IN1 + 0.3
V
All other input pins other than VDD_IN1, VDD_IN2, LED_BLUE,
LED_RED, LED_GREEN, VDD_IN3, VDD_IN4, RESET, VSW_MSMC,
VSW_RFTX to AGND
VN_ABS
0.3
VDD_IN1 + 0.3
V
GND_MSMC and GND_RFRX to AGND
VG_ABS
0.3
0.3
V
Operating temperature range
TJ
40
125
ºC
Storage temperature range
TS
65
150
ºC
Maximum soldering temperature (at leads, 10 sec)
TLEAD
300
ºC
Note 1: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other
parameters set at or below their nominal value. Exceeding any of the limits listed may result in permanent damage to the device.
Table 3. AAT2630 Thermal Information (Note 1)
Parameter
Symbol
Value
Units
Thermal resistance
JA
52.5
ºC/W
Maximum power dissipation
PD
1.9
W
Note 1: Mounted on an FR4 board.
CAUTION: Although this device is designed to be as robust as possible, electrostatic discharge (ESD) can damage this device. This
device must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body or
equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times.
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Table 4. AAT2630 Electrical Specifications (1 of 5) (Note 1)
(VBUS = VDD_IN1 = VDD_IN2 = VDD_IN3 = VDD_IN4 = 3.6 V, VPOWER_ON = 3.6 V, VEN_TCXO = VEN_RUIM = 3.6 V, VSEL_RUIM = 3.6 V, CINB = 10 F,
COUTB = 10 F, CvREF = 2.2 F, CINL = 4.7 F, COUTL = 2.2 F, CBYP = 0.1 F, CVBUS = 0.47 F, TA = –40 C to +85 C, Typical Values are
TA = 25 C, Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Min
Typical
Max
Units
5.5
V
Operation
Normal operating buck input voltage range
VDD_IN1,
VDD_IN2, VBUS
Normal operating ldo input voltage range
VDD_IN3, VDD_IN4
3.0
2.9
VDD_IN3 falling
Input under voltage lockout
VUVLO
2.3
Hysteresis
Blanking time
Operating current
IOP
Standby supply current
ISTDBY
IOUTB = 0 mA, IOUT = 0 mA,
TCXO_IN = 0
VPOWER_ON = 0 V
2.55
4.0
V
2.8
V
200
mV
1
s
8
mA
110
A
VREF
Nominal VREF voltage
VREF
1.25
V
Temperature coefficient
VREF/ºC
100
ppm/°C
Absolute error
VREF/VREF
Nominal output current
IREF
All conditions
0.7
+0.7
%
A
300
Step-Down Buck Regulators (Buck1 and Buck2)
Buck1 output voltage
VREG_MSMC
IOUTB1 = 10 mA, TA = 25 °C
1.30
Buck2 output voltage
VREG_RFTX
IOUTB2 = 10 mA, TA = 25 °C
2.00
Buck output voltage temperature coefficient
VOUTB/°C
100
ppm/°C
Buck nominal output current
IOUTB1, IOUTB2
500
mA
P-channel current limit
ILIMB1, ILIMB2
Switching frequency
fSW
1.92
MHz
Efficiency
Settling time
Overshoot
Transient
Response
1.375
1.45
2.1
2.45
1000
V
mA
IOUTB1 = 300 mA
90
%
IOUTB1 = 500 mA
87
%
IOUTB1 = 600 mA
86
%
IOUTB2 = 300 mA
92
%
IOUTB2 = 500 mA
91
%
IOUTB2 = 600 mA
90
%
To within 1% of final value
40
μs
IOUTB = 300 mA to 10 mA in 1 s
100
mV
Undershoot
IOUTB = 10 mA to 300 mA in 1 s
100
mV
Load regulation
IOUTB = 10 mA to 500 mA
0.65
%
0.2
%/V
Line regulation
VDD_IN1 = VDD_IN2 = 3 V to 5 V,
IOUTB = 100 mA
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Table 4. AAT2630 Electrical Specifications (2 of 5) (Note 1)
(VBUS = VDD_IN1 = VDD_IN2 = VDD_IN3 = VDD_IN4 = 3.6 V, VPOWER_ON = 3.6 V, VEN_TCXO = VEN_RUIM = 3.6 V, VSEL_RUIM = 3.6 V, CINB = 10 F,
COUTB = 10 F, CvREF = 2.2 F, CINL = 4.7 F, COUTL = 2.2 F, CBYP = 0.1 F, CVBUS = 0.47 F, TA = –40 C to +85 C, Typical Values are
TA = 25 C, Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Min
Typical
Max
Units
LDO1 (MSME)
Normal operating input voltage range
VIN_MSME
Output voltage
VOUT1
Temperature coefficient
VOUT1/°C
Maximum output current
IOUT1
Dropout voltage
VLDO1_DO
Load regulation
VOUTB2
IOUT1 = 10 mA
1.75
VNOISE
Power supply rejection ratio
1.85
100
300
IOUT1 = 300 mA
IOUT1 = 10 mA to 300 mA
Line regulation
1.8
V
V
ppm/°C
450
mA
150
300
mV
6
50
mV
VIN_MSME = 2.0 V to 2.2 V, IOUT1 = 50 mA
0.1
%/V
IOUT1 = 50 mA, 10 Hz to 10 kHz
350
VRMS
IOUT1 = 50 mA, 10 Hz to 10 kHz, CBYP = 1 F
60
VRMS
f = 1 kHz, IOUT1 = 50 mA, VIN_MSME = 2.1 V
70
dB
f = 10 kHz, IOUT1 = 50 mA, VIN_MSME = 2.1 V
50
dB
PSRROUT1
LDO2 (MSMP)
Output voltage
VOUT2
Temperature coefficient
VOUT2/°C
Maximum output current
IOUT2
Dropout voltage
VLDO2_DO
IOUT2 = 10 mA
2.52
300
IOUT2 = 150 mA
2.6
ppm/°C
500
mA
150
300
5
50
IOUT2 = 10 mA to 150 mA
Line regulation
VDD_IN4 = 3.0 V to 4.0 V, IOUT2 = 50 mA
0.1
Power supply rejection ratio
V
100
Load regulation
VNOISE
2.68
mV
mV
%/V
IOUT2 = 50 mA, 10 Hz to 10 kHz
350
VRMS
IOUT2 = 50 mA, 10 Hz to 10 kHz, CBYP = 1 F
60
VRMS
f = 1 kHz, IOUT2 = 50 mA, VDD_IN4 = 2.1 V
70
dB
f = 10 kHz, IOUT2 = 50 mA, VDD_IN4 = 2.1 V
50
dB
PSRROUT2
LDO3 (MSMA)
Output voltage
VOUT3
Temperature coefficient
VOUT3/°C
Maximum output current
IOUT3
Dropout voltage
VLDO3_DO
Load regulation
IOUT3 = 10 mA
VNOISE
Power supply rejection ratio
2.6
2.68
100
300
IOUT3 = 300 mA
IOUT3 = 10 mA to 300 mA
Line regulation
2.52
V
ppm/°C
550
mA
200
400
mV
5
50
mV
VDD_IN4 = 3.0 V to 4.0 V, IOUT3 = 50 mA
0.1
%/V
IOUT3 = 50 mA, 10 Hz to 10 kHz
350
VRMS
IOUT3 = 50 mA, 10 Hz to 10 kHz, CBYP = 1 F
60
VRMS
f = 1 kHz, IOUT3 = 50 mA,
VDD_IN3 = VOUT3 + 1 V
70
dB
f = 10 kHz, IOUT3 = 50 mA,
VDD_IN3 = VOUT3 + 1 V
50
dB
PSRROUT3
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Table 4. AAT2630 Electrical Specifications (3 of 5) (Note 1)
(VBUS = VDD_IN1 = VDD_IN2 = VDD_IN3 = VDD_IN4 = 3.6 V, VPOWER_ON = 3.6 V, VEN_TCXO = VEN_RUIM = 3.6 V, VSEL_RUIM = 3.6 V, CINB = 10 F,
COUTB = 10 F, CvREF = 2.2 F, CINL = 4.7 F, COUTL = 2.2 F, CBYP = 0.1 F, CVBUS = 0.47 F, TA = –40 C to +85 C, Typical Values are
TA = 25 C, Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Min
Typical
Max
3.0
3.1
Units
LDO4 (MMC)
Output voltage
VOUT4
Temperature coefficient
VOUT4/°C
Maximum output current
IOUT4
Dropout voltage
VLDO4_DO
Load regulation
IOUT4 = 10 mA
2.9
300
IOUT4 = 150 mA
IOUT4 = 10 mA to 150 mA
Line regulation
VNOISE
Power supply rejection ratio
PSRROUT4
V
100
ppm/°C
550
mA
100
300
mV
5
50
mV
VDD_IN3 = 3.0 V to 4.0 V, IOUT4 = 50 mA
0.1
%/V
IOUT4 = 50 mA, 10 Hz to 10 kHz
350
VRMS
IOUT4 = 50 mA, 10 Hz to 10 kHz, CBYP = 1 F
60
VRMS
f = 1 kHz, IOUT4 = 50 mA,
VDD_IN3 = VOUT4 + 1 V
70
dB
f = 10 kHz, IOUT4 = 50 mA,
VDD_IN3 = VOUT4 + 1 V
50
dB
LDO5 (RUIM)
Output voltage
VOUT5
Temperature coefficient
VOUT5/°C
Maximum output current
IOUT5
Dropout voltage
VLDO5_DO
Load regulation
Line regulation
VNOISE
Power supply rejection ratio
SEL_RUIM = 3.6 V
2.9
SEL_RUIM = 0 V
1.75
3.0
3.1
1.8
1.85
V
IOUT5 = 10 mA
300
V
100
ppm/°C
550
mA
IOUT5 = 50 mA
40
300
mV
IOUT5 = 10 mA to 50 mA
3
50
mV
VDD_IN3 = 3.0 V to 4.0 V, IOUT5 = 50 mA
0.1
%/V
IOUT5 = 50 mA, 10 Hz to 10 kHz
350
VRMS
IOUT5 = 50 mA, 10 Hz to 10 kHz, CBYP = 1 F
60
VRMS
f = 1 kHz, IOUT5 = 50 mA,
VDD_IN3 = VOUT5 + 1 V
70
dB
f = 10 kHz, IOUT5 = 50 mA,
VDD_IN4 = VOUT5 + 1 V
50
dB
PSRROUT5
LDO6 (TCXO)
Output voltage
VOUT6
Temperature coefficient
VOUT6/°C
Maximum output current
IOUT6
Dropout voltage
VLDO6_DO
IOUT6 = 10 mA
2.77
300
IOUT6 = 50 mA
2.85
2.93
100
ppm/°C
500
mA
50
150
3
50
mV
Load regulation
IOUT6 = 10 mA to 50 mA
Line regulation
VDD_IN3 = 3.0 V to 4.0 V, IOUT6 = 50 mA
0.1
%/V
IOUT6 = 50 mA, 10 Hz to 10 kHz
350
VRMS
VNOISE
Power supply rejection ratio
PSRROUT6
mV
IOUT6 = 50 mA, 10 Hz to 10 kHz, CBYP = 1 F
60
VRMS
f = 1 kHz, IOUT6 = 50 mA,
VDD_IN3 = VOUT6 + 1 V
70
dB
f = 10 kHz, IOUT6 = 50 mA,
VDD_IN3 = VOUT6 + 1 V
50
dB
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Table 4. AAT2630 Electrical Specifications (4 of 5) (Note 1)
(VBUS = VDD_IN1 = VDD_IN2 = VDD_IN3 = VDD_IN4 = 3.6 V, VPOWER_ON = 3.6 V, VEN_TCXO = VEN_RUIM = 3.6 V, VSEL_RUIM = 3.6 V, CINB = 10 F,
COUTB = 10 F, CvREF = 2.2 F, CINL = 4.7 F, COUTL = 2.2 F, CBYP = 0.1 F, CVBUS = 0.47 F, TA = –40 C to +85 C, Typical Values are
TA = 25 C, Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Min
Typical
Max
3.10
3.20
Units
LDO7 (USB)
Output voltage
VOUT7
Temperature coefficient
VOUT7/°C
Maximum output current
IOUT7
Dropout voltage
VLDO7_DO
Load regulation
Line regulation
VNOISE
Power supply rejection ratio
PSRROUT7
IOUT7 = 10 mA
3.00
75
V
100
ppm/°C
150
mA
IOUT7 = 50 mA
80
150
mV
IOUT7 = 10 mA to 50 mA
3
50
mV
VDD_IN4 = 3.6 V to 5.0 V, IOUT7 = 50 mA
0.1
%/V
IOUT7 = 50 mA, 10 Hz to 10 kHz
350
VRMS
IOUT7 = 50 mA, 10 Hz to 10 kHz, CBYP = 1 F
60
VRMS
f = 1 kHz, IOUT7 = 50 mA,
VBUS = VOUT7 + 1 V
70
dB
f = 10 kHz, IOUT7 = 50 mA,
VBUS = VOUT7 + 1 V
50
dB
LDO8 (RFRX)
Output voltage
VOUT8
Temperature coefficient
VOUT8/°C
Maximum output current
IOUT8
Dropout voltage
VLDO8_DO
IOUT8 = 10 mA
2.67
300
IOUT8 = 150 mA
2.75
ppm/°C
550
mA
150
300
5
50
IOUT8 = 10 mA to 150 mA
Line regulation
VDD_IN4 = 3.6 V to 5.0 V, IOUT8 = 50 mA
0.1
Power supply rejection ratio
PSRROUT8
V
100
Load regulation
VNOISE
2.83
mV
mV
%/V
IOUT8 = 50 mA, 10 Hz to 10 kHz
350
VRMS
IOUT8 = 50 mA, 10 Hz to 10 kHz, CBYP = 1 F
60
VRMS
f = 1 kHz, IOUT8 = 50 mA,
VDD_IN4 = VOUT8 + 1 V
70
dB
f = 10 kHz, IOUT8 = 50 mA,
VDD_IN4 = VOUT8 + 1 V
50
dB
LED Driver
LED supply voltage
VLED
LED drive current
ILED
LED1, LED2, LED3 output low
VOL_LED
3.6
ILED = 5 mA
5
V
10
mA
0.5
V
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Table 4. AAT2630 Electrical Specifications (5 of 5) (Note 1)
(VBUS = VDD_IN1 = VDD_IN2 = VDD_IN3 = VDD_IN4 = 3.6 V, VPOWER_ON = 3.6 V, VEN_TCXO = VEN_RUIM = 3.6 V, VSEL_RUIM = 3.6 V, CINB = 10 F,
COUTB = 10 F, CvREF = 2.2 F, CINL = 4.7 F, COUTL = 2.2 F, CBYP = 0.1 F, CVBUS = 0.47 F, TA = –40 C to +85 C, Typical Values are
TA = 25 C, Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Min
Typical
Max
Units
TCXO Buffer
19 M clock period
tTCXO_IN
52.083
ns
19 M frequency
fTCXO_IN
19.2
MHz
Start-up time (Note 2)
tEN_TCXO
From EN_TCXO assertion
Input amplitude
VPP(TCXO_IN)
At TCXO_IN, sine wave with 1000 pF
coupling capacitor
0.5
Parallel resistance
50
Input impedance
ZIN(TCXO_IN)
0.1
Parallel capacitance
Output logic high
VOH
Output logic low
VOL
Output duty cycle (Note 2)
IOH = 5 mA
ms
2.0
VPP
k
2.0
pF
VOUT2 0.45
V
IOL = 5 mA
Sinusoid at TCXO_IN
3.0
43.5
High level, TCXO outputs
IOH_TCXO
Low level, TCXO outputs
IOL_TCXO
Output rise time (Note 2)
tRISE(TCXO_OUT)
10% to 90%, CLOAD < 25 pF
2
Output fall time (Note 2)
tFALL(TCXO_OUT)
90% to 10%, CLOAD < 25 pF
2
Standby current of clock buffer (Note 2)
ISBY(TCXO)
VEN_TCXO = 0 V
50
0.45
V
56.5
%
6.0
mA
5
-6.0
mA
10
ns
5
10
ns
500
1000
A
30.518
33.333
s
32 kHz Clock
32 kHz clock period (Note 2)
tSLEEP_OUT
32 kHz frequency
fSLEEP_OUT
Output logic high
VOH
IOH = 5 mA
Output logic low
VOL
IOL = 5 mA
Output duty cycle (Note 2)
Output amplitude
16.667
32.7645
Sinusoid at TCXO_IN
VPP(SLEEP_OUT)
kHz
VOUT2 0.45
V
0.45
15
50
1.5
V
85
%
3.0
VPP
Logic (LED_EN1, LED_EN2, LED_EN3, POWER_ON, EN_RUIM, SEL_RUIM, RESET)
Input logic high
VIH
Input logic low
VIL
1.4
OD output leakage
IOH
Pull up to VREG_MSMP,
leakage into output, RESET
Output logic low
VOL
IOL = 1 mA, RESET
V
0.4
V
1
A
0.4
V
Power On Sequence
Power-on event to MSMC enable
t1
6
ms
Regulator Settling Time
t2
Delay between regulator turns on
t3
122
s
122
s
Last LDO(VREF) on to RESET = High
t4
60
ms
RESET active to LDO(USB/MMC) on (Note 2)
t5
2.5
Refer to Figure 14 for the power-on
sequence on page 14.
5
ms
Thermal
Shutdown temperature
TSD
Rising
140
°C
Hysteresis temperature
THYS
Falling
15
°C
Note 1: Performance is guaranteed only under the conditions listed in this table.
Note 2: Guaranteed by design.
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VBUS = VDD_IN1 = VDD_IN2 = VDD_IN3 = VDD_IN4 = 3.6 V, VPOWER_ON = 3.6 V, VEN_TCXO = VEN_RUIM = 3.6 V, VSEL_RUIM = 3.6 V,
CINB = 10 F, COUTB = 10 F, CVREF = 2.2 F, CINL = 4.7 F, COUTL = 2.2 F, CBYP = 0.1 F, CVBUS = 0.47 F, TA = –40 C TO +85 C,
TYPICAL VALUES ARE TA = 25 C, UNLESS OTHERWISE NOTED
Typical performance characteristics of the AAT2630 are
illustrated in Figures 3 through 12.
120
100
90
80
70
110
Magnitude (dB)
105
100
95
60
50
40
30
-15
10
35
60
10
0
100
85
Temperature (°C)
90
95
Efficiency (%)
Efficiency (%)
100
85
VIN = 3 V
VIN = 3.2 V
VIN = 3.4 V
VIN = 3.6 V
VIN = 3.8 V
VIN = 4.0 V
85
VIN = 3 V
VIN = 3.2 V
VIN = 3.4 V
VIN = 3.6 V
VIN = 3.8 V
VIN = 4.0 V
80
75
100
1000
70
10
Output Current (mA)
100
1000
Output Current (mA)
Figure 5. Buck1 Efficiency vs Output Current
Figure 6. Buck2 Efficiency vs Output Current
2.30
700
600
2.10
600
1.25
500
1.90
500
1.70
400
1.50
300
1.30
200
1.10
100
400
Output Voltage
(200 mV/div) (top)
700
1.38
1.00
300
0.88
200
0.75
100
0.63
0
0.90
0
0.50
-100
0.70
-100
Time (100 μs/div)
tc207
Figure 7. Buck1 Load Transient Response (VIN = 3.6 V; IOUT is
10 mA to 300 mA, VOUT = 1.375 V; COUT = 4.7 F)
Time (100 μs/div)
Output Current
(100 mA/div) (bottom)
1.50
Output Current
(100 mA/div) (bottom)
Output Voltage
(125 mV/div) (top)
100,000
90
tc205
70
10
10,000
Figure 4. LDO Power Supply Rejection Ratio, PSRR (IOUT = 50 mA)
95
75
1,000
Frequency (Hz)
Figure 3. Standby Current vs Temperature (VIN = 3.6 V)
80
tc204
90
-40
tc203
20
tc206
Standby Current (μA)
115
tc208
Figure 8. Buck2 Load Transient Response (VIN = 3.6 V; IOUT is
10 mA to 300 mA, VOUT = 2.1 V; COUT = 4.7 F)
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Typical Performance Characteristics
0.98
0.96
0.96
0.94
0.92
0.9
0.88
0.86
0.84
0.82
3
3.2
3.4
3.6
3.8
0.94
0.92
0.9
0.88
0.86
0.84
tc210
Enable Threshold Voltage (V)
0.98
tc209
Enable Threshold Voltage (V)
VBUS = VDD_IN1 = VDD_IN2 = VDD_IN3 = VDD_IN4 = 3.6 V, VPOWER_ON = 3.6 V, VEN_TCXO = VEN_RUIM = 3.6 V, VSEL_RUIM = 3.6 V,
CINB = 10 F, COUTB = 10 F, CVREF = 2.2 F, CINL = 4.7 F, COUTL = 2.2 F, CBYP = 0.1 F, CVBUS = 0.47 F, TA = –40 C TO +85 C,
TYPICAL VALUES ARE TA = 25 C, UNLESS OTHERWISE NOTED
0.82
3
4
3.2
0.96
0.94
0.92
0.9
0.88
0.86
0.84
0.82
3.6
3.8
4
Input Voltage (V)
Figure 11. SEL_RUIM Threshold Voltage vs Input Voltage
0.94
0.92
0.9
0.88
0.86
0.84
0.82
3
3.2
3.4
3.6
3.8
Input Voltage (V)
Figure 12. LED_EN Threshold Voltage vs Input Voltage
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4
tc212
ENable Threshold Voltage (V)
0.98
0.96
tc211
High Threshold Voltage (V)
0.98
3.4
3.8
Figure 10. EN_RUIM Threshold Voltage vs Input Voltage
Figure 9. Power-On Threshold Voltage vs Input Voltage
3.2
3.6
Input Voltage (V)
Input Voltage (V)
3
3.4
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LED
GREEN
LED
BLUE
LED
RED
DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
EN_LED1
VREF
Vref
UVLO
EN_LED2
LED DRIVER
GND_REF
1.5 M
VIN_MSME
1.5 M
1.5 M
EN_LED3
VDD_IN3
BYP
Bandgap,
OverTemperature,
Power-on
reset circuit
POWER_ON
VDD_IN4
1.5 M
RESET
LDO1
VREG_MSME
LDO2
VREG_MSMP
LDO3
VREG_MSMA
LDO4
VREG_MMC
100 k
VDD_IN1
VSW_MSMC
BUCK1
VREG_MSMC
EN_RUIM
GND_MSMC
VREG_RUIM
LDO5
VDD_IN2
SEL_RUIM
VSW_RFTX
BUCK2
SLEEP_OUT
Sine-tosquare
LDO7
VREG_USB
LDO8
VREG_RFRX
32 kHz
Divider
TCXO_OUT
EN_TCXO
1.5 M
1.5 M
GND_RFTX
TCXO_IN
VREG_TCXO
LDO6
VREG_RFTX
1.5 M
GND_TCXO
AGND
VBUS
tc213
Figure 13. AAT2630 Functional Block Diagram
Functional Description
The AAT2630 is targeted for data cards, data modules, and onboard circuit blocks for wireless communication function. It is
designed for half or mini-half PCI Express cards, Express Card
modules, USB dongles and SDIO modules. The AAT2630 is
sourced from a 3 V to 5.5 V power supply with supply currents
ranging from 500 mA for USB 2.0, up to 2.7 A for half or minihalf PCI express cards. It has two high efficiency step-down
converters to reduce power dissipation in space restricted
modules. Automatic power-up and shutdown sequence feature
is used in card slots without a power switch.
Figure 13 shows the functional block diagram for the AAT2630.
controlled by LED_EN1, LED_EN2, LED_EN3, EN_RUIM and
EN_TCXO. These signals are active high and are compatible
with CMOS logic. The EN pin voltage level must be greater than
1.4 V to turn on the LED. The LED will turn off when the voltage
on the EN pin falls below 0.4 V.
The AAT2630 also features a LDO regulator voltage selection
function (SEL_RUIM) for LDO5 (REG_RUIM). With SEL_RUIM = 1
(high logic) the LDO5 output (REG_RUIM) will be set to 3V. When
SEL_RUIM = 0 (low logic), the LDO5 output (REG_RUIM) is set to
1.8 V.
Power-on and Shutdown Sequence
The AAT2630 POWER_ON pin is used for power-on reset.
Enable and Selection Functions
The AAT2630 features five enable/disable functions for the
three LEDs, LDO5 (REG_RUIM) and TCXO output that are
The AAT2630 starts the power on procedure when the
POWER_ON pin is asserted. Upon POWER_ON assertion, Buck1
and Buck2 are enabled in sequence. When Buck2 is within 10%
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
TCXO Sequence
of its’ final regulation voltage, LDO_MSME, LDO_RFRX,
LDO_MSMP, LDO_MSMA, LDO_TCXO and VREF are sequenced
in cascade fashion – where each regulator is enabled after the
previous regulator is within 10% of its final voltage.
1. Once the AAT2630 LDO2 for MSMP starts to output 2.6 V,
the external oscillator (TCXO) starts to generate a 19.2 MHz
sine wave input signal. The setup time of the external
oscillator is less than 6 ms.
After VREF is within 10% of its final voltage and the RESET
delay expires, the RESET pin is released (RESET goes high).
When RESET is de-asserted (High), LDO_USB and LDO_MMC
are enabled. Note that once RESET is de-asserted it is latched
in the high state, regardless of any of the regulators falling out
of regulation, until the power on procedure starts again. The
power on and shutdown sequence is shown in Figure 14.
2. After the 6 ms set-up time, the TCXO buffer can be enabled.
3. The 32.7645 kHz signal is generated from the 19.2 MHz
signal in the AAT2630. There is no additional delay from
19.2 MHz input to the 32 kHz output.
The TCXO sequence is shown in Figure 15.
1.4 V
0.4 V
POWER _ON
t1
90%
t2
VREG_MSMC
t2 t 3
90%
t2
VREG_RFTX
t3
90%
t2
VREG_MSME
t3
90%
t2
VREG_RFRX
t3
90%
t2
VREG_MSMP
t3
90%
t2
VREG_MSMA
t3
90%
t2
VREG_TCXO
t3
90%
VREF
t4
t2
RESET
t5
90%
VREG_USB
90%
VREG_MMC
tc214
Figure 14. AAT2630 Power-On and Shutdown Timing Sequence
Setup time of
TCXO input
tD < 6 ms
VREG_MSMP
TCXO_IN
EN_TCXO
tD < 3 ms
TCXO_OUT
Internal
Counter Input
tc215
Figure 15. AAT2630 TCXO Timing Sequence
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Application Information
The AAT2630 contains two buck regulators in close proximity
and switching at high frequency. Its pad arrangement is
carefully designed for easy placement and layout. Chip
inductors should be placed in different directions to reduce the
coupling between the regulators.
RESET
RESET is an open-drain output with 100 k pull up resistor to
VREG_MSMP internally.
LED Indication
LED1 (LED_BLUE), LED2 (LED_RED) and LED3 (LED_GREEN) are
open drain outputs which sink up to 10 mA current. This is a
high current level for most LEDs. Optional resistors in series
with the LEDs can restrict the current to a preferable level for
specific LED selections.
Step-down Converter
Input Capacitor
Select a 10 F X7R or X5R ceramic capacitor for the input. To
estimate the required input capacitor size, determine the
acceptable input ripple voltage level (VPP) and solve for C using
the equations shown below. The calculated value varies with
input voltage and is a maximum when VIN is double the output
voltage.
C IN
VOUT VOUT
1
VIN
VIN
VPP
ESR f SW
I OUT
C IN ( MIN )
CIN is the input capacitance, VIN is the input voltage, VOUT is the
output voltage, fSW is the switching frequency, IOUT is the output
current, and ESR is the equivalent series resistor of the input
capacitor.
The maximum input capacitor RMS current is:
VOUT VOUT
1
VIN
VIN
The input capacitor RMS ripple current varies with the input and
output voltages and is always less than or equal to half of the
total DC load current.
I RMS ( MAX )
I
OUT
2
The input capacitor provides a low impedance loop for the
edges of pulsed current drawn by the AAT2630. Low ESR/ESL
X7R and X5R ceramic capacitors are ideal for this function. To
minimize parasitic inductances, the capacitor should be placed
as close as possible to the IC. This keeps the high frequency
content of the input current localized, minimizing EMI and input
voltage ripple.
The proper placement of the input capacitors (C2, C4) is shown
in the evaluation board layout in Figure 18.
A laboratory test setup typically consists of two long wires
running from the bench power supply to the evaluation board
input voltage pins. The inductance of these wires, along with
the low-ESR ceramic input capacitor, can create a high Q
network that may affect converter performance, in the form of
excessive ringing in the output voltage during load transients.
Errors can also result in the loop phase and gain
measurements. Since the inductance of a short PCB trace
feeding the input voltage is significantly lower than the power
leads from the bench power supply, most applications do not
exhibit this problem.
In applications where the input power source lead inductance
cannot be reduced to a level that does not affect the converter
performance, place a high ESR tantalum or aluminum
electrolytic capacitor in parallel with the low ESR/ESL bypass
ceramic capacitor. This dampens the high Q network and
stabilizes the system.
Output Capacitor
1
VPP
4
ESR f SW
I OUT
I RMS I OUT
The maximum input voltage ripple also appears at 50% duty
cycle.
The output capacitor limits the output voltage ripple and
provides holdup during large load transitions. A 4.7 F X5R or
X7R ceramic capacitor typically provides sufficient bulk
capacitance to stabilize the output during large load transitions
and has the ESR and ESL characteristics necessary for low
output ripple voltage.
The output voltage droop due to a load transient is dominated
by the capacitance of the ceramic output capacitor. During a
step increase in load current, the ceramic output capacitor
alone supplies the load current until the loop responds. Within
two or three switching cycles, the loop responds and the
inductor current increases to match the load current demand.
The relationship of the output voltage droop during the three
switching cycles to the output capacitance can be estimated by:
COUT
3 I LOAD
VDROOP f SW
Once the average inductor current increases to the DC load
level, the output voltage recovers. The above equation
establishes a limit on the minimum value for the output
capacitor with respect to load transients.
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Output Inductor
For most designs, the AAT2630 operates with inductor values of
2.2 H to 4.7 H. Inductors with low inductance values are
physically smaller but generate higher inductor current ripple
leading to higher output voltage ripple. The inductor value can
be derived from the following equation:
VOUT VIN VOUT
VIN I LOAD f SW
L
Where ILOAD is inductor ripple current. Large value inductors
result in lower ripple current and small value inductors result in
high ripple current. Choose inductor ripple current
approximately 30% of the maximum load current 0.5 A, or
I LOAD 150 mA
Manufacturer’s specifications list both the inductor DC current
rating, which is a thermal limitation, and the peak current
rating, which is determined by the saturation characteristics.
The inductor should not show any appreciable saturation under
normal load conditions. The DC current rating of the inductor
should be at least equal to the maximum load current plus half
the inductor ripple current to prevent core saturation
(0.5 A + 150 mA).
Some inductors may meet the peak and average current ratings
yet result in excessive losses due to a high DCR.
Always consider the losses associated with the DCR and its
effect on the total converter efficiency when selecting an
inductor.
Table 5 lists the recommended inductors.
Table 5. Recommended Inductors
Part
Murata
L
(H)
Max DCR
(m)
Rated DC Current
(A)
2.2
73
1.25
3.3
92
1.0
4.7
130
0.88
Size
W L H (mm)
3.0 3.0 1.4
Thermal Calculations
There are three types of losses associated with the AAT2630
step-down converters: switching losses (PSW), conduction
losses (PCOND), and quiescent current losses (PQC). Conduction
losses are associated with the RDS(ON) characteristics whereas
switching losses are dominated by the gate charge of the power
output switching devices. At full load, with continuous
conduction mode (CCM), a simplified form of the losses is given
by:
PBUCK PSW PCOND PQC
The three components of the total continuos conduction mode
are given by:
V
V
2
PCOND I OUT
RDS ( ON ) P OUT RDS ( ON ) N 1 OUT
V
VIN
IN
PQC I OUT VIN
Where IQ is the step-down converter quiescent current, tSW is
the switching time, RDS(ON)P and RDS(ON)N are the high side and
low side switching MOSFETs’ on-resistance. VIN, VOUT and IOUT
are the input voltage, the output voltage and the load current.
Since RDS(ON), quiescent current and switching losses vary with
input voltage, the total losses should be investigated over the
complete input voltage range.
Given the total losses, the maximum junction temperature can
be derived from the JA for the package.
TJ ( MAX ) PTOTAL JA TA
Thermal Shutdown
Thermal overload protection limits the total power dissipation of
the AAT2630. When internal thermal sensors detect a die
temperature in excess of 140 °C all buck outputs are
immediately shut down to allow the IC to cool. When the die
temperature has dropped below the 15 °C hysteresis, the buck
outputs automatically turn on again in sequence.
Low Drop Out Regulator
Input Capacitor
Typically, a 4.7 μF or larger capacitor is recommended for CIN in
most applications. A CIN capacitor is not required for basic LDO
regulator operation. However, if the LDO is physically located
more than 1 or 2 centimeters from the input power source, a
CIN capacitor is needed for stable operation. CIN should be
located as close to the device input pin as practically possible.
CIN values greater than 4.7 F offer superior input line transient
response and assist in maximizing the power supply ripple
rejection.
Ceramic, tantalum, or aluminum electrolytic capacitors may be
selected for CIN because there is no specific capacitor ESR
requirement. For better performance, ceramic capacitors are
recommended for CIN due to their inherent capability over
tantalum capacitors to withstand input current surges from low
impedance sources such as batteries in portable devices.
Output Capacitor
For proper load voltage regulation and operational stability, a
capacitor, COUT, is required between pins VOUT and GND. The
COUT capacitor connection to the LDO regulator ground pin
should be made as direct as practically possible for maximum
device performance. Although the AAT2630 LDOs have been
specifically designed to function with very low ESR ceramic
PSW t SW f SW I OUT VIN
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
capacitors, the device is stable over a very wide range of
capacitor ESR. The AAT2630 also works with some higher ESR
tantalum or aluminum electrolytic capacitors. For best
performance, ceramic capacitors are recommended.
The value of COUT typically ranges from 1 F to 10 F; however,
2.2 F is sufficient for most operating conditions.
USB Application 1
VBUS
VDD_IN1
VDD_IN2
5V
VDD_IN3
VDD_IN4
Short-Circuit and Thermal Protection
The AAT2630 LDOs are protected by both current limit and
over-temperature protection circuitry. The internal short-circuit
current limit is designed to activate when the output load
demand exceeds the maximum rated output. If a short-circuit
condition continually draws more than the current limit
threshold, the LDO regulator’s output voltage drops to a level
necessary to supply the current demanded by the load. Under
short-circuit or other over-current operating conditions, the
output voltage drops, and the AAT2630’s die temperature
rapidly increases. Once the regulator’s power dissipation
capacity has been exceeded and the internal die temperature
reaches approximately 140 °C, the system thermal protection
circuit becomes active. The internal thermal protection circuit
actively turns off the LDO regulator output pass device to
prevent the possibility of over-temperature damage. The LDO
regulator output remains in a shutdown state until the internal
die temperature falls back below the 125 °C trip point.
AAT2630
D/D
USB Application 2
VBUS
VDD_IN1
VDD_IN2
5V
AAT2630
D/D
VDD_IN3
VDD_IN4
PCIe Application
VBUS
VDD_IN1
VDD_IN2
AAT2630
3.3 V
VDD_IN3
VDD_IN4
tc216
The interaction between short circuit and thermal protection
systems allows the LDO regulator to withstand indefinite shortcircuit conditions without sustaining permanent damage.
No-Load Stability
The AAT2630 LDO is designed to maintain output voltage
regulation and stability under operational no-load conditions.
This is an important characteristic for applications where the
output current may drop to zero. An output capacitor is required
for stability under no-load operating conditions. Refer to the
Output Capacitor section of this datasheet for recommended
typical output capacitor values.
LDO Minimum Input Voltage
The power supply of the LDO has to be at least the VOUT
(nominal) + VLDOX_DO to regulate the output voltage. If the
power supply is lower than the VOUT (nominal) value, the output
voltage will be VIN VLDOX_DO.
For example, if the LDO output is 3.3V, VLDOX_DO = 150 mV, VIN
should be larger than 3.3 + 0.150 = 3.45 (V). If VIN = 3.2 V,
then VOUT is 3.2 0.15 = 3.05 (V).
Figure 16 indicates the typical applications.
Figure 16. AAT2630 Typical Application Conditions
Layout Considerations
The suggested PCB layout for the AAT2630 is shown in Figures
5 to 10. The following guidelines are recommended to ensure a
proper layout:
Keep the power traces (GND, LX, IN) short, direct, and wide to
allow large current flow. Place sufficient multiple-layer pads
when needed to change the trace layer.
Connect the output capacitors C3, C5 and inductors L1, L2 as
close as possible. Keep the connection of L1, L2 to the LX1,
LX2 pins as short as possible and route no signal lines under
the inductors.
Separate OUT pins (B1, G4) from any power trace and connect
as close as possible to the load point. Sensing along a highcurrent load trace will degrade DC load regulation.
Keep the resistance of the trace from the load returns to
PGND to a minimum. This will help to minimize any error in
DC regulation due to differences in the potential of the internal
signal ground and the power ground.
Connect the ground pin to PGND with a single point to
decrease the effect of large power ground noise on the analog
ground.
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Evaluation Board Description
required for the system is shown in Table 6. Table 7 explains
the terms and acronyms.
The AAT2630 Evaluation Board is used to test the performance
of the AAT2630. An Evaluation Board schematic diagram is
provided in Figure 17. Layer details for the Evaluation Board are
shown in Figure 18. The Evaluation Board has additional
components for easy evaluation; the actual bill of materials
JP5
JP6
JP7
VDD_IN1
AGND
RESET
VBUS
VDD_IN1
VBUS
F4
F5
F2
D2
G1
EN_RUIM
SEL_RUIM
POWER_ON
RESET
VBUS
B7
B5
B6
VIN
VDD_IN3
VDD_IN4
BYP
VREF
AGND
A4
G6
F3
E6
J_IN3
VBUS
VDD_IN3
J_IN4
VDD_IN4
VDD_IN3
VDD_IN4
VREG_MSME A2
C6
C7
C8
C9
4.7μF 4.7μF 0.1μF 2.2μF
AAT2630
MSMP
VREG_MSMA A3
VREG_MMC A5
C11 C12 C13 C14
2.2μF 2.2μF 2.2μF 2.2μF
L1
AGND
RF_RX
R5
2.75V, 150mA
0
MSMP
2.6V, 150mA GND
MSMA
2.6V, 300mA
MMC
3.0V, 150mA
PGND AGND
R6
0
DGND
C20
2.2μF
M1
DGND
AGND
RUIM
1.8V/3.0V, 50mA
TCXO
2.85V, 50mA
USB
3.1V, 50mA
GND_TCXO
GND_RFTX
GND_MSMC
GND_REF
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
VREG_USB G5
C15
C16
2.2μF 2.2μF
M2
AGND
VREG_RUIM F6
VREG_TCXO A6
M3
AGND
M4
PGND
C17
2.2μF
PGND
AGND
C6
C1
G3
D6
D3
D4
D5
C3
C4
C5
E3
E4
E5
A7
G7
PGND G2
VSW_MSMC
2.2μH
MSMC
G4 VREG_MSMC
1.375V/1.2V, 500mA
C3
10μF
VDD_IN2 PGND E1
VDD_IN2
VDD_IN2
C4
10μF
L2
PGND
D1 VSW_RFTX
2.2μH
RF_TX
B1 VREG_RFTX
2.1V, 500mA
A1 VIN_MSME
C5
10μF
VDD_IN3
GND
VDD_IN4
BYP
GND
VREF
MSME
1.8V, 300mA
C10
2.2μF
AGND
VREG_RFRX F7
VREG_MSMP E7
C1
4.7μF
VDD_IN1 AGND
F1 VDD_IN1
C2
10μF
VDD_IN2
J_VBUS
U1
LED_RED
EN_TCXO
TCXO_IN
TCXO_OUT
SLEEP_OUT
VDD_IN1
J_IN2
C19
22μF
LED_GREEN
E2
C7
D7
C2
J_IN1
VIN
LED_BLUE
C18
1000pF
TCXO_IN
AGND TCXO_OUT
32K_OUT
VDD_IN4
LED_EN3
JP4
LED_EN1
AGND
MSMP
B3
JP2
JP1
LED_EN2
JP3
Package dimensions for the 49-bump WLCSP package are
shown in Figure 19.
R1
330
RED
R2
GREEN
R3 330
BLUE
330
B2
LED1
RGB LED
B4
VDD_IN1
Package Information
AGND
PGND
DGND PGND
AGND
tc217
Figure 17. AAT2630 Evaluation Board Schematic
Table 6. AAT2630 Evaluation Board Bill of Materials (BOM)
Component
Part number
Description
Manufacturer
U1
AAT2630
10-channel DC-DC converter
Skyworks
C1, C6, C7
GRM188R60J475KE19
Ceramic capacitor, 4.7 F, 0603 X5R, 6.3 V 10%
Murata
C2, C3, C4, C5
GRM21BR71A106KE51
Ceramic capacitor, 10 F, 0805 X7R, 10 V 10%
Murata
C8
GRM188R71E104KA01
Ceramic capacitor, 0.1 F, 0603 X7R, 25 V 10%
Murata
C9 C17, C20
GCM188R70J225KE22
Ceramic capacitor, 2.2 F, 0603, X7R, 6.3 V,10%
Murata
C18
GRM188R71H102KA01
Ceramic capacitor, 1000 pF, 0603 X7R, 50 V 10%
Murata
C19
GRM31CR71A226ME15
Ceramic capacitor, 22 F, 1206 X7R, 10 V 10%
Murata
L1, L2
LQH3NPN2R2MM0L
2.2 H, 73 m, 1.25 A, 20%
Murata
R1, R2, R3
Chip resistor
RES 330 , 1/10 W, 1% 0603 SMD
Yageo
LED1
1615LPCFC-A
Common anode type RGB LED
Lasemtech
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Table 7. Terms and Acronyms
Term or Acronym
Definition
MMC
Multi-media card
MSMA
Mobile station modem analog
MSMC
Mobile station modem core
MSMP
Mobile station modem peripheral
RFTX
Radio frequency transmitter
RFRX
Radio frequency receiver
RUIM
Removable user identity module
TCXO
Temperature-compensated crystal oscillator
USB
Universal serial bus
Top Layer
Middle1 Layer
Middle2 Layer
Middle3 Layer
tc218
Figure 18. AAT2630 Evaluation Board Layer Details
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
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19
DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
2.995 ± 0.035 (E)
2.400 BSC
0.200 ± 0.025
0.380 ± 0.025
0.070 ± 0.035
Line_1
D
C
B
0.2 NOM
1/2 D
E
0.60 MIN
0.60 MIN
F
2.995 ± 0.035 (D)
0.400 BSC
2.400 BSC
G
Line_2
0.2 NOM
A
1
2
3
4
5
BTW View
6
7
Side View
ø0.2 REF
Pin A1 Indicator
Top View
49x ø0.265 ± 0.025
0.650 ± 0.085
1/2 E
All dimensions are in millimeters .
Side View
tc219
Figure 19. AAT2630 49-bump WLCSP Package Dimensions
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DATA SHEET • AAT2630 WIRELESS DATA CARD PMIC 10-CHANNEL DC-DC CONVERTER
Ordering Information
Model Name
AAT2630 wireless data card PMIC 10-channel
DC/DC converter
Part Marking (Note 1)
P8XY
Manufacturing Part Number (Note 2)
Evaluation Board Part Number
AAT2630IUA-T1
AAT2630IUA-EVB
Note 1: XY = assembly and date code.
Note 2: Sample stock is generally held on part numbers listed in BOLD.
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