S i 5 3 4 7/46
D U AL /Q UA D DSPLL A NY - F RE QU EN CY, A NY -O UT P UT J ITTER A TT E NU AT OR S
Features
Four or two independent DSPLLs in a
single monolithic IC
Each DSPLL generates any output
frequency from any input frequency
Input frequency range:
Differential: 8 kHz to 750 MHz
LVCMOS: 8 kHz to 250 MHz
Output frequency range:
Differential: up to 712.5 MHz
LVCMOS: up to 250 MHz
Ultra low jitter:
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