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SL3010N

SL3010N

  • 厂商:

    SLS

  • 封装:

  • 描述:

    SL3010N - INFRARED REMOTE CONTROL TRANSMITTER RC-5 - System Logic Semiconductor

  • 数据手册
  • 价格&库存
SL3010N 数据手册
SL3010 INFRARED REMOTE CONTROL TRANSMITTER RC-5 The SL3010 is intended as a general purpose (RC-5) infrared remote control system for use where a low voltage supply and a large debounce time are expected. The device can generate 2048 different commands and utilizes a keyboard with a single pole switch for each key. The command are arranged so that 32 systems can be addressed, each system containing 64 different commands. The keyboard interconnection is illustrated by Fig.1. • • • • Low voltage requirement Single pin oscillator Biphase transmission technique Test mode facility ORDERING INFORMATION SL3010N Plastic SL3010D SOIC TA = -25° to 85° C for all packages . BLOCK DIAGRAM PIN ASSIGNMENT SLS System Logic Semiconductor SL3010 PIN DESCRIPTION PIN No 1 2 3-6 7 8 9-13 14 15-17 18 19 20 21-27 28 (I) (IPU) (ODN) (OP3) DESIGNATION X7 (IPU) SSM (I) Z0-Z3 (IPU) MDATA (OP3) DESCRIPTION sense input from key matrix system mode selection input sense inputs from key matrix generated output data modulated with 1/2 the oscillator frequency at a 25% duty factor generated output information scan drivers ground (0V) scan drivers oscillator input test point 2 test point 1 sense inputs from key matrix voltage supply DATA (OP3) DR7-DR3 (ODN) GND DR2-DR0 (ODN) OSC (I) TP2 (I) TP1 (I) X0-X6 (IPU) Vcc (I) = input = input with p-channel pull-up transistor = output with open drain n-channel transistor = output 3-state FUNCTIONAL DESCRIPTION Keyboard operation Every connection of one X-input and one DR-output will be recognized as a legal key operation and will cause the device to generate the corresponding code. The same applies to every connection of one Z-input to one DRoutput with the proviso that SSM must be LOW. When SSM is HIGH a wired connection must exist between a Zinput and DR-output. If no connection is present the system number will not be generated. Activating two or more X-inputs, Z-inputs or Z-inputs and X-inputs at the same time is an illegal action and inhibits further activity (oscillator will not start). When one X- or Z-input is connected to more than one DR-output, the last scan signal will be considered as legal. The maximum value of the contact series resistance of the switched keyboard is 7KΩ . Inputs In the quiescent state the command inputs X0 to X7 are held HIGH by an internal pull-up transistor. When the system mode selection (SSM) input is LOW and the system is quiescent, the system inputs Z0 to Z3 are also held HIGH by an internal pull-up transistor. When SSM is HIGH the pull-up transistor for the Z-inputs is switched off, in order to prevent current flow, and a wired connection in the Z-DR matrix provides the system number. Outputs The output signal DATA transmits the generated information in accordance with the format illustrated by Fig.2 and Tables 1 and 2. The code is transmitted using a biphase technique as illustrated by Fig.3. The code consists of four parts: • Start part - 1.5 bits (2 x logic 1) • Control part - 1 bit • System part - 5 bits • Command part - 6 bits The output signal MDATA transmits the generated information modulated by 1/12 of the oscillator frequency with a 50% duty factor. In the quiescent state both DATA and MDATA are non-conducting (3-state outputs). The scan driver outputs DR0 to DR7 are open drain n-channel transistors and conduct when the circuit is quiescent. After a legal key operation the scanning cycle is started and the outputs switched to the conductive state one by one. The DR-outputs were switched off at the end of the preceding debounce cycle. SLS System Logic Semiconductor SL3010 Table 1 Command matrix (X-DR) Code n o. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 0 x x x x x x x x 1 2 X-lines 34 5 6 7 0 x 1 x 2 DR-lines 345 6 7 x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 Command bits 3 2 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 SLS System Logic Semiconductor SL3010 Table 1 Command matrix (X-DR) (Continued) Code n o. 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 0 1 2 X-lines 34 5 6 x x x x x x x 7 0 1 x 2 x x x x x x x x x x x x x x x x x x x x x x DR-lines 345 6 7 5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Command bits 3 2 0 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Table 2 System matrix (Z-DR) Code n o. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 0 x x x x x x x x 1 2 X-lines 34 5 6 7 0 x 1 x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x 2 DR-lines 345 6 7 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 System bits 3 2 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 1 1 1 0 0 1 0 0 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 1 1 1 0 0 1 0 0 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 SLS System Logic Semiconductor SL3010 MAXIMUM RATINGS * Symbol VCC VIN VOUT IIN IOUT PDO PDO PD T stg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND)* DC Output Voltage (Referenced to GND)* DC Input Current DC Output Current Maximum Power Dissipation OSC output other outputs Power Dissipation in Still Air Storage Temperature Value -0.5 to +8.5 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±10 ±10 50 100 200 -65 to +150 Unit V V V mA mA mW mW mW °C * VCC + 0.5 must not exceeed 9.0V.. * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 85°C SOIC Package: : - 7 mW/°C from 65° to 85°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIH VIL VOUT IIN IOL Parameter DC Supply voltage (Reference to GND) DC Input voltage (HIGH) DC Input voltage (LOW) DC Output Voltage (MDATA, DATA) DC Input Current DC Output Current (LOW) pins 7,8 pins 9-13; 15-17 DC Output Current (MDATA, DATA) Operating Temperature, All Package Types Min 2.0 0.7VCC 0 Max 7.0 VCC 0.3VCC 7.0 ±10 0.6 0.3 -0.4 85 Unit V V V V mA mA mA o IOH TA -25 C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN a nd VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V ). CC Unused outputs must be left open. SLS System Logic Semiconductor SL3010 DC ELECTRICAL CHARACTERISTICS (Voltage Reference to GND) (VCC= 2.0 to 7.0V unless otherwise specified, TA=-25 to +70°C) Guaranteed Limits Symbol ICC INPUTS IIN Input current Pins 01, 03-06; 21-27 Pin 18 ILI Input leakage current Pins 01-06;19-27 Pin 18 OUTPUTS VOH VOL Output voltage HIGH, pins 07-08 Output voltage LOW Pins 07-08 Pins 9-13; 15-17 ILO Output leakage current Pins 07-13; 15-17 ILO Output leakage current Pins 07-08 IOH DC Output Current Pins 9-13; 15-17 VIL=0V; VIH=VCC; VOH=VCC VO=0V, VIH=VCC, VOL=0V IOH=-0.4mA VIL=0.3 VCC IOL=0.6mA VIL=0V, VHI=0.7VCC IOL=0.3mA, VIL=0V, VIH=0.7VCC VO=VCC, VIH=VCC, VOH=VCC 10 µA -20 µA 0.3 10 V µA VCC-0.3 0.3 V V VIL=0V; VIH=VCC VIL=0V; VIH=VCC ±10 -20 VIL=0V -10 3.0 -600 33 µA µA Parameter Quiscent supply current Test Conditions UIL=0B; VIH=VCC IOUT=0 mA at all outputs Min Max 40 Unit µA AC ELECTRICAL CHARACTERISTICS TA=-25 to +85°C; VCC=2.0 to 7.0 V unless otherwise specified Symbol Parameter Test Condition Guaranteed Limits Typ Oscillator frequency fOSC operational CL=160pF 432 450 KHz Max Unit SLS System Logic Semiconductor SL3010 Figure 1. Keyboard interconnection SLS System Logic Semiconductor SL3010 Where: debounce time+scan time=18 bit-temes repetition time=4x16 bit times Figure 2. Data output format Where: 1 bit-time=3.28 x TOSC=1.778 ms (typ.) Figure 3. Biphase transmission technique SLS System Logic Semiconductor
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