SL7101

SL7101 EARTH LEAKAGE CURRENT DETECTOR Description The SL7101 is designed for use in earth leakage circuit interrupters for operation directly of the AC Line in breakers. It contains pre regulator, main regulator, after regulator, differential amplifier, level comparator, latch circuit. The input in the differential amplifier is connect to the secondary node of zero current transformer. The level comparator generates high level when earth leakage current is greater than some level. Feature • Low Power Consumption (P D=5mW) 100V/200V • 100V/200V Common Built-in Voltage Regulator • High Gain Differential Amplifier • High Input Sensitivity • Minimum External Parts • Large Surge Margin • Wide Operating Temperature Range (TÀ =-30 to 85°C) • High Noise Immunity Pin Configuration (Top View) VR I N 1 2 3 OD 4 8 7 6 5 V + OS NR SC Absolute Maximum Ratings (T^=25°c) § § § § § Supply Voltage Supply Current Power Dissipation Operating Temperature Storage Temperature 20V 8mA 200mW - 30 to 85°C - 55 to 125°C Block Diagram SLS System Logic Semiconductor SL7101 Recomended Operating Condition: T A=-30°C to 80°C PARAMETER Supply Voltage V s-GND Capacitor OS-GND Capacitor SYMBOL V Cvs Cos + MIN. 12 1 TYP. MAX UNIT V µF 1 µF Electrical Characteristics PARAMETER SYMBOL CONDTIONS V+=12V, VR - VI = 30 mV V+ = 16V, VR - VI = X V+ = 16 V, VR - VI = 30 mV VOD = 1.2 V V+ = 16 V, VR - VI = short VOD = 0.8 V lSI = 580µA V SC = 1.4 V lSI = 530µA V OS = 0.8 V lSI = 480µA V + = 16 V V+ = l2V V+ = 12 V, VOSL = 0.2 V V+ = 12 V, IIC = 20 mA IIDC = 100mA ISM = 7 mA VOS = 0.5 V, VR - VI = X Supply Current 1 * Trip Voltage Differential Amplifier Output Current 1 Differential Amplifier Output current 2 Output Current SC ON Voltage SC Input Current Output "L" Current Input Clamp Voltage Differential Input Clamp Voltaqe Max. Current Voltage Supply Current 2 Latch Circuit Off Supply Votaqe Response Time lS1 VT ITD1 TEMP. (°C) -30 25 85 -30 85 25 MIN. 300 9 -12 TYP. 400 13.5 -20 MAX. 580 530 480 18 -30 UNIT µA mV (rms) µA µA ITD2 25 17 27 37 IO VSC ON ISC ON IOSL VIC VIDC VSM IS2 V+ OFF TON -30 25 85 25 25 -30 85 -30 85 -30 85 25 -30 85 25 25 -200 -100 -75 0.7 200 4.3 0.4 20 0.5 1 1.0 800 1.2 24 - µA 1.4 5 1400 6.7 2 28 1200 V µA µA V V V µA V V+ = 16 V, VR - VI = 0.3 V C: 14.5~18 3 4 ms * A: 9 ~12.5 B: 11.5~15.5 SLS System Logic Semiconductor SL7101 Typical Performance Curves SLS System Logic Semiconductor SL7101 Typical Application Description of elements of application diagram 1. The resistance of R1 resistor is chosen in such a way so that to limit IC’ consumption s current (not more than 8 mA), and here the voltage drop is around 21-28V. 2. R2 resistor provides the necessary bias of the differential cascade. 3. R3 resistor is a loading one per input. 4. R4 resistor limits the charging current of C4 electrolytic capacitor are required to maintain IC performance until the fuse is completely burn out. Its value is chosen correspondingly. 5. C1 electrolytic capacitor is a filtering one as per supply (around 1 – 10 µF ). 6. Ñ 2 and C3 capacitors are filtering ones (not more than 1 µF) SLS System Logic Semiconductor