LPC47S422

LPC47S422 Enhanced Super I/O with LPC Interface for Server Applications PRODUCT FEATURES 3.3 Volt Operation (5V Tolerant) Floppy Disk Controller (Supports Two FDCs) Multi-Mode Parallel Port Two UARTs 8042 Keyboard Controller SMBus Controller X-Bus Interface Programmable Wakeup Event Interface (nIO_PME Pin) SMI Support (nIO_SMI Pin) GPIOs (39) Fan Speed Control Output Fan Tachometer Input ISA IRQ to Serial IRQ Conversion XNOR Chain PC99 and ACPI 1.0 Compliant ISA Plug-and-Play Compatible Register Set Intelligent Auto Power Management 2.88MB Super I/O Floppy Disk Controller — Licensed CMOS 765B Floppy Disk Controller — Software and Register Compatible with SMSC's Proprietary 82077AA Compatible Core — Configurable Open Drain/Push-Pull Output Drivers — Supports Vertical Recording Format — 16-Byte Data FIFO — 100% IBM® Compatibility — Detects All Overrun and Underrun Conditions — Sophisticated Power Control Circuitry (PCC) Including Multiple Powerdown Modes for Reduced Power Consumption — DMA Enable Logic — Data Rate and Drive Control Registers — 480 Address, up to 15 IRQ and Three DMA Options Data Brief Keyboard Controller — — — — — — — — — — 8042 Software Compatible 8-Bit Microcomputer 2k Bytes of Program ROM 256 Bytes of Data RAM Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface Asynchronous Access to Two Data Registers and One Status Register Supports Interrupt and Polling Access 8-Bit Counter Timer Port 92 Support Fast Gate A20 and KRESET Outputs Serial Ports — Two Full Function Serial Ports — High Speed NS16C550 Compatible UARTs with Send/Receive 16-Byte FIFOs — Supports 230k and 460k Baud — Programmable Baud Rate Generator — Modem Control Circuitry — 480 Address and 15 IRQ Options — IrDA 1.0, HP-SIR, ASK IR Support Multi-Mode Parallel Port with ChiProtect™ — Standard Mode IBM PC/XT®, PC/AT®, and PS/2™ Compatible Bidirectional Parallel Port — Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) — IEEE 1284 Compliant Enhanced Capabilities Port (ECP) — ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On — 480 Address, up to 15 IRQ and 3 DMA Options — Multiplexed Command, Address and Data Bus — 8-Bit I/O Transfers — 8-Bit DMA Transfers — 16-Bit Address Qualification — Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems — Power Management Event (PME) Interface Pin Enhanced Digital Data Separator — 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates — Programmable Precompensation Modes 100 Pin, QFP lead-free RoHS compliant package SMSC LPC47S422 PRODUCT PREVIEW Rev. 05-07-07 Enhanced Super I/O with LPC Interface for Server Applications ORDER NUMBER: LPC47S422-MS FOR 100 PIN, QFP LEAD-FREE ROHS COMPLIANT PACKAGE 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © 2007 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. 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Rev. 05-07-07 2 SMSC LPC47S422 PRODUCT PREVIEW Enhanced Super I/O with LPC Interface for Server Applications General Description The LPC47S422 is a 3.3V PC99 compliant Super I/O controller. The LPC47S422 implements the LPC interface, a pin reduced ISA interface which provides the same or better performance as the ISA/Xbus with a substantial savings in pins used. The part provides 39 GPIO pins, an SMBus controller, a fan speed control output, a fan tachometer input, four ISA IRQs that can be routed to any of the serial IRQs, and an X-Bus interface. The LPC47S422 incorporates a keyboard interface, SMSC's true CMOS 765B floppy disk controller, advanced digital data separator, two 16C550 compatible UARTs, one Multi-Mode parallel port which includes ChiProtect circuitry plus EPP and ECP, and Intelligent Power Management. The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures in addition to providing data overflow and underflow protection. The SMSC advanced digital data separator incorporates SMSC's patented data separator technology, allowing for ease of testing and use. The on-chip UARTs are compatible with the NS16C550. The parallel port is compatible with IBM PC/AT architecture, as well as IEEE 1284 EPP and ECP. The LPC47S422 incorporates sophisticated power control circuitry (PCC). The PCC supports multiple low power down modes. The LPC47S422 supports the ISA Plug-and-Play Standard (Version 1.0a) and provides the recommended functionality to support Windows '95/'98 and PC99. The I/O Address, DMA Channel and Hardware IRQ of each logical device in the LPC47S422 may be reprogrammed through the internal configuration registers. There are 480 I/O address location options, a Serialized IRQ interface, and three DMA channels. Block Diagram ACE Registers COM Host Interface ACE UART Sharp ASK IrDA SIR Output MUX IR COM IR Options Register, Bit 6 Figure 1 LPC47S422 Block Diagram SMSC LPC47S422 3 Rev. 05-07-07 PRODUCT PREVIEW Enhanced Super I/O with LPC Interface for Server Applications Package Outline D D1 E E1 e W A H 0.10 -C D IM A A1 A2 D D1 E E1 H L L1 e 0 W TD (1) TE (1) TD (2) TE (2) A2 TD /T E 0 A1 M AX M IN 3.15 2.80 0.45 0.1 2.87 2.57 24.15 23.4 20.1 19.9 18.15 17.4 14.1 13.9 0.2 0.1 0.95 0.65 2.6 1.8 0.65 B S C 12° 0° .4 .2 22.2 21.8 16.2 15.8 22.76 22.21 16.82 16.27 M IN M AX .110 .124 .004 .018 .101 .113 .921 .951 .783 .791 .685 .715 .547 .555 .004 .008 .026 .037 .071 .102 .0256 B S C 12° 0° .016 .008 .874 .858 .638 .622 .896 .874 .662 .641 L L1 N otes : 1) C oplanarity is 0.100m m (.004") m ax im um . 2) Toleranc e on the position of the leads is 0.200m m (.008") m axim um . 3) P ack age body dim ens ions D 1 and E 1 do not inc lude the m old protrus ion. M axim um m old protrus ion is 0.25m m (.010"). 4) D im ensions TD and T E are im portant for tes ting by robotic handler. O nly abov e c om binations of (1) or (2) are acc eptable. 5) C ontr olling dim ens ion: m illim eter. D im ens ions in inc hes for referenc e only and not nec es s arily ac c urate. Figure 2 LPC47S422 100 Pin QFP Package Outline and Parameters Rev. 05-07-07 4 SMSC LPC47S422 PRODUCT PREVIEW