USB2228

USB2227/USB2228 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs PRODUCT FEATURES Complete System Solution for interfacing SmartMediaTM (SM) or xD Picture CardTM (xD)1, Memory StickTM (MS), High Speed Memory Stick (HSMS), Memory Stick PRO (MSPRO), MS DuoTM, Secure Digital (SD), Mini-Secure Digital (Mini-SD), TransFlash (SD), MultiMediaCardTM (MMC), Reduced Size MultiMediaCard (RS-MMC), NAND Flash, Compact FlashTM (CF) and CF UltraTM I & II, and CF form-factor ATA hard drives to USB2.0 bus — Supports USB Bulk Only Mass Storage Compliant Bootable BIOS Support for simultaneous operation of all above devices. (only one at a time of each of the following groups supported: CF or ATA drive, SM or XD or NAND, SD or MMC) On-Chip 4-Bit High Speed Memory Stick and MS PRO Hardware Circuitry On-Chip firmware reads and writes High Speed Memory Stick and MS PRO 1-bit ECC correction performed in hardware for maximum efficiency Hardware support for SD Security Command Extensions On-chip power FETs for supplying flash media card power with minimum board components USB Bus Power Certified 3.3 Volt I/O with 5V input tolerance on VBUS/GPIO3 Complete USB Specification 2.0 Compatibility for Bus Powered Operation — Includes USB2.0 Transceiver — A Bi-directional Control and a Bi-directional Bulk Endpoint are provided. 8051 8 bit microprocessor — Provides low speed control functions — 30 Mhz execution speed at 4 cycles per instruction average — 12K Bytes of internal SRAM for general purpose scratchpad — 768 Bytes of internal SRAM for general purpose scratchpad or program execution while re-flashing external ROM Double Buffered Bulk Endpoint — Bi-directional 512 Byte Buffer for Bulk Endpoint — 64 Byte RX Control Endpoint Buffer — 64 Byte TX Control Endpoint Buffer Datasheet Internal or External Program Memory Interface — 64K Byte Internal Code Space or Optional 64K Byte External Code Space using Flash, SRAM or EPROM memory. On Board 24Mhz Crystal Driver Circuit Can be clocked by 48MHz external source On-Chip 1.8V Regulator for Low Power Core Operation Internal PLL for 480Mhz USB2.0 Sampling, Configurable MCU clock Supports firmware upgrade via USB bus if “boot block” Flash program memory is used 15 GPIOs for special function use: LED indicators, button inputs, power control to memory devices, etc. — Inputs capable of generating interrupts with either edge sensitivity — Attribute bit controlled features: — Activity LED polarity/operation/blink rate — Full or Partial Card compliance checking — Bus or Self Powered — LUN configuration and assignment — Write Protect Polarity — SmartDetach™ Detach from USB when no Card Inserted for Notebook apps — Cover Switch operation for xD compliance — Inquiry Command operation — SD Write Protect operation — Older CF card support — Force USB 1.1 reporting — Internal or External Power FET operation Compatible with Microsoft WinXP, WinME, Win2K SP3, Apple OS10, Softconnex, and Linux Multi-LUN Mass Storage Class Drivers Win2K, Win98/98SE and Apple OS8.6 and OS9 Multi-LUN Mass Storage Class Drivers available from SMSC 128 Pin VTQFP Lead-free RoHS Compliant Package (1.0mm height, 14mm x14mm footprint) 124 Pin DQFN Lead-free RoHS Compliant Package (0.8mm height, 10mm x10mm footprint) 1.xD Picture Card not applicable to USB2227 SMSC USB2227/USB2228 DATASHEET Revision 1.91 (10-13-06) 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet ORDER NUMBERS: USB2227/USB2228-NU-05 FOR 128 PIN, VTQFP LEAD-FREE ROHS COMPLIANT PACKAGE USB2227/USB2228-AHZS-XX FOR 124 PIN, DQFN LEAD-FREE ROHS COMPLIANT PACKAGE 80 Arkay Drive Hauppauge, NY 11788 (631) 435-6000 FAX (631) 273-3123 Copyright © 2006 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Revision 1.91 (10-13-06) DATASHEET 2 SMSC USB2227/USB2228 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet Table of Contents Chapter 1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Chapter 2 Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Chapter 3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Chapter 5 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.1 5.2 PIN Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Chapter 6 DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.1 6.2 6.3 Maximum Guaranteed Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Recommended Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Chapter 7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Chapter 8 GPIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 SMSC USB2227/USB2228 DATASHEET 3 Revision 1.91 (10-13-06) 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet List of Tables Table 5.1 Table 6.1 Table 7.1 Table 7.2 Table 8.1 USB2227/USB2228 Buffer Type Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . USB2227/USB2228 128-Pin VTQFP Package Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . USB2227/USB2228 124-Pin DQFN Package Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . GPIO Usage (ROM Rev 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 22 25 26 27 Revision 1.91 (10-13-06) DATASHEET 4 SMSC USB2227/USB2228 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet List of Figures Figure 3.1 Figure 3.2 Figure 4.1 Figure 7.1 Figure 7.2 USB2227/USB2228 128-Pin VTQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 USB2227/USB2228 124-Pin DQFN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 USB2227/USB2228 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 USB2227/USB2228 128-Pin VTQFP Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 USB2227/USB2228 124-Pin DQFN Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 SMSC USB2227/USB2228 DATASHEET 5 Revision 1.91 (10-13-06) 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet Chapter 1 General Description The USB2227/USB2228 is a USB2.0 Bulk Only Mass Storage Class Peripheral Controller intended for supporting CompactFlash (CF and CF Ultra I/II) in True IDE Mode only, SmartMedia (SM) and XD cards, Memory Stick (MS), Memory Stick DUO (MSDUO) and Memory Stick Pro (MSPRO), Secure Digital (SD), and MultiMediaCard (MMC) flash memory devices. It provides a single chip solution for the most popular flash memory cards in the market. The device consists of a USB2.0 PHY and SIE, buffers, Fast 8051 microprocessor with expanded scratchpad, and program SRAM, and CF, MS, SM and SD controllers. The SD controller supports both SD and MMC devices. SM controller supports both SM and xD cards. Provisions for external Flash Memory up to 64K bytes for program storage is provided. 12K bytes of scratchpad SRAM and 768 Bytes of program SRAM are also provided. Fifteen GPIO pins are provided for indicators, external serial EEPROM for OEM id and system configuration information, and other special functions. Internal power FETs are provided to directly supply power to the xD/SM, MMC/SD and MS/MSPro cards. The internal ROM program is capable of implementing any combination of single or multi-LUN CF/SD/MMC/SM/MS reader functions with individual card power control and activity indication. SMSC also provides licenses** for Win98 and Win2K drivers and setup utilities. Note: Please check with SMSC for precise features and capabilities for the current ROM code release. *Note: In order to develop, make, use, or sell readers and/or other products using or incorporating any of the SMSC devices made the subject of this document or to use related SMSC software programs, technical information and licenses under patent and other intellectual property rights from or through various persons or entities, including without limitation media standard companies, forums, and associations, and other patent holders may be required. These media standard companies, forums, and associations include without limitation the following: Sony Corporation (Memory Stick, Memory Stick Pro); SD3 LLC (Secure Digital); MultiMedia Card Association (MultiMediaCard); the SSFDC Forum (SmartMedia); the Compact Flash Association (Compact Flash); and Fuji Photo Film Co., Ltd., Olympus Optical Co., Ltd., and Toshiba Corporation (xD-Picture Card). SMSC does not make such licenses or technical information available; does not promise or represent that any such licenses or technical information will actually be obtainable from or through the various persons or entities (including the media standard companies, forums, and associations), or with respect to the terms under which they may be made available; and is not responsible for the accuracy or sufficiency of, or otherwise with respect to, any such technical information. SMSC's obligations (if any) under the Terms of Sale Agreement, or any other agreement with any customer, or otherwise, with respect to infringement, including without limitation any obligations to defend or settle claims, to reimburse for costs, or to pay damages, shall not apply to any of the devices made the subject of this document or any software programs related to any of such devices, or to any combinations involving any of them, with respect to infringement or claimed infringement of any existing or future patents related to solid state disk or other flash memory technology or applications ("Solid State Disk Patents"). By making any purchase of any of the devices made the subject of this document, the customer represents, warrants, and agrees that it has obtained all necessary licenses under then-existing Solid State Disk Patents for the manufacture, use and sale of solid state disk and other flash memory products and that the customer will timely obtain at no cost or expense to SMSC all necessary licenses under Solid State Disk Patents; that the manufacture and testing by or for SMSC of the units of any of the devices made the subject of this document which may be sold to the customer, and any sale by SMSC of such units to the customer, are valid exercises of the customer's rights and licenses under such Solid State Disk Patents; that SMSC shall have no obligation for royalties or otherwise under any Solid State Disk Patents by reason of any such manufacture, use, or sale of such units; and that SMSC shall have no obligation for any costs or expenses related to the customer's obtaining or having obtained rights or licenses under any Solid State Disk Patents. SMSC MAKES NO WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, IN REGARD TO INFRINGEMENT OR OTHER VIOLATION OF INTELLECTUAL PROPERTY RIGHTS. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES AGAINST INFRINGEMENT AND THE LIKE. No license is granted by SMSC expressly, by implication, by estoppel or otherwise, under any patent, trademark, copyright, mask work right, trade secret, or other intellectual property right. **To obtain this software program the appropriate SMSC Software License Agreement must be executed and in effect. Forms of these Software License Agreements may be obtained by contacting SMSC. Revision 1.91 (10-13-06) DATASHEET 6 SMSC USB2227/USB2228 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet Chapter 2 Acronyms SM: SmartMedia SMC: SmartMedia Controller FM: Flash Media FMC: Flash Media Controller CF: Compact Flash CFC: CompactFlash Controller SD: Secure Digital SDC: Secure Digital Controller MMC: MultiMediaCard MS: Memory Stick MSC: Memory Stick Controller TPC: Transport Protocol Code. ECC: Error Checking and Correcting CRC: Cyclic Redundancy Checking SMSC USB2227/USB2228 DATASHEET 7 Revision 1.91 (10-13-06) 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet Chapter 3 Pin Configuration nTEST0 nTEST1 GPIO3 GPIO12 GOPI13 GPIO14 GPIO15 VDDA33 USBDP USBDM VSSA VSS VSS SM_nCE SM_nWE SM_nRE VDD33 GPIO10 SM_nCD SM_nB/R SM_nWPS SM_CLE SM_nWP SM_ALE SM_D7 SM_D6 SM_D5 SM_D4 SM_D3 SM_D2 SM_D1 SM_D0 VSS RBIAS ATEST VDD33 VDD18PLL XTAL1 XTAL2 VSSPLL GPIO9 VDD18 GPIO7 VDD33 GPIO6/ROMEN GPIO5 GPIO4 VSS GPIO2 GPIO1 nRESET MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 SMSC USB2227/2228 TQFP 128 (Top View) 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 CF_SA2 CF_SA1 CF_SA0 CF_nCS1 CF_nCS0 CF_nRESET CF_nIOW CF_nIOR CF_IORDY CF_IRQ CF_nCD2 CF_nCD1 CF_D15 CF_D14 CF_D13 VDD18 CF_D12 VSS CF_D11 CF_D10 GPIO11 VDD33 GPIO8 CF_D9 CF_D8 CF_D7 CF_D6 CF_D5 CF_D4 CF_D3 CF_D2 CF_D1 Revision 1.91 (10-13-06) MA13 MA14 VDD33 MA15 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 nMRD nMWR VSS VSS nMCE MS_INS MS_D0 MS_D1 MS_D2 MS_D3 MS_SCLK MS_BS SD_nWP SD_DAT0 SD_DAT1 SD_DAT2 SD_DAT3 SD_CMD SD_CLK CF_D0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Figure 3.1 USB2227/USB2228 128-Pin VTQFP DATASHEET 8 SMSC USB2227/USB2228 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet A48 A47 A46 A45 A44 A43 A42 A41 A40 A39 A38 A37 A36 A35 A34 B32 B31 B45 B44 B43 B42 B41 B40 B39 B38 B37 B36 B35 B34 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 B15 RBIAS VSS VDD33 ATEST XTAL1 VDD18PLL VSSPLL XTAL2 VDD18 GPIO9 GPIO7 VDD33 GPIO6/ROMEN GPIO5 GPIO4 GPIO2 GPIO1 nRESET MA0 MA1 MA2 MA3 MA4 MA6 MA5 MA8 MA7 MA10 MA9 MA12 MA11 B33 A33 nTEST1 nTEST0 GPIO12 GPIO3 GPIO14 GPIO13 vDDA33 GPIO15 USBDM USBDP VSSA VSS SM_nCE SM_nWE SM_nRE VDD33 GPIO10 SM_nCD SM_nB/R SM_nWPS SM_CLE SM_nWP SM_ALE SM_D7 SM_D6 SM_D4 SM_D5 SM_D2 SM_D3 SM_D0 SM_D1 A49 B46 A50 B47 A51 B48 A52 B49 A53 B50 A54 B51 A55 B52 A56 B53 A57 B54 A58 B55 A59 B56 A60 B57 A61 B58 A62 B59 A63 B60 A64 B18 B19 B20 B25 B26 B27 B28 B29 B30 A32 A31 A30 A29 A28 A27 SMSC USB2227/2228 (Top View DQFN-124) A26 B24 A25 B23 A24 B22 A23 B21 A22 A21 A20 A19 thermal slug connects to VSS B17 A18 B16 A17 CF_SA1 CF_SA2 CF_nCS1 CF_SA0 CF_nRESET CF_nCS0 CF_nIOR CF_nIOW cF_IORDY CF_IRQ CF_nCD2 CF_nCD1 CF_D15 CF_D14 CF_D13 VDD18 CF_D12 CF_D11 CF_D10 GPIO11 VDD33 GPIO8 CF_D9 CF_D7 CF_D8 CF_D5 CF_D6 CF_D3 CF_D4 CF_D1 CF_D2 SMSC USB2227/USB2228 MA14 MA13 MA15 VDD33 MD1 MD0 MD3 MD2 MD4 MD5 MD6 MD7 nMRD nMWR VSS nMCE MS_INS MS_D0 MS_D1 MS_D2 MS_D3 MS_SCLK MS_BS SD_DAT0 SD_nWP SD_DAT2 SD_DAT1 SD_CMD SD_DAT3 CF_D0 SD_CLK Figure 3.2 USB2227/USB2228 124-Pin DQFN DATASHEET 9 Revision 1.91 (10-13-06) A16 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet Chapter 4 Block Diagram Revision 1.91 (10-13-06) 10 DATASHEET SMSC USB2227/USB2228 Figure 4.1 USB2227/USB2228 Block Diagram 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet Chapter 5 Pin Descriptions This section provides a detailed description of each signal. The signals are arranged in functional groups according to their associated interface. The “n” symbol in the signal name indicates that the active, or asserted state occurs when the signal is at a low voltage level. When “n” is not present before the signal name, the signal is asserted when at the high voltage level. The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of “active low” and “active high” signal. The term assert, or assertion indicates that a signal is active, independent of whether that level is represented by a high or low voltage. The term negate, or negation indicates that a signal is inactive. 5.1 SYMBOL PIN Descriptions 128-PIN VTQFP 124-PIN DQFN BUFFER TYPE DESCRIPTION CompactFlash (In True IDE mode) INTERFACE CF_nCS1 61 A31 O8PU CF Chip Select 1: This pin is the active low chip select 1 signal for the CF ATA device. CF_nCS0 60 B28 O8PU CF Chip Select 0: This pin is the active low chip select 0 signal for the task file registers of CF ATA device in the True IDE mode. CF_SA2 64 B30 O8 CF Register Address 2: This pin is the register select address bit 2 for the CF ATA device. CF_SA1 63 A32 O8 CF Register Address 1: This pin is the register select address bit 1 for the CF ATA device. CF_SA0 62 B29 O8 CF Register Address 0: This pin is the register select address bit 0 for the CF ATA device. CF_IRQ 55 B26 IPD CF Interrupt: This is the active high interrupt request signal from the CF device. CF_D[15:8] 52 51 50 48 46 45 41 40 A26 B24 A25 A24 B22 A23 A21 A20 I/O8PD CF Data 15-8: The bi-directional data signals CF_D15-CF_D8 in True IDE mode data transfer. In the True IDE Mode, all of task file register operation occur on the CF_D[7:0], while the data transfer is on CF_D[15:0]. The bi-directional data signal has an internal weak pulldown resistor. SMSC USB2227/USB2228 DATASHEET 11 Revision 1.91 (10-13-06) 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet SYMBOL CF_D[7:0] 128-PIN VTQFP 39 38 37 36 35 34 33 32 56 124-PIN DQFN B19 A19 B18 A18 B17 A17 B16 B15 A28 BUFFER TYPE I/O8PD CF Data 7-0: DESCRIPTION The bi-directional data signals CF_D7-CF_D0 in the True IDE mode data transfer. In the True IDE Mode, all of task file register operation occur on the CF_D[7:0], while the data transfer is on CF_D[15:0]. The bi-directional data signal has an internal weak pulldown resistor. IPU IO Ready: This pin is active high input signal. This pin has an internally controlled weak pull-up resistor. CF_IORDY CF_nCD2 54 A27 IPU CF Card Detection2: This card detection pin is connected to the ground on the CF device, when the CF device is inserted. This pin has an internally controlled weak pull-up resistor. CF_nCD1 53 B25 IPU CF Card Detection1: This card detection pin is connected to ground on the CF device, when the CF device is inserted. This pin has an internally controlled weak pull-up resistor. CF_nRESET 59 A30 O8 CF Hardware Reset: This pin is an active low hardware reset signal to CF device. CF_nIOR 57 A29 O8 CF IO Read: This pin is an active low read strobe signal for CF device. CF_nIOW 58 B27 O8 CF IO Write Strobe: This pin is an active low write strobe signal for CF device. SmartMedia INTERFACE SM_nWP 74 B35 O8PD SM Write Protect: This pin is an active low write protect signal for the SM device. This pin has a weak pull-down resistor that is permanently enabled. SM_ALE 73 A37 O8PD SM Address Strobe: This pin is an active high Address Latch Enable signal for the SM device. This pin has a weak pull-down resistor that is permanently enabled. Revision 1.91 (10-13-06) DATASHEET 12 SMSC USB2227/USB2228 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet SYMBOL SM_CLE 128-PIN VTQFP 75 124-PIN DQFN A38 BUFFER TYPE O8PD DESCRIPTION SM Command Strobe: This pin is an active high Command Latch Enable signal for the SM device. This pin has a weak pull-down resistor that is permanently enabled. SM_D[7:0] 72 71 70 69 68 67 66 65 81 B34 A36 A35 B33 A34 B32 A33 B31 A41 I/O8PD SM Data 7-0: These pins are the bi-directional data signal SM_D7SM_D0. The bi-directional data signal has an internal weak pulldown resistor. SM_nRE 08PU SM Read Enable: This pin is an active low read strobe signal for SM device. When using the internal FET, this pin has an internal weak pull-up resistor that is tied to the output of the internal Power FET. 08 If an external FET is used (Internal FET is disabled), then the internal pull-up is not available (external pullups must be used, and should be connected to the applicable Card Power Supply). SM Write Enable: This pin is an active low write strobe signal for SM device. When using the internal FET, this pin has an internal weak pull-up resistor that is tied to the output of the internal Power FET. SM_nWE 82 B39 O8PU 08 If an external FET is used (Internal FET is disabled), then the internal pull-up is not available (external pullups must be used, and should be connected to the applicable Card Power Supply). SM Write Protect Switch: A write-protect seal is detected, when this pin is low. This pin has an internally controlled weak pull-up resistor. SM_nWPS 76 B36 IPU SM_nB/R 77 A39 I SM Busy or Data Ready: This pin is connected to the BSY/RDY pin of the SM device. An external pull-up resistor is required on this signal. The pull-up resistor must be pulled up to the same power source that powers the SM/NAND flash device. SMSC USB2227/USB2228 DATASHEET 13 Revision 1.91 (10-13-06) 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet SYMBOL SM_nCE 128-PIN VTQFP 83 124-PIN DQFN A42 BUFFER TYPE O8PU SM Chip Enable: DESCRIPTION This pin is the active low chip enable signal to the SM device. When using the internal FET, this pin has an internal weak pull-up resistor that is tied to the output of the internal Power FET. 08 If an external FET is used (Internal FET is disabled), then the internal pull-up is not available (external pullups must be used, and should be connected to the applicable Card Power Supply). SM Card Detection: This is the card detection signal from SM device to indicate if the device is inserted. This pin has an internally controlled weak pull-up resistor. MEMORY STICK INTERFACE MS_BS 24 A12 O8 MS Bus State: This pin is connected to the BS pin of the MS device. It is used to control the Bus States 0, 1, 2 and 3 (BS0, BS1, BS2 and BS3) of the MS device. MS_SDIO/M S_D0 19 B9 I/O8PD MS System Data In/Out: This pin is a bi-directional data signal for the MS device. Most significant bit (MSB) of each byte is transmitted first by either MSC or MS device. The bi-directional data signal has an internal weak pulldown resistor. MS_D1 20 A10 I/O8PD MS System Data In/Out: This pin is a bi-directional data signal for the MS device. This pin has internally controlled weak pull-up and pulldown resistors for various operational modes. MS_D[3:2] 22 21 A11 B10 I/O8PD MS System Data In/Out: This pin is a bi-directional data signal for the MS device. The bi-directional data signal has an internal weak pulldown resistor. MS_INS 18 A9 IPU MS Card Insertion: This pin is the card detection signal from the MS device to indicate, if the device is inserted. This pin has an internally controlled weak pull-up resistor. SM_nCD 78 B37 IPU Revision 1.91 (10-13-06) DATASHEET 14 SMSC USB2227/USB2228 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet SYMBOL MS_SCLK 128-PIN VTQFP 23 124-PIN DQFN B11 BUFFER TYPE O8 MS System CLK: DESCRIPTION This pin is an output clock signal to the MS device. The clock frequency is software configurable. SD INTERFACE SD_DAT[3:0] 29 28 27 26 A15 B13 A14 B12 I/O8PU SD Data 3-0: These are bi-directional data signals. These pins have internally controlled weak pull-up resistors. O8 SD Clock: This is an output clock signal to SD/MMC device. The clock frequency is software configurable. SD_CMD 30 B14 I/O8PU SD Command: This is a bi-directional signal that connects to the CMD signal of SD/MMC device. This pin has an internally controlled weak pull-up resistor. SD_nWP 25 A13 IPD SD Write Protected: This pin is an input signal with an internal weak pulldown. This pin has an internally controlled weak pull-down resistor. USB INTERFACE USBDM USBDP RBIAS 87 88 98 A44 B41 A49 IO-U USB Bus Data: These pins connect to the USB bus data signals. I USB Transceiver Bias: A 12.0kΩ, ± 1.0% resistor is attached from VSSA to this pin, in order to set the transceiver’s internal bias currents. ATEST 99 B47 AIO Analog Test: This signal is used for testing the analog section of the chip and should be connected to VDDA33 for normal operation. VDD18PLL VSSPLL 101 104 B48 A52 1.8v Power for the PLL PLL Ground Reference: Ground Reference for 1.8v PLL power VDDA33 VSSA 89 86 A45 A43 3.3v Analog Power Analog Ground Reference: Analog Ground Reference for 3.3v Analog Power. SD_CLK 31 A16 SMSC USB2227/USB2228 DATASHEET 15 Revision 1.91 (10-13-06) 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet SYMBOL XTAL1/ CLKIN 128-PIN VTQFP 102 124-PIN DQFN A51 BUFFER TYPE ICLKx DESCRIPTION Crystal Input/External Clock Input: 24Mhz Crystal or external clock input. This pin can be connected to one terminal of the crystal or can be connected to an external 24Mhz clock when a crystal is not used. Note: The ‘MA[2:0] pins will be sampled while nRESET is asserted, and the value will be latched upon nRESET negation. This will determine the clock source and value. XTAL2 103 B49 OCLKx Crystal Output: 24Mhz Crystal This is the other terminal of the crystal, or left open when an external clock source is used to drive XTAL1/CLKIN. It may not be used to drive any external circuitry other than the crystal circuit. MEMORY/IO INTERFACE MD[7:0] 12 11 10 9 8 7 6 5 4 2 1 128 127 126 125 124 123 122 121 120 119 B6 A6 B5 A5 A4 B4 A3 B3 A2 A1 B1 B60 A64 B59 A63 B58 A62 B57 A61 A60 B56 I/O8PU Memory Data Bus: When ROMEN bit of GPIO_IN1 register = 0, these signals are used to transfer data between the internal CPU and the external program memory. These pins have internally controlled weak pull-up resistors. O8 Memory Address Bus: These signals address memory locations within the external memory. MA[15:3] Revision 1.91 (10-13-06) DATASHEET 16 SMSC USB2227/USB2228 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet SYMBOL MA2/ SEL_CLKDR V 128-PIN VTQFP 118 124-PIN DQFN A59 BUFFER TYPE I/O8PD DESCRIPTION Memory Address Bus: MA2 Addresses memory locations within the external memory. SEL_CLKDRV. During nRESET assertion, this pins will select the operating clock mode (crystal or externally driven clock source), and a weak pull-down resistor is enabled. When nRESET is negated, the value will be internally latched and this pin will revert to MA2 functionality, the internal pull-down will be disabled. ‘0’ = Crystal operation (24MHz only) ‘1’ = Externally driven clock source (24MHz or 48MHz) Note: If the latched value is ‘1’, then the MA2 pin is tri-stated when the following conditions are true: 1. IDLE bit (PCON.0) is 1. 2. INT2 is negated 3. SLEEP bit of CLOCK_SEL is 1. If the latched value is ‘0’, then the MA2 pin will function identically to the MA[15:3] pins at all times (other than during nRESET assertion). MA[1:0]/CLK_ SEL[1:0] 117 116 B55 A58 I/O8PD Memory Address Bus: MA[1:0], These signals address memory locations within the external memory. SEL[1:0]. During nRESET assertion, these pins will select the operating frequency of the external clock, and the corresponding weak pull-down resistors are enabled. When nRESET is negated, the value on these pins will be internal latched and these pins will revert to MA[1:0] functionality, the internal pull-downs will be disabled. SEL[1:0] SEL[1:0] SEL[1:0] SEL[1:0] Note: = = = = ‘00’. 24MHz ‘01’. RESERVED ‘10’. RESERVED ‘11’. 48MHz If the latched value is ‘1’, then the corresponding MA pin is tri-stated when the following conditions are true: 1. IDLE bit (PCON.0) is 1. 2. INT2 is negated 3. SLEEP bit of CLOCK_SEL is 1. If the latched value is ‘0’, then the corresponding MA pin will function identically to the MA[15:3] pins at all times (other than during nRESET assertion). nMWR 14 B7 O8 Memory Write Strobe: Program Memory Write; active low nMRD 13 A7 O8 Memory Read Strobe: Program Memory Read; active low SMSC USB2227/USB2228 DATASHEET 17 Revision 1.91 (10-13-06) 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet SYMBOL nMCE 128-PIN VTQFP 17 124-PIN DQFN B8 BUFFER TYPE O8 DESCRIPTION Memory Chip Enable: Program Memory Chip Enable; active low. This signal is asserted, when any of the following conditions are no longer met: 1. IDLE bit (PCON.0) is 1. 2. INT2 is negated 3. SLEEP bit of CLOCK_SEL is 1. Note: MISC This signal is held to a logic ‘high’ while nRESET is asserted. GPIO1 114 A57 I/O8 General Purpose I/O: This pin may be used either as input, edge sensitive interrupt input, or output. GPIO2 113 B53 I/O8 General Purpose I/O: This pin may be used either as input, edge sensitive interrupt input, or output. GPIO3 94 B44 I/O8 General Purpose I/O: This pin may be used either as input, edge sensitive interrupt input, or output. GPIO4 111 A56 I/O8 General Purpose I/O: This pin may be used either as input, edge sensitive interrupt input, or output. GPIO5 110 B52 I/O8 General Purpose I/O: This pin may be used either as input, edge sensitive interrupt input, or output. GPIO6/ ROMEN 109 A55 IPU GPIO6, ROMEN: This pin has an internal weak pull-up resistor that is enabled or disabled by the state of nRESET. The pull-up is enabled when nRESET is active. The pull-up is disabled, when the nRESET is inactive (some clock cycles later, after the rising edge of nRESET). The state of this pin is latched internally on the rising edge of nRESET to determine if internal or external program memory is used. The state latched is stored in ROMEN bit of GPIO_IN1 register. I/O8 After the rising edge of nRESET, this pin may be used as GPIO6 or RXD. When pulled low via an external weak pull-down resistor, an external program memory should be connected to the memory data bus. The USB2227/USB2228 uses this external bus for program execution. When this pin is left unconnected or pulled high by a weak pull-up resistor, the USB2227/USB2228 uses the internal ROM for program execution. Revision 1.91 (10-13-06) DATASHEET 18 SMSC USB2227/USB2228 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet SYMBOL GPIO7 128-PIN VTQFP 107 124-PIN DQFN A54 BUFFER TYPE I/O8 DESCRIPTION General Purpose I/O: This pin may be used either as input, edge sensitive interrupt input, or output. GPIO8/ CRD_PWR0 42 B20 I/O8 General Purpose I/O or Card Power: GPIO: This pin may be used either as input, edge sensitive interrupt input, or output. CRD_PWR: Card Power drive of 3.3V @ 100mA. GPIO9 105 B50 I/O8 General Purpose I/O: This pin may be used either as input, edge sensitive interrupt input, or output. GPIO10/ CRD_PWR1 79 A40 I/O8 General Purpose I/O or Card Power: GPIO: These pins may be used either as input, edge sensitive interrupt input, or output. CRD_PWR: Card Power drive of 3.3V @ 100mA. GPIO11/ CRD_PWR2 44 B21 I/O8 General Purpose I/O or Card Power: GPIO: This pin may be used either as input, edge sensitive interrupt input, or output. CRD_PWR: Card Power drive of 3.3V @ 200mA. GPIO[15:12] 90 91 92 93 115 B42 A46 B43 A47 B54 I/O8 General Purpose I/O: These pins may be used either as input, or output. nRESET IS RESET input: This active low signal is used by the system to reset the chip. The active low pulse should be at least 1μs wide. nTEST[1:0] 95 96 A48 B45 I TEST input: These signals are used for testing the chip. User should normally tie them high externally, if the test function is not used. DIGITAL POWER, GROUNDS, and NO CONNECTS VDD18 49 106 B23 A53 1.8v Digital Core Power: +1.8V Core power All VDD18 pins must be connected together on the circuit board. VDD33 3 43 80 100 108 B2 A22 B38 A50 B51 3.3v Power & Voltage Regulator Input: 3.3V Power & Regulator Input. pins 100 & 108 supply 3.3V power to the internal 1.8V regulators. SMSC USB2227/USB2228 DATASHEET 19 Revision 1.91 (10-13-06) 4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs Datasheet SYMBOL VSS 128-PIN VTQFP 15 16 47 84 85 97 112 124-PIN DQFN A8 B40 BUFFER TYPE Ground: Ground Reference DESCRIPTION Notes: Hot-insertion capable card connectors are required for all flash media. It is required for SD connector to have Write Protect switch. This allows the chip to detect MMC card. nMCE is normally asserted except when the 8051 is in standby mode. VDD18 (Pin 106) and VDD18PLL (Pin 101) must have a 10uF +/-20% Low-ESR (equivalent series resistance)