USB2503

USB2503/ USB2503A Integrated USB 2.0 Compatible 3-Port Hub PRODUCT FEATURES Integrated USB 2.0 Compatible 3-Port Hub — 3 Transaction Translators for highest performance — High-Speed (480Mbits/s), Full-Speed (12Mbits/s) and Low-Speed (1.5Mbits/s) compatible — Full power management with per port or ganged, selectable power control — Detects Bus-Power/Self-Power source and changes mode automatically Datasheet On-Board 24MHz Crystal Driver Circuit or 24 MHz external clock driver Internal PLL for 480MHz USB 2.0 Sampling Internal 1.8V Linear Voltage Regulator Integrated USB termination and Pull-up/Pull-down resistors Internal Short Circuit protection of USB differential signal pins 1.8 Volt Low Power Core Operation 3.3 Volt I/O with 5V Input Tolerance 48 Pin QFN lead-free RoHS compliant package Complete USB Specification 2.0 Compatibility — Includes USB 2.0 Transceivers VID/PID/DID, and Port Configuration for Hub via: — Single Serial I2C EEPROM — SMBus Slave Port Default VID/PID/DID, allows functionality when configuration EEPROM is absent Hardware Strapping options allow for configuration without an external EEPROM or SMBus Host SMSC USB2503/USB2503A DATASHEET Revision 2.1 (12-06-06) Integrated USB 2.0 Compatible 3-Port Hub Datasheet ORDER NUMBERS: USB2503/USB2503A-HZH FOR 48 PIN QFN LEAD-FREE ROHS COMPLIANT PACKAGE 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © 2006 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Revision 2.1 (12-06-06) DATASHEET 2 SMSC USB2503/USB2503A Integrated USB 2.0 Compatible 3-Port Hub Datasheet Table of Contents Chapter 1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 OEM Selectable Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Chapter 2 Pin Table 3-Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Chapter 3 Pin Configuration 3-Port Hub . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 4 3-Port Hub Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Chapter 5 Functional Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 5.2 3-Port Hub . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1.1 Hub Configuration Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1.2 VBus Detect. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EEPROM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.1 I2C EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.2 In-Circuit EEPROM Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.3 EEPROM DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Slave Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.1 Bus Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.2 Invalid Protocol Response Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.3 General Call Address Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.4 Slave Device Time-Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.5 Stretching the SCLK Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.6 SMBus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.7 Bus Reset Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.8 SMBus Alert Response Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.9 Internal SMBus Memory Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Default Configuration Option: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Default Strapping Options: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6.1 External Hardware RESET_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6.2 USB Bus Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14 17 17 17 18 18 23 23 24 24 25 25 25 25 25 25 31 31 32 32 35 5.3 5.4 5.5 5.6 Chapter 6 XNOR Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Chapter 7 DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7.1 7.2 Maximum Guaranteed Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Recommended Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Chapter 8 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 8.1 Oscillator/Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.1.1 SMBus Interface: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.1.2 I2C EEPROM: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.1.3 USB 2.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 42 42 42 Chapter 9 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 SMSC USB2503/USB2503A DATASHEET 3 Revision 2.1 (12-06-06) Integrated USB 2.0 Compatible 3-Port Hub Datasheet List of Figures Figure 3.1 Figure 4.1 Figure 5.1 Figure 5.2 Figure 5.3 Figure 5.4 Figure 9.1 3-Port 48-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3-Port Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 LED Strapping Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Reset_N Timing for Default/Strap Option Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Reset_N Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Reset_N Timing for SMBus Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 48 Pin QFN Package Outline (7x7 mm body - 0.5 mm pitch) . . . . . . . . . . . . . . . . . . . . . . . . 43 Revision 2.1 (12-06-06) DATASHEET 4 SMSC USB2503/USB2503A Integrated USB 2.0 Compatible 3-Port Hub Datasheet List of Tables Table 4.1 Table 4.2 Table 4.3 Table 4.4 Table 4.5 Table 5.1 Table 5.2 Table 5.3 Table 5.4 Table 5.5 Table 5.6 Table 5.7 Table 7.1 Table 9.1 3-Port Hub Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 SMBus or EEPROM Interface Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Miscellaneous Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Power, Ground, and No Connect. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 User-Defined Descriptor Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SMBus Write Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SMBus Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SMBus Slave Interface Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Reset_N Timing for Default/Strap Option Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Reset_N Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Reset_N Timing for SMBus Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 48 Pin QFN Package Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 SMSC USB2503/USB2503A DATASHEET 5 Revision 2.1 (12-06-06) Integrated USB 2.0 Compatible 3-Port Hub Datasheet Chapter 1 General Description The SMSC 3-Port Hub is fully compliant with the USB 2.0 Specification and will attach to a USB host as a Full-Speed Hub or as a Full-/High-Speed Hub. The 3-Port Hub supports Low-Speed, Full-Speed, and High-Speed (if operating as a High-Speed Hub) downstream devices on all of the enabled downstream ports. A dedicated Transaction Translator (TT) is available for each downstream facing port. This architecture ensures maximum USB throughput for each connected device when operating with mixed-speed peripherals. The Hub works with an external USB power distribution switch device to control VBUS switching to downstream ports, and to limit current and sense over-current conditions. All required resistors on the USB ports are integrated into the Hub. This includes all series termination resistors on D+ and D– pins and all required pull-down and pull-up resistors on D+ and D– pins. The over-current sense inputs for the downstream facing ports have internal pull-up resistors. Throughout this document the upstream facing port of the hub will be referred to as the upstream port, and the downstream facing ports will be called the downstream ports. 1.1 OEM Selectable Features A default configuration is available in the USB2503/USB2503A following a reset. This configuration may be sufficient for some applications. Strapping option pins make it possible to modify a limited subset of the configuration options. The USB2503/USB2503A may also be configured by an external EEPROM or a microcontroller. When using the microcontroller interface, the Hub appears as an SMBus slave device. If the Hub is pinstrapped for external EEPROM configuration but no external EEPROM is present, then a value of ‘0’ will be written to all configuration data bit fields (the hub will attach to the host with all ‘0’ values). The 3-Port Hub supports several OEM selectable features: Operation as a Self-Powered USB Hub or as a Bus-Powered USB Hub. Operation as a Dynamic-Powered Hub (Hub operates as a Bus-Powered device if a local power source is not available and switches to Self-Powered operation when a local power source is available). Multiple Transaction Translator (Multi-TT) or Single-TT support. Optional OEM configuration via I2C EEPROM or via the industry standard SMBus interface from an external SMBus Host. Port power switching on an individual or ganged basis. Port over-current monitoring on an individual or ganged basis. Compound device support (port is permanently hardwired to a downstream USB peripheral device). Hardware strapping options enable configuration of the following features. Non-Removable Ports Port Power Polarity (active high or active low logic) Port Disable Ganged Vs Port power switching and over-current sensing Revision 2.1 (12-06-06) DATASHEET 6 SMSC USB2503/USB2503A Integrated USB 2.0 Compatible 3-Port Hub Datasheet Chapter 2 Pin Table 3-Port Table 2.1 3-Port Pin Table UPSTREAM USB 2.0 INTERFACE (3-PINS) USBDP0 USBDN0 VBUS_DET 3-PORT USB INTERFACE (18-PINS) USBDP1 USBDP3 GR3/ PRT_DIS0 PRTPWR_POL GANG_EN USBDN1 USBDN3 PRTPWR1 OCS1_N RBIAS SERIAL PORT (3-PINS) SDA/SMBDATA SCL/SMBCLK/CFG_SEL0 CFG_SEL1 MISC (8-PINS) XTAL1/CLKIN TEST1 XTAL2 TEST0 RESET_N ATEST/ REG_EN POWER & GROUNDS (16-PINS) SELF_PWR CLKIN_EN USBDP2 GR1/ NON_REM0 PRTPWR2 OCS2_N USBDN2 GR2/ NON_REM1 PRTPWR3 OCS3_N SMSC USB2503/USB2503A DATASHEET 7 Revision 2.1 (12-06-06) Integrated USB 2.0 Compatible 3-Port Hub Datasheet Chapter 3 Pin Configuration 3-Port Hub SCL/SMBCLK/CFG_SEL0 26 SELF_PWR VBUS_DET PRTPWR1 CLKIN_EN OCS1_N OCS2_N TEST1 VDD18 VSS 27 RESET_N VSS VDD33CR VDD18 VSS XTAL2 XTAL1/CLKIN VDDA18PLL VDDA33PLL ATEST/REG_EN RBIAS VSS 37 38 39 40 41 42 43 44 45 46 47 48 10 12 11 1 4 2 6 7 3 5 8 9 25 30 29 35 28 34 33 32 31 36 SDA/SMBDATA CFG_SEL1 24 23 22 TEST0 VDD18 VSS GR1/NON_REM0 GANG_EN GR2/NON_REM1 PRTPWR_POL GR3/PRT_DIS0 PRTPWR2 OCS3_N PRTPWER3 VDDA33 SMSC USB2503 & USB2503A (Top View QFN-48) Thermal Slug (must be connected to VSS) 21 20 19 18 17 16 15 14 13 VSS VDDA33 USBDP0 USBDP1 VDDA33 USBDN0 USBDN1 USBDP2 USBDN2 VSS USBDN3 Indicates pins on the bottom of the device. Figure 3.1 3-Port 48-Pin QFN Revision 2.1 (12-06-06) DATASHEET 8 USBDP3 SMSC USB2503/USB2503A Integrated USB 2.0 Compatible 3-Port Hub Datasheet Chapter 4 3-Port Hub Block Diagram Upstream Upstream 24 MHz USB Data VBUS Crystal 3.3V To EEPROM Pin 1.8V Strapping or SMBus Master Cap Options SD SCL Upstream PHY VBUS Power Detect PLL 1.8V Reg. Internal Defaults Select Serial Interface Repeater SIE Controller TT #1 TT #2 TT #3 Port Controller Routing Logic Port #1 Downstream OC Sense PHY #1 Switch Driver LED Drivers ... Port #3 Downstream OC Sense PHY #3 Switch Driver LED Drivers Downstream OC Switch/LED USB Data Sense Drivers Downstream USB Data OC Switch/LED Sense Drivers Figure 4.1 3-Port Block Diagram Table 4.1 3-Port Hub Pin Descriptions NAME SYMBOL TYPE UPSTREAM USB 2.0 INTERFACE FUNCTION USB Bus Data Detect Upstream VBUS Power USBDN0 USBDP0 VBUS_DET IO-U I/O12 These pins connect to the USB bus data signals. Detects state of Upstream VBUS power (indicates the power-managed state of the upstream device). SMSC USB2503/USB2503A DATASHEET 9 Revision 2.1 (12-06-06) Integrated USB 2.0 Compatible 3-Port Hub Datasheet Table 4.1 3-Port Hub Pin Descriptions (continued) NAME SYMBOL TYPE 3-PORT USB 2.0 HUB INTERFACE FUNCTION High-Speed USB Data USB Power Enable USBDN[3:1] USBDP[3:1] PRTPWR[3:1] IO-U O12 These pins connect to the downstream USB peripheral devices attached to the Hub’s ports. Enables power to USB peripheral devices (downstream). The active signal level of the PRTPWR[3:1] pins are determined by the Power Polarity Strapping function of the PRTPWR_POL pin. Port 3 Green LED & Port Disable strapping option. GR3/ PRT_DIS0 I/O12 Green indicator LED for port 3. Will be active low when LED support is enabled via EEPROM or SMBus. If the hub is configured by the internal default configuration, these pins will be sampled at RESET_N negation to determine if port 3 will be permanently disabled. Also, the active state of the LED will be determined as follows: PRT_DIS0 = ‘0’, All ports are enabled, GR3 is active high. PRT_DIS0 = ‘1’, Port 3 is disabled, GR3 is active low. Port [2:1] Green LED & Port NonRemovable strapping option. GR[2:1]/ NON_REM[1:0] I/O12 Green indicator LED for ports 2 and 1. Will be active low when LED support is enabled via EEPROM or SMBus. If the hub is configured by the internal default configuration, these pins will be sampled at RESET_N negation to determine if ports [3:1] contain permanently attached (nonremovable) devices. Also, the active state of the LED’s will be determined as follows: NON_REM[1:0] = ‘00’, All ports are removable, GR2 is active high, GR1 is active high. NON_REM1:0] = ‘01’, Port 1 is non-removable, GR2 is active high, GR1 is active low. NON_REM[1:0] = ‘10’, Ports 1 & 2 are non-removable, GR2 is active low, GR1 is active high. NON_REM[1:0] = ‘11’, Ports 1, 2, & 3 are non-removable, GR2 is active low, GR1 is active low. Gang Power Switching and Current Sensing strapping option. GANG_EN I/O12 If the hub is configured by the internal default configuration, this pin will be sampled at RESET_N negation to determine if downstream port power switching and current sensing are ganged, or individual port-by-port. ‘0’ = Port-by-port sensing & switching. ‘1’ = Ganged sensing & switching. Revision 2.1 (12-06-06) DATASHEET 10 SMSC USB2503/USB2503A Integrated USB 2.0 Compatible 3-Port Hub Datasheet Table 4.1 3-Port Hub Pin Descriptions (continued) NAME SYMBOL TYPE FUNCTION Port Power Polarity strapping. PRTPWR_POL I/O12 Port Power Polarity strapping determination for the active signal polarity of the PRTPWR[3:1] pins. While RESET_N is asserted, the logic state of this pin will (though the use of internal combinatorial logic) determine the active state of the PRTPWR[3:1] pins in order to ensure that downstream port power is not inadvertently enabled to inactive ports during a hardware reset. When RESET_N is negated, the logic value will be latched internally, and will retain the active signal polarity for PRTPWR[3:1] pins. ‘1’ = PRTPWR[3:1] pins have an active ‘high’ polartity ‘0’ = PRTPWR[3:1] pins have an active ‘low’ polarity Over Current Sense USB Transceiver Bias OCS[3:1]_N IPU Input from external current monitor indicating an overcurrent condition. {Note: Contains internal pull-up to 3.3V supply} A 12.0kΩ (+/− 1%) resistor is attached from ground to this pin to set the transceiver’s internal bias settings. RBIAS I-R SERIAL PORT INTERFACE Serial Data/SMB Data Serial Clock/SMB Clock & Chip Select / EEPROM Select SMB Programming Select SDA/SMBDATA SCL/SMBCLK/ CFG_SEL0 IOSD12 IOSD12 (Serial Data)/(SMB Data) signal. (Serial Clock)/(SMB Clock) signal. This multifunction pin is read on the rising edge of RESET_N negation and will determine the hub configuration method as described in Table 4.2. This pin is read on the rising edge of RESET_N negation and will detemine the hub configuration method as described in Table 4.2. CFG_SEL1 I Table 4.2 SMBus or EEPROM Interface Behavior CFG_SEL1 0 1 1 CFG_SEL0 X 0 1 SMBus or EEPROM interface behavior. Configured as an SMBus slave for external download of user-defined descriptors. SMBus slave address is :0101101 Internal Default Configuration via strapping options. 2-wire (I2C) EEPROMS are supported, and CFG_SEL0 has no other functionality. Table 4.3 Miscellaneous Pins NAME SYMBOL TYPE FUNCTION Crystal Input/External Clock Input XTAL1/ CLKIN ICLKx 24MHz crystal or external clock input. This pin connects to either one terminal of the crystal or to an external 24MHz clock when a crystal is not used. 11 Revision 2.1 (12-06-06) SMSC USB2503/USB2503A DATASHEET Integrated USB 2.0 Compatible 3-Port Hub Datasheet Table 4.3 Miscellaneous Pins (continued) NAME SYMBOL TYPE FUNCTION Crystal Output XTAL2 OCLKx 24MHz Crystal This is the other terminal of the crystal, or left unconnected when an external clock source is used to drive XTAL1/CLKIN. It must not be used to drive any external circuitry other than the crystal circuit. Clock In Enable: Low = XTAL1 and XTAL2 pins configured for use with external crystal High = XTAL1 pin configured as CLKIN, and must be driven by an external CMOS clock. This active low signal is used by the system to reset the chip. The minimum active low pulse is 100ns. Detects availability of local self-power source. Low = Self/local power source is NOT available (i.e., 7Port Hub gets all power from Upstream USB VBus). High = Self/local power source is available. Used for testing the chip. User must treat as a noconnect or connect to ground. For board testing, all signal pins are included in an XNOR chain, Please see Chapter 6, "XNOR Test," on page 37 for more details on the configuration and use of the XNOR mode. This signal is used for testing the analog section of the chip, and to enable or disable the internal 1.8v regulator. This pin must be connected to VDDA3P3 to enable the internal 1.8V regulator, or to VSS to disable the internal regulator. When the internal regulator is enabled, the 1.8V power pins must be left unconnected, except for the required bypass capacitors.When the PHY is in test mode, the internal regulator is disabled and the ATEST pin functions as a test pin. Clock Input Enable CLKIN_EN I RESET Input Self-Power / Bus-Power Detect TEST Pins RESET_N SELF_PWR IS I TEST[1:0] IPD Analog Test & Internal 1.8V voltage regulator enable ATEST/ REG_EN AIO Table 4.4 Power, Ground, and No Connect NAME SYMBOL TYPE FUNCTION VDD1P8 VDD18 +1.8V core power. If the internal regulator is enabled, then VDD18 pin closest to VDD33CR must have a 4.7μF (or greater) ±20% (ESR