CXA1390AR

CXA1390AQ/AR S/H and AGC for CCD Camera Description The CXA1390AQ/AR are CCD camera's signal processing ICs which extract signals from the CCD output. These bipolar ICs perform correlated double sampling. AGC, color separation, high luminance detection and others. Additionary, these ICs are not affected by irregular pulses which occure during the CCD shutter mode. Featuers • Pin compatible upgraded version of CXA1390Q/R which can be swapped out while using same peripheral chips • Almost completely corrects irregular pulses and their negative affects • Correlated double sampling function alllows for the suppression of low band noise in the CCD output • AGC amplifier, which has High S/N ratio and wide gain control range, enhances the camera sensitivity • Output for iris adjustment. High luminance detection output • Usage of Vg (regulator) output allows for the formation of IRIS and AGC LOOP which are not affected by supply voltage functation Operating Conditions Supply voltage VCC CXA1390AQ 48 pin QFP (Plastic) CXA1390AR 48 pin LQFP (Plastic) Application S/H and AGC for CCD camera Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VCC 12 V • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 600 (QFP) mW 950 (VQFP) ∗ mW ∗ (40mm × 40mm, t = 0.8mm with a mounted glass epoxy substrate) 4.75 to 5.25 V Block Diagram and Pin Configuration (Top View) IRIS LEVEL DET OUT IRIS OUT DET CLP IRIS CLP IRIS GC VG OUT PBLK CLP1 W ND V CC2 GND 24 23 22 21 20 19 18 17 16 VG 15 14 13 DET LEVEL 25 CLP CLP1 CLP1 12 CSAGC SL CLP BLK AGC CLP 26 11 CSAGC GC W ND PBLK MODE SW OR SLICE GC W ND W ND AGC OUT 27 OP IN + 28 10 9 CS OUT W ND CS CCD GC PBLK BLK SLICE GC GC CLP OP OP IN – 29 OP OUT 30 AGC CONT 8 7 6 SH XSP3 LPF PBLK CLP BLK CLP1 CLP BLK CLP1 CLP BLK GATE CS CCD SL CLP CLP1 CLP1 31 AGC MAX CS CLP F3 OUT AGC MAX 32 XSHP XSHP 5 4 3 2 1 F2 OUT SH AGC SEL 33 34 SH SH XSP2 LPF PBLK F1 OUT XSHD COM XSHD CLP4 CLP4 XSHP GY OUT SH SH XSHD 35 XSHP SH COM SH XSP1 LPF PBLK DC OUT CLP4 36 XSH1 37 PG IN 38 DATA IN 39 V CC1 40 XSP3 41 XSP2 42 XSP1 43 GND 44 FSH1 45 F3 CLP 46 F2 CLP 47 F1 CLP 48 XSH2 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E90941A78 CXA1390AQ/AR Pin Description and Standard Pin voltage PIn No. 1 34 35 40 41 42 48 Symbol XSH1 XSHP XSHD XSP3 XSP2 XSP1 XSH2 1k 1 34 35 200 130 (VCC = 5V) Equivalent circuit Description Voltage H: 4V and above L: 1V and below 40 41 42 48 200 High speed pulse input pin for S/H (active at L) 2 DC OUT 1.8 to 2.1V 180µA 2 DC output pin of f1 to f3 output black level 3 4 5 6 27 7 18 20 26 45 46 47 10 GY OUT 300 F1 OUT F2 OUT F3 OUT AGC OUT CS CLP IRIS CLP DET CLP AGC CLP F3 CLP F2 CLP F1 CLP CS OUT 2.6 to 3.3V 2.0 to 2.6V 1.9 to 2.6V 130 3 Black level 1.8 to 2.1V 360µA 4 5 6 27 Signal output pin 7 18 20 26 45 46 47 2.3 to 2.8V 2.0 to 2.6V 2.0 to 2.6V 2.0 to 2.6V 1.7 to 2.2V 300 10 Capacitor connecting pin for clamp Signal output pin 17 IRIS OUT 1.7 to 2.0V 200µA 17 24 Signal output pin Vcc fluctuations effect is minor on DC level 24 DET OUT 1.7 to 2.0V –2– CXA1390AQ/AR PIn No. 8 Symbol Voltage Equivalent circuit Description Level adjustment pin of high luminance detection pin of the input signal Gain adjustment pin of input signal high luminance part CS CCD SL 9 11 12 21 22 25 31 32 CS CCD GC CSAGC GC CSAGC SL IRIS LEVEL IRIS GC DET LEVEL AGC CONT AGC MAX (Test mode at 0V) 8 9 11 12 21 22 25 31 32 130 Gain adjustment pin of high luminance port after AGC Level adjustment pin of high luminance detection after AGC Adjustment pin of IRIS output weighting (Active at WND = L) Gain adjustment pin of IRIS output Adjustment pin of DET output weighting (Active at WND = L) AGC amplifier gain adjustment pin AGC amplifier MAX gain adjustment pin CLP1 pulse input pin Active at H (OPB clamp) Pre BLK pulse input pin Active at L Window pulse input pin Active at L CLP4 pulse input pin Active at H 13 CLP1 130 13 14 14 P BLK H: 4V and above L: 1V and below 15 WND 130 15 36 36 CLP4 16 VG OUT 2.6 to 3.1V 100µA 16 Regulator output pin (Used for the formation of AGC and IRIS loop) 28 OP IN + 28 130 Operation amplifier non inverted input pin 1 to 3.3V 29 OP IN – 130 29 Operation amplifier inverted input pin –3– CXA1390AQ/AR PIn No. Symbol Voltage Equivalent circuit Description 500µA 30 30 OP OUT H: 4.2V and above L: 1.2V and below 3.6V Output pin 33 AGC SEL VCC: Low Gain mode GND: High Gain mode 3.3V 50k 33 AGC amplifier gain selection pin 100µA 37 38 37 38 PG IN DATA IN Black level 2.7 to 3.2V CCD signal input pin 8.5k 44 44 FSHI 1.4 to 1.8V 130 Adjustment pin for color separation S/H follow up speed (Normally used OPEN) –4– CXA1390AQ/AR Electrical Characteristics Item Current consumption Symbol ID ACON Min. AGC OUT/DATA IN AGC CONT = 1.5V AGC MAX = 5V AGC SEL = 0V AGC OUT/DATA IN AGC CONT = 4.5V AGC MAX = 5V AGC SEL = 0V AGC OUT/DATA IN AGC CONT = 4.5V AGC MAX = 1.5V AGC SEL = 0V AGC OUT (SEL = 5V) /AGC OUT (SEL = 0V) Note 1) Color separation output/AGC OUT (f1, f2, f3) Note 1) –5 –10 –0.5 –10 1.8 GY OUT/AGC OUT IRIS OUT/DATA IN IRIS GC = 5V WND = 5V IRIS OUT/DATA IN IRIS GC = 1.5V WND = 5V Gain Cont Max. ratio (attenuation) IRIS GC = 1.5V IRIS LEVEL = 5V WND = 0V Gain Cont Max. ratio (attenuation) IRIS GC = 1.5V IRIS LEVEL = 1.5V WND = 0V DET OUT/AGC OUT WND = 5V DET OUT/AGC OUT DET LEVEL = 5V WND = 0V Level Max. ratio DET LEVEL = 1.5V WND = 0V –2 –0.5 18 Conditions Min. 32 (Ta = 25°C, VCC = 5.0V) Typ. 48 Max. 65 Unit mA CONT Min. 6 8 dB CONT Max. AGC Max. Min. ACON Max. 30 32 dB MAX Min. 17 20 dB Gain shift BLK offset Color Gain separation BLK offset DC OUT Gate Gain Gain Cont Max. GSHI ∆BLK f Gain f ∆BLK DC GY IR Max. –4 0 0 0 1.95 0 22 –3 +10 +0.5 +10 2.1 +0.5 dB mV dB mV V dB dB Gain Cont Min. IRIS Window Level Max. IR Min. 4 8 dB IRW Max. –1 0 dB Window Level Min. IRW Min. –14 dB Gain DET G DET Max. DET Min. –1 +0.5 dB DET Window Level Max. –2 –1 +0.5 dB Window Level Min. –13 dB –5– CXA1390AQ/AR Item Symbol Conditions CSOUT differential/ DATA IN differential CS CCD SL = 4.1V CS CCD GC = 5V PBLK = 0V CSOUT differential/ DATA IN differential CS CCD SL = 4.1V CS CCD GC = 1.5V PBLK = 0V Input conversion slice level CS CCD SL = 1.5V Note 1) Input conversion slice level CS CCD SL = 5V Note 1) CS OUT DATA IN = 0.2Vpp CS AGC GC = 5V CS AGC SL = 4.2V CS CCD GC = 1.5V CS CCD SL = 1.5V Note 2) CS OUT differential/ AGC OUTdifferential CS AGC GC = 1.5V CS AGC SL = 4.2V CS CCD GC = 1.5V CS CCD SL = 1.5V Note 2) AGC OUT conversion CS AGC SL = 1.5V Note 3) AGC OUT conversion CS AGC SL = 5V Note 3) DATA IN = 0.5Vpp CS CCD GC = 0V Note 4) OP IN + = 2.1V OP IN – = 2.0V OP IN + = 2.0V OP IN – = 2.1V At no load Min. Typ. Max. Unit Max. Gain CSC Max. 13 16 dB Min. Gain CS CCD CSC Min. –1 1 dB Max. SLICE CSC Max. SL CSC Min. SL 0.7 V Min. SLICE 40 100 mV Max. Gain CSA Max. 0.5 Vpp CS Min. Gain AGC CSA Min. –1 1 dB Max. SLICE CSA Max. SL CSA Min. SL 1.2 V Min. SLICE 0.06 0.1 V TEST mode TEST 0.5 Vpp OPAmp H level L level OPH OPL Vg 4.2 0.9 2.6 2.85 1.2 3.1 V V V Vg OUT –6– CXA1390AQ/AR Note 1) Indicates the specification Output signal BLK input 5 0 Note 2) Voltage between DATA IN input black level and the high luminance level determined by CS CCD SL pin voltage. Black level High luminance level Indicates the specification CS OUT DATA IN Note 3) Voltage between the black level at AGC OUT and the high luminance level determined by CS AGC SL pin voltage. High luminance level AGC OUT Black level Indicates the specification CS OUT Note 4) S/H output DATA IN input can be monitored by turning CS CCD GC (Pin 9) to 0V. –7– CXA1390AQ/AR Test Circuit VCC 5V (3V) (3V) (3V) (3V) 0.1 IRIS LEVEL 0.1 CLP2 10µ DET OUT IRIS GC DET CLP IRIS CLP IRIS OUT VG OUT PBLK V CC2 GND W ND 24 23 22 21 20 19 18 17 16 VG 15 14 13 CLP1 (3V) DET LEVEL 25 CLP CLP1 CLP1 12 CSAGC SL (3V ) W ND PBLK 0.1 W ND W ND CLP BLK AGC CLP 26 11 CSAGC GC MODE SW OR SLICE GC (3V) AGC OUT 27 OP IN + 28 10 9 CS OUT W ND (2V) CS CCD GC (3V) PBLK BLK SLICE GC CLP OP (2V) OP IN – 29 CLP GC 8 7 6 SH XSP3 LPF PBLK CLP BLK CLP1 CLP BLK CLP1 CLP BLK GATE CS CCD SL (3V) MAX OP OUT 30 (1.5V) AGC CONT CLP1 CS CLP CLP1 0.1 F3 OUT 31 AGC (5V) AGC MAX 32 5 4 3 2 1 F2 OUT XSHP SH (0V) AGC SEL 33 34 XSHP SH SH XSP2 SH XSP1 LPF PBLK F1 OUT XSHD XSHD COM CLP4 CLP4 XSHP GY OUT SH SH XSHD 35 COM LPF PBLK DC OUT CLP4 36 SH CLP4 XSHP XSH1 37 PG IN 38 DATA IN 39 V CC1 40 XSP3 41 XSP2 42 XSP1 43 GND 44 FSH1 45 F3 CLP 46 F2 CLP 47 F1 CLP 48 XSH2 0.1 0.1 IN 10µ VCC 5V 0.1 0.1 0.1 Note 1) Capacitor unit value at µF. Note 2) Voltage in parentheses are those not specified in the Electrical Characteristics Test Conditions. Note 3) indicates a test pin. (For both AC and DC) –8– CXA1390AQ/AR Timing Diagram for Testing Equivalent to black DATA IN input Differs with every test 5V CLP 1 2µsec 1H 0 2µsec 5V CLP 4 0 Output waveform AGC OUT IRIS OUT F1 to F3 OUT GY OUT DET OUT CS OUT Output signal level –9– CXA1390AQ/AR Standard Control Characteristics (VCC = 5V, Ta = 25°C) AGC amplifier gain control characteristics dB (AGC Max. = 5V) 30 30 dB (AGC CONT = 5V) AGC maximum control characteristics 25 20 20 15 10 10 5 0 1 2 3 4 5 V 5 0 1 2 3 4 5 V AGC CONT voltage AGC maximum voltage IRIS gain control characteristics dB dB IRIS WINDOW control characteristics (Weighting characteristics) (WND = 0V) Gain control characteristics when IRIS LEVEL=5V is set at 0dB 0 25 20 –5 15 –10 10 –15 5 –20 0 0 1 2 3 4 5 V 1 2 3 4 5 V IRIS GC voltage IRIS LEVEL voltage DET WINDOW control characteristics (Weighting characteristics) dB (WND = 0V) Gain control characteristics when DET LEVEL = 5V is set at 0dB 0 –5 –10 –15 –20 1 2 3 4 DET LEVEL voltage 5 V – 10 – CXA1390AQ/AR CS CCD gain control characteristics dB V CS CCD slice control characteristics (High luminance detection level control) Input conversion value Note 1-b 20 Note 1-a 0 15 0.2 0.4 10 0.6 5 0.8 0 0 1 2 3 4 5 V CS CCD GC voltage 1.0 0 1 2 3 4 5 V CS CCD SL voltage CS AGC gain control characteristics dB V CS AGC slice control characteristics Note 2-b 20 1.6 Note 2-a 1.2 15 0.8 10 0.4 5 0 0 1 2 3 4 5 V 1 2 3 4 5 V CS AGC GC voltage CS AGC SL voltage (High luminance detection level control after AGC) Input conversion value Note 1-a, 1-b (2) DATA IN SLICE (1) CS CCD SL CS CCD GC GCA (3) CS OUT Note 2-a, 2-b COLOR SEPARATION AGC (1) CS AGC SL Detection level CS AGC GC SLICE (2) CS OUT GCA (3) (1) Detection level (2) Black level Note 1-b Voltage indicated at CS CCD slice control characteristics Note 1-a Characteristics indicated at CS CCD gain control characteristics =ratio of 3 and 2 (dB) (1) Black level (2) Note 2-b Voltage indicated at CS AGC slice control characteristics (3) (3) Note 2-a Characteristics indicated at CS AGC slice control characteristics =ratio of 3 and 2 (dB) – 11 – CXA1390AQ/AR Supply voltage Characteristics Standard Design Documentation (Ta = 25°C) AGC amplifier gain control characteristics dB 5.25V 30 (AGC Max. = VCC) 4.75V 25 4.75V 20 5V (AGC CONT = VCC) 30 dB 5.25V 5V AGC maximum control characteristics 20 15 10 10 5 0 1 2 3 4 5 AGC CONT voltage (× VCC ) 5 5 0 1 2 3 4 5 AGC maximum voltage (× VCC ) 5 IRIS gain control characteristics dB dB IRIS WINDOW control characeristics (Weighting characteristics) WND = 0V Gain control characteristics when IRIS LEVEL = Vcc is set at 0dB 0 5.25V 5V 25 20 5.25V 5V 4.75V –5 15 –10 10 –15 5 –20 0 0 1 2 3 4 5 IRIS GC volage × VCC 5 1 2 3 4 5 (× VCC ) 5 4.75V IRIS LEVEL voltage DET WINDOW control (Weighting characteristics) dB WND=0V Gain control characteristics when DET LEVEL=Vcc is set at 0dB 0 5.25V 4.75V 5V –5 –10 –15 –20 1 2 3 4 DET LEVEL voltage 5 (× VCC ) 5 – 12 – CXA1390AQ/AR CS CCD gain control characteristics dB Note 1-a 20 5.25V 5V 4.75V 0 V CS CCD slice control characteristics (High luminance detection level control) Input conversion value Note 1-b 5.25V 5V 15 0.2 4.75V 0.4 10 0.6 5 0.8 0 0 1 2 3 4 5 (× CS CCD GC voltage VCC ) 5 1.0 0 1 2 3 4 5 CS CCD SL voltage (× VCC ) 5 CS AGC gain control characteristics dB Note 2-a 20 5.25V 5V 15 4.75V 1.2 1.6 V CS AGC slice control characteristics Note 2-b 0.8 10 0.4 5 0 0 1 2 3 4 5 CS AGC GC voltage (× VCC ) 5 1 2 3 4 (High luminance detection level control after AGC) Input conversion value 4.75V 5V 5.25V 5 CS AGC SL voltage (× VCC ) 5 Note 1-a, 1-b (2) DATA IN SLICE (1) CS CCD SL CS CCD GC GCA (3) CS OUT Note 2-a, 2-b COLOR SEPARATION SLICE (2) CS OUT GCA (3) CS AGC SL CS AGC GC AGC (1) Detection level (1) Detection level (2) Black level Note 1-b Voltage indicated at CS CCD slice control characteristics Note 1-a Characteristics indicated at CS CCD gain control characteristics =ratio of 3 and 2 (dB) (1) Black level (2) Note 2-b Voltage indicated at CS AGC slice control characteristics (3) (3) Note 2-a Characteristics indicated at CS AGC slice control characteristics =ratio of 3 and 2 (dB) – 13 – CXA1390AQ/AR Standard Design Documentation Temperature Characteristics (VCC = 5V) AGC amplifier gain control characteristics dB –20°C 30 (AGC Max. = VCC) 25°C 75°C 25 75°C 30 (AGC CONT = VCC) dB –20°C 25°C AGC maximum control characteristics 20 20 15 10 10 5 0 1 2 3 4 5 V AGC CONT voltage 5 0 1 2 3 4 5 V AGC maximum voltage IRIS gain control characteristics dB dB IRIS WINDOW control characteristics (Weighting characteristics) (WND = 0V) Gain control characteristics when IRIS LEVEL = VCC, Ta=25°C is set at 0dB. –20°C –5 75°C 25 20 –20°C 25°C 75°C 0 25°C 15 –10 10 –15 5 –20 0 0 1 2 3 4 5 V 1 2 3 4 5 V IRIS GC voltage IRIS LEVEL voltage DET WINDOW control (Weighting characteristics) dB (WND = 0V) Gain control characteristics when DET LEVEL = VCC, Ta = 25°C is set at 0dB. –20°C 75°C –5 25°C 0 –10 –15 –20 1 2 3 4 DET LEVEL voltage 5 V – 14 – CXA1390AQ/AR CS CCD gain control characteristics dB Note 1-a 20 –20°C 15 25°C 75°C 0.2 0 V CS CCD slice control characteristics (High luminance detection level control) Input conversion value Note 1-b –20°C 25°C 75°C 0.4 10 0.6 5 0.8 0 0 1 2 3 4 5 V CS CCD GC voltage 1.0 0 1 2 3 4 5 V CS CCD SL voltage CS AGC gain control characteristics dB Note 2-a –20°C 20 25°C 75°C 15 1.6 V CS AGC slice control characteristics Note 2-b 1.2 0.8 10 0.4 5 0 0 1 2 3 4 5 V 1 2 3 4 5 V CS AGC GC voltage CS AGC SL voltage (High luminance detection level control after AGC) Input conversion value 75°C 25°C –20°C Note 1-a, 1-b (2) DATA IN SLICE (1) CS CCD SL CS CCD GC GCA (3) CS OUT Note 2-a, 2-b COLOR SEPARATION AGC (1) CS AGC SL Detection level SLICE (2) CS OUT GCA (3) CS AGC GC (1) Detection level (2) Black level Note 1-b Voltage indicated at CS CCD slice control characteristics Note 1-a Characteristics indicated at CS CCD gain control characteristics =ratio of 3 and 2 (dB) (1) Black level (2) Note 2-b Voltage indicated at CS AGC slice control characteristics (3) (3) Note 2-a Characteristics indicated at CS AGC slice control characteristics =ratio of 3 and 2 (dB) – 15 – CXA1390 Series System Diagram (The title insertion function can be removed by doing away with CXA1393AN) W/B CONTROLLER IHDL IHDL IHDL CCD DL DETECTOR 51 47 41 34 39 33 50 44 49 48 45 43 42 46 40 38 37 36 35 YOCLP S1-IN S2-IN R-MIX B-CLP G-CLP B-MTX R-CLP B-GAIN B-CONT R-CONT R-GAIN DLC1-IN CLP4 C1-GAIN DLD XSHD XSHP DLCO-OUT MPX2-CLP MPX1-CLP SHPLEVEL DLE OPIN-N OPIN-P OP-OUT AGC-SEL AGC-OUT AGC-MAX AGC-CLP DETLEVEL SHP-CLP1 AGC-CONT 39 V CC 1 39 YH-CLP 40 YH-IN 41 YL-YH CLP 42 YL-YH IN 43 AGND 44 CLP4 45 CLP2 46 B-LEVEL 47 B-Y IN 48 B-Y 56 DLY2-IN IRIS-GC 22 WB-R 28 CGAM-CONT 27 CXA1391 Q/R GND 26 YL-OUT 25 CS-OUT 24 VCS-GAIN 23 R-Y HUE 22 B-Y HUE 21 R-Y 20 OUT 55 DLY1-IN WB-G 29 FADER-MODE SYNC-LEVEL SETUP 5V 38 DATA-IN 38 NOISE-SLICE DET- 24 OUT V CC 2 23 5V 54 Y1-GAIN 37 YTBLK SHP-CLP2 SHP-OUT Y-LEVEL WB-B 30 FADER-SIG 37 PG-IN OUT 53 DLY1-OUT C- 32 SLICE WB-DC 31 SYNC 52 DLY0- C LEVEL 36 34 29 33 28 31 30 35 36 32 ID 34 33 32 31 30 29 28 27 26 25 35 27 26 25 WC 24 SETUP- 23 CLP V-OUT 22 VIDEO-OUT 21 CHROMA-OUT 20 Y Vid C 40 XSP3 57 Y2-GAIN 58 GND 59 60 LPF-ADJ2 IRIS-LEVEL 21 41 XSP2 DET-CLP 20 42 XSP1 CXA1390AQ/AR LPF-ADJ1 GND 19 CXA1392Q/R DGND 19 C-IN 18 AV CC 17 C-OUT 16 CS-Y 15 CS-AGC 14 4FSC LALT B PF 5V 43 GND IRIS-CLP 18 44 FSHI IRIS-OUT 17 5V 62 V CC 63 YGAM61 LPF-ADJ3 45 F3-CLP VG-OUT 16 46 F2-CLP WND 15 CONT YH-OUT1 YH-OUT2 TP CLP4 CLP2 VAP-OUT VAP-CLP CS-CLP CS-IN R-Y GAIN B-Y GAIN B-Y OUT 47 F1-CLP 64 YH-IN PBLK 14 48 XSH2 CLP1 13 NC NC FSC-OUT BFG BF R-Y IN R-Y CLP XSH1 DC-OUT GY-OUT F1-OUT F2-OUT F3-OUT CS-CLP CS-CCD-SL CS-CCD-GC CS-OUT CS-AGC-GC CS-AGCSL YHCLP DLYH-IN DLYH-CLP DLYH-OUT DLYH-GAIN VAP-GAIN CLP4 DB-IN DR-IN GND CB-IN CG-IN XSH1 XSH2 CLP1 ID PBLK YG-IN YR-IN YB-IN YT-GC DR-OUT CT-BLK DB-OUT DY-OUT YT-BLK DY-CLP DY-IN XSP1 XSP2 WND CONTROLLER FOR TITLER YR YG YB BLK B F SYNC LALT 4fSC CR CG CB 13 14 15 16 17 18 19 V CC 20 21 22 23 24 TG SG CLP4 XSHD XSHP BFG CT-GC CLP2 HYSCONT TH-CONT COMP-IN COMPOUT CXA1393AN/AM CR-IN – 16 – 1 2 3 7 11 16 4 8 10 14 17 15 5 12 6 9 13 18 19 1 2 3 4 5 6 VAP-SLICE DV CC 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 5V 5V LPF DL LPF IHDL LPF DL 12 11 10 9 8 7 6 5 4 3 2 1 CBLK CTBLK CLP MODE 13 12 CXA1390AQ/AR CXA1390AQ/AR Package Outline CXA1390AQ Unit: mm 48PIN QFP (PLASTIC) 15.3 ± 0.4 + 0.4 12.0 – 0.1 + 0.1 0.15 – 0.05 36 25 0.15 37 24 48 13 + 0.2 0.1 – 0.1 1 + 0.15 0.3 – 0.1 12 0.8 ± 0.12 M + 0.35 2.2 – 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-48P-L04 ∗QFP048-P-1212-B LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER / PALLADIUM PLATING COPPER / 42 ALLOY 0.7g CXA1390AR 48PIN LQFP (PLASTIC) 9.0 ± 0.2 ∗ 36 37 7.0 ± 0.1 25 24 (8.0) A 48 1 0.5 ± 0.08 + 0.08 0.18 – 0.03 0.1 ± 0.1 + 0.2 1.5 – 0.1 12 13 (0.22) + 0.05 0.127 – 0.02 0.1 0° to 10° 0.5 ± 0.2 NOTE: Dimension “∗” does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE LQFP-48P-L01 ∗QFP048-P-0707-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY / PHENOL RESIN SOLDER PLATING 42 ALLOY 0.2g – 17 – 0.5 ± 0.2 0.9 ± 0.2 13.5