CXA1704R

CXA1704R 2-channel REC/PB Amplifier for 8mm VCR Description The CXA1704R is a bipolar IC designed as a recording/playback amplifier for Hi8-compatible VCRs. Features O Recording system • Feedback damping provided in the recording amplifier and its EVR control function facilitate circuit board design. • Y, chroma, and low-band level adjustment functions • Ramp circuit O Playback system • Feedback damping provided in the playback amplifier facilitates circuit board design. • Middle-frequency tuner on chip; EVR permits independent adjustment of f0, Q and boost • RF AGC and dropout detection circuit Structure Bipolar silicon monolithic IC 48 pin LQFP (Plastic) Absolute Maximum Ratings (Ta=25°C) • Supply voltage VCC 7 V • Operating temperature Topr –10 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 1100 mW (when board is mounted) Operating Conditions Supply voltage +0.5 V VCC 4.75 –0.25 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E93860A66-TE CXA1704R Block Diagram and Pin Configuration PCMOUT RFSWP MTOUT RP_PB MTG2 24 VCC1 23 22 21 20 19 18 17 16 15 14 MTG1 13 DOP MTGSW 25 REC1CONT 26 REC1OUT 27 PB1IN 28 HEAD 40dB 15dB REC V/I 1CH(0dB) 1CH(6dB) 2CH(0dB) 2CH(6dB) MUTE 1CH 2CH MUTE MTF0 MTQ VCC T3 T2 T1 12 PCMSW DOCDET 11 RFAGCIN RAMP GEN M•T –6dB 12dB 10 VIDEOSW AGCDET DOCDET 9 RFAGCTC GND1 29 RF AGC 30 8 RFAGCOUT PBDUMP1 7 YLEVEL PBDUMP2 31 YIN 6 GND2 32 PB2IN 33 HEAD 40dB 15dB LOWLEVEL 5 CIN VPSW1 VIDEO 1 PCM YGCA 1 LOWGCA 1 CGCA 4 XGAIN REC2OUT 34 REC V/I RAMP GEN 1 1 VPSW2 VIDEO PCM 2 1 LOWGCA 3 AFMIN REC2CONT 35 2 VCC2 36 CCONT 1 37 38 39 40 41 42 43 44 45 46 47 48 REC1IN GND REC2IN VPSW2OUT IR1 VREG IR VG2 VPSW1OUT PCMIN —2— PCMREC ATFIN CXA1704R Pin Description Pin No. 1 Symbol CCONT Pin voltage — 32.5k 270 Equivalent circuit Description EVR adjustment of recording chroma level. Gain is small when the applied voltage is large. 143 25k 1 67.5k 90µ 90µ 2 AFMIN — 60µ 20p 143 2 50k Recording AFM input. DC is cut off by internal capacitor. Input level is 125 mVp-p (typ.). When not used, connect this pin to Vcc. 3 XGAIN — 35µ 143 VIDEO SW gain switch. Low : 6 dB High : 0 dB 3 4 CIN 2.4 V 70µ Recording chroma input. Input the signal with capacitor coupling. Input level is 300 mVp-p (typ.). 143 4 50k —3— CXA1704R Pin No. 5 Symbol LOW LEVEL Pin voltage — 33.5k Equivalent circuit Description EVR adjustment of recording RF signal level. Gain is small when the applied voltage is large. Adjusts both the VIDEO path and the PCM path simultaneously. VIDEO path: Adjustment of C + AFM + ATF PCM path: Adjustment of ATF Recording Y signal input. Input the signal with capacitor coupling. Input level is 500 mVp-p (typ.). 270 143 21k 5 90µ 66.5k 90µ 6 YIN 2.4 V 40µ 143 6 50k 7 YLEVEL — 32.5k 270 EVR adjustment of recording Y signal level. The Y LEVEL is small when the applied voltage is large. 143 23k 7 67.5k 90µ 90µ 8 RFAGCOUT 2.8 V 40µ Playback Y signal output. Output level is 380 mVp-p (typ.). 8 600µ —4— CXA1704R Pin No. 9 Symbol RFAGCTC Pin voltage — Equivalent circuit Description RF AGC time constant. 143 9 25µ 25µ 25µ 10 RFAGCIN — 13p 143 10 50µ RF AGC input of playback Y level. The playback video signal output from Pin 14 (MTOUT) passes through an external ATF TRAP, AFM TRAP, and C TRAP, and is then input to Pin 10 (RFAGCIN) again. DC is cut off by internal capacitor. When not used, connect this pin to Vcc. Determines the dropout detection level. 11 DOCDET 2.5 V 47k 50k 143 11 50µ 12 DOP 46.5k 64k 150 H: 3.1 V L: 0 V 79k Dropout detection signal output. Goes high when a dropout is detected. 12 100k 72k —5— 2.4k CXA1704R Pin No. 13 Symbol MTG1 Pin voltage — 40k Equivalent circuit 270 Description REVR adjustment of channel 1 middle-frequency tuner boost. Boost is small when the applied voltage is large. 143 13 14k 58k 90µ 90µ 14 MTOUT 2.4 V 40µ Playback VIDEO output. Y + C + AFM + ATF is output. 14 400µ 15 MTG2 — 40k 270 143 14k 15 EVR adjustment of channel 2 middle-frequency tuner boost. Boost is small when the applied voltage is large. 58k 90µ 90µ 16 PCMOUT 2V 40µ Playback PCM output. 16 400µ 17 MTF0 — 33k 270 EVR adjustment that determines f0 of the middle-frequency tuner. f0 is large when the applied voltage is large. 17 143 41k 60k 40µ 40µ —6— CXA1704R Pin No. 18 Symbol RP_PB Pin voltage — Equivalent circuit 35µ 35µ Description REC/PB switch. High : PB Low : REC 18 143 19 VCC 4.75 V 20 T1 — 35µ 35µ Power supply for sections other than the REC amplifier and the PB amplifier. Connect to GND. 143 20 21 RFSWP — 35µ 35µ RFSWP input. 143 21 22 T2 — 35µ 35µ Connect to GND. 143 22 —7— CXA1704R Pin No. 23 Symbol T3 Pin voltage — Equivalent circuit 35µ 35µ Description Connect to GND. 143 23 24 MTQ — 30k 270 143 50k 24 EVR adjustment that determines Q of the middle-frequency tuner. Q is large when the applied voltage is large. 47k 40µ 40µ 25 26 VCC1CH REC1CONT 4.75 V — 34k 270 143 71k 26 Channel 1 power supply. EVR adjustment of recording channel 1 damping Damping is applied strongly when the applied voltage is small. 66k 40µ 40µ 27 REC1CONT — 16.5k Recording channel 1 output. Open collector. 27 5.7k 1k —8— 30 CXA1704R Pin No. 28 Symbol PB1IN Pin voltage 0.7 V Equivalent circuit Description Playback channel 1 input. 2.5k 28 29 30 GND1CH PBDUMP1 0V 2.5 V 270 40µ 30 4k 4k 40µ Channel 1 GND. The playback channel 1 damping is determined by the external resistance. Damping is applied strongly when the resistance is large. 31 PBDUMP2 2.5 V 270 40µ 4k 31 4k 4k 40µ The playback channel 2 damping is determined by the external resistance. Damping is applied strongly when the resistance is large. 32 GND2CH 0V 4k Channel 2 GND. —9— CXA1704R Pin No. 33 Symbol PB2IN Pin voltage 0.7 V Equivalent circuit Description Playback channel 2 input. 2.5k 33 34 REC2OUT — 16.5k Recording channel 2 output. Open collector. 34 5.7k 1k 35 REC2CONT — 34k 270 30 143 71k 35 EVR adjustment of recording channel 2 damping. Damping is applied strongly when the applied voltage is small. 66k 40µ 40µ 36 37 VCC2CH REC2IN 4.75 V 2.4 V 143 37 Channel 2 power supply. Channel 2 recording amplifier input. DC cut-off is applied to the Pin 38 signal by external capacitor, and then the resulting signal is input. 1.3k 1.3k 240µ 10p 50k —10— 50k CXA1704R Pin No. 38 Symbol VPSW2OUT Pin voltage 2.4 V Equivalent circuit 40µ Description Recording channel 2 VPSW output. Output level is 200 mVp-p (typ.). 38 400µ 39 VREG 4.15 V 10k 4.15 V regulator output. 39 40 REC1IN 2.4 V 5p 143 40 Channel 1 recording amplifier input. DC cut-off is applied to the Pin 41 signal by external capacitor, and then the resulting signal is input. 1.3k 1.3k 240µ 41 VPSW1OUT 2.4 V 40µ 10p 50k 50k Recording channel 1 VPSW output. Output level is 200 mVp-p (typ.). 41 400µ —11— CXA1704R Pin No. 42 43 Symbol GND IR1 Pin voltage 0V 1.9 V 42k Equivalent circuit Description GND for sections other than the REC amplifier and the PB amplifier. Determines the REC amplifier gain. Generates the reference current when 15 k Ω resistance is inserted to GND. Insert 18 k Ω resistance to GND. 20k 40k 1k 40µ 43 44 IR 1.9 V 42k Generates the reference current for the middle-frequency tuner, dropout detection circuit, and the ramp. 20k 40k 1k 40µ 44 45 VG2 2.45 V 34.5k 270 2.45 V internal reference voltage source. 20k 45 49k 75µ 46 PCMIN 2.4 V 70µ 4k Recording PCM input. Input the signal with capacitor coupling. Input level is 300 mVp-p (typ.). 143 46 50k —12— CXA1704R Pin No. 47 Symbol PCMREC Pin voltage — Equivalent circuit 35µ 35µ Description PCM recording switch. PCM recording is selected when high. 47 143 48 ATFIN 2.4 V 70µ 143 48 Recording ATF input. Input the signal with capacitor coupling. Input level is 125 mVp-p (typ.). 50k —13— Electrical Characteristics (Vcc = 4.75 V, Ta = 25°C ; Refer to the Electrical Characteristics Measurement Circuit.) Measurement conditions Input conditions Control Measurement method Min. Typ. Max. logic A Measure the current consumption for two44 63 channel recording (includes bias current). — — channel playback. — — 6 6 200 mVp-p (Vylev). 6 6 300kHz 6 500mVp-p 7MHz A 41, 38 500mVp-p 14MHz A 41, 38 200mVp-p 300kHz A 41, 38 Pin 7 YLEVEL = 1.8 V Level at 14 MHz/level at 300 kHz YLEVEL = Vylev YLEVEL = Vylev — - 53 — - 2.2 - 1.1 - 1.5 - 0.8 — 0 500mVp-p 300kHz A 41, 38 500mVp-p 300kHz A Pin 7 YLEVEL = Vcc Adjust Pin 7 YLEVEL so that the output is 41, 38 — — A Measure the pin voltage. 45 — — A Measure the pin voltage. 39 3.95 2.30 — — 4.15 2.45 4.35 2.60 - 15.8 - 14.1 -8 — V — — D Measure the current consumption for twoIvcc 24 — — A Measure the DC current. Ib1, Ib2 14.55 18.8 23.05 35 46 mA Ivcc 82 ammeter name pin or Input pin — — — Level Frequency Unit Measurement No. Item Symbol 1 Current consumption for Irec recording 2 Recording amplifier bias current Ib1,Ib2 3 Current consumption for Ipb playback 4 Vreg pin voltage — 5 Vg2 pin voltage — 6 YGCA minimum gain Gymin 7 YGCA center gain Gycen 8 YGCA maximum gain Gymax 9 YGCA frequency response ∆Y —14— 2 125mVp-p 1.7MHz A 41, 38 2 125mVp-p 1.7MHz A 41, 38 2 125mVp-p 1.7MHz A 41, 38 48 125mVp-p 100kHz A 41, 38 48 125mVp-p 100kHz A 41, 38 (center gain) 10 YGCA secondary distortion DY center gain Pin 5 LOWLEVEL = Vcc YLEVEL = Vylev Adjust Pin 5 LOWLEVEL so that the output is 12.5 mVp-p (Vylev). YLEVEL = Vylev Pin 5 LOWLEVEL = 1.8 V YLEVEL = Vylev Pin 5 LOWLEVEL = 1.8 V YLEVEL = Vylev Pin 5 LOWLEVEL = Vcc YLEVEL = Vylev — - 32.0 - 26.0 - 14.0 - 12.4 — - 14.0 - 12.4 — — - 20 — dB — - 32.0 - 26.0 11 Low-frequency GCA (VIDEO Glvmin path) minimum gain 12 Low-frequency GCA (VIDEO Glvcen path) center gain 13 Low-frequency GCA (VIDEO Glvmax 2 path) maximum gain 14 Low-frequency GCA (VIDEO Glvmax path) maximum gain 15 Low-frequency GCA (PCM Glpmin path) minimum gain CXA1704R ∗ For details on the control logic, refer to the Control Logic Truth Table. Measurement conditions Input conditions Control pin or Measurement method Min. Typ. Max. Unit ammeter name 41, 38 Pin 5 LOWLEVEL = 1.8 V YLEVEL = Vylev 4 Pin 1 CCONT = Vcc YLEVEL = Vylev, LOWLEV = Vllev 4 Adjust Pin 1 CCONT so that the output is 50 mVp-p (Vclev) YLEVEL = Vylev, LOWLEV = Vllev 4 Pin 1 CCONT = 1.8 V YLEVEL = Vylev, LOWLEV = Vllev 4 300kHz 4 300mVp-p 2MHz A 41, 38 300mVp-p 2MHz A 41, 38 Level at 2 MHz/level at 300 kHz YLEVEL = Vylev, LOWLEV = Vllev YLEVEL = Vylev, LOWLEV = Vllev — - 50 — - 0.5 0 +0.5 dB 300mVp-p 300kHz A 41, 38 - 13.3 - 11.0 — 300mVp-p 300kHz A 41, 38 — - 15.6 — 300mVp-p 300kHz A 41, 38 — - 24.0 - 21.6 - 14.0 - 12.4 — logic A Input pin 48 125mVp-p 100kHz Level Frequency Measurement No. Item Symbol 16 Low-frequency GCA (PCM Glvp path) maximum gain 17 Chroma GCA minimum gain Gcmin 18 Chroma GCA center gain Gccen 19 Chroma GCA maximum gain Gcmax 20 Chroma GCA frequency ∆C response (center gain) 21 Chroma GCA center gain DC secondary distortion 46 46 300mVp-p 300kHz B, C 41, 38 300mVp-p 300kHz B, C 41, 38 Level at 14 MHz/level at 300 kHz - 4.5 - 3.5 - 2.5 - 1.5 - 0.8 0 —15— 46 300mVp-p 7MHz B, C 41, 38 40, 37 200mVp-p 1MHz A 27, 34 40, 37 1MHz 28, 33 28, 33 28, 33 10 10 10 1.2Vp-p 50mVp-p 224mVp-p 200µVp-p 300kHz 7MHz 7MHz 7MHz 200µVp-p 300kHz 200µVp-p 300kHz D, E F, G D, E D D D 14 14 16 8 8 8 200mVp-p 10MHz A 27, 34 22 PCM main path gain Gp 23 PCM main path frequency ∆P response — - 55 — 24 PCM main path secondary DP distortion REC1CONT, REC2CONT = 3.3 V Output level (V)/51 (Ω) Level at 10 MHz/level at 1 MHz — - 0.2 — 17.7 20.0 22.3 mAp-p 25 Recording amplifier output Ir1, Ir2 current 26 Recording amplifier frequency ∆r1, ∆r2 response 27 PBMTOUT gain (XGAIN = high) Gmt1 MTG1, MTG2 = Vcc ↓ 57.5 61.0 63.5 67.0 57.5 61.0 Measure the output level. 335 305 — 380 345 420 64.5 70.5 64.5 420 — 530 mVp-p CXA1704R dB 28 PBMTOUT gain (XGAIN = low) Gmt2 29 PBPCMOUT gain Gpcm 30 RFAGC standard output Vagc1 31 Cover range high Vagc2 32 Cover range low Vagc3 Measurement conditions Input conditions Control Min. Typ. Max. Unit logic D - 15.0 - 12.0 - 9.0 Pin 10 RFAGCIN 10kHz Measurement pin or Measurement method ammeter name 12 No. Input pin Level Frequency Item Symbol 33 (diagram at right). 7MHz Dropout detection ON level Kdop-on Refer to the measurement method dB - 10.2 - 7.2 - 4.2 34 a b 224mVp-p Dropout detection OFF level D Kdop-off 12 35 VDOP-L Kdop-on = 20log Dropout pulse low level D Vdop-l 12 Pin 12 DOP VDOP-H 0 0.01 0.2 36 Dropout pulse high level D Vdop-h 12 a 224 Kdop-off = 20log b 224 2.9 3.1 3.3 V 37 Refer to the measurement method Dropout ON detection time D Tdop-on 12 50µs Pin 10 RFAGCIN — 1 — (diagram at right). —16— D 12 5kHz 7M/224mVp-p µs — 2 — 38 Dropout OFF detection time Tdop-off Pin 12 DOP Tdop-on Tdop-off CXA1704R CXA1704R Control Logic Truth Table Input conditions and operation Control logic input conditions Operation of each section for the input conditions shown at left Recording system VPSW1OUT VPSW2OUT PB 1chAmp PB2chAmp REC1OUT REC2OUT Playback system Dropout detection circuit RFAGCOUT PCMREC PCMOUT RFSWP MTOUT RP_PB XGAIN Operation Mode Pin 18 Pin 21 Pin 47 Pin 41 Pin 38 Pin 27 Pin 34 Pin 16 Pin 3 A B C D E F G L L L H H H H — L H L H L H L H H L L L L — — — H H L L V P V × × × × V V P × × × × V P V × × × × V V P × × × × × × × O O O O × × × O O O O × × × × × × × × × O O O O Pin 8 Control logic conditions Pin 14 × × × O O O O VIDEO REC PCM REC ↓ PB ↓ ↓ ↓ PB REC CH1 CH2 CH2 CH1 CH1 CH2 CH2 CH1 Explanation of input conditions: H : Control logic input voltage is 2.3 V or more. L : Control logic input voltage is 0.6 V or less. — : Don’t care. Explanation of operation symbols: O : Operates. V : VIDEO signal is selected. X : Does not operate. P : PCM signal is selected. CH1 : CH1 signal is output. CH2 : CH2 signal is output. Explanation of Measurement Methods Playback system signal input method 50Ω 49Ω 5.6µH 1Ω 0.01µF PB IN pin CXA1704 head amplifier Signal source Middle-frequency tuner measurement method As shown in the diagram at right, assume f0 = 8 MHz, Q = 2.5, and the boost = 6 dB as the center conditions. Fix two of them at their respective center condition, and apply the EVR control of the adjustment item to measure the adjustment range. Boost =6dB fo = 8MHz Q = 2.5 —17— Electrical Characteristics Measurement Circuit MTQ RP PB MTF0 PCMOUT MTG2 MTOUT RFSWP MTG1 MTG1 13 DOP 25 12 DOP DOCDET 11 RFAGCIN 51 RFAGCIN 0.01µ RFAGCTC VIDEOSW DOCDET AGCDET 29 RF AGC 30 YLEVEL 470k 4700p RFAGCOUT M•T –6dB 12dB 10 1CH 2CH MUTE 10µ MTQ RP_PB MTF0 T3 T2 RFSWP T1 VCC 0.1µ 24 23 22 21 20 19 18 17 PCMOUT 16 MTG2 15 10µ MTGSW PCMSW VCC1 REC1CONT 26 RAMP GEN REC 27 40dB 28 HEAD 15dB V/I REC1CONT Ib1 REC1OUT 51 ∗ 5.6µ PB1IN PB1IN MTOUT 14 100µ 0.1µ 10µ 49 9 0.01µ 1 1CH(0dB) 1CH(6dB) 2CH(0dB) 2CH(6dB) MUTE GND1 8 RFAGCOUT PBDUMP1 1 IR1 IR VREG REC2IN REC1IN PCMIN 0.01µ ATFIN 0.01µ 0.01µ 15k ∗ 18k ∗ VCC 4.75V 10µ PCMREC 0.01µ A IVCC GND VG2 51 VPSW2OUT 51 VPSW1OUT 10µ 0.1µ 0.1µ 51 51 REC2IN REC1IN PCMIN ATFIN ∗ VPSW2OUT VPSW1OUT PCMREC —18— 31 32 40dB HEAD 15dB 33 VPSW1 V/I 34 RAMP GEN VPSW2 35 PCM 36 VIDEO 2 1 LOWGCA 0.022µ 390 7 YIN 51 YLEVEL PBDUMP2 0.022µ 390 6 0.01µ LOWLEVEL YIN GND2 5 CIN VIDEO PCM YGCA 1 1 LOWGCA LOWLEVEL 51 1 CGCA 5.6µ PB2IN PB2IN 49 4 0.01µ XGAIN 1 1 AFMIN 51 CIN 0.01µ REC2OUT REC 51 ∗ 3 XGAIN Ib2 REC2CONT REC2CONT 2 CCONT AFMIN VCC2 10µ 1 CCONT 0.1µ 37 38 39 40 41 42 43 44 45 46 47 48 Signal output pin Signal input pin EVR adjustment pin Control logic pin Resistance accuracy: 1% 100µ CXA1704R Application Circuit EVR LOGIC REC2CONT REC1CONT RFSWP RP PB AFM TRAP PB C RF PB RF PCM OUT SIGNAL OUT RFAGCOUT ATF TRAP C TRAP RF EQ RFVCC RFSWP VCC MTF0 MTQ T3 T2 T1 RP_PB PCMOUT MTG2 0.1µ DOP 12 24 23 22 21 20 19 18 17 16 15 MTOUT 14 10µ VCC1 25 MTG1 13 100µ 100µ 10µ 0.1 µ DOP DOCDET REC1CONT RAMP GEN REC V/I M•T –6dB 12dB RFAGCTC VIDEOSW DOCDET AGCDET RFAGCOUT 470k 4700p 10 RFAGCIN 11 26 1CH 2CH MUTE CH1 HEAD REC1OUT 27 40dB HEAD 15dB PB1IN 28 MTGSW PCMSW 9 0.01µ 1CH(0dB) 1CH(6dB) 2CH(0dB) 2CH(6dB) MUTE GND1 MTQ MTF0 MTG2 MTG1 YLEVEL LOWLEVEL CCONT EVR CH2 HEAD IR1 IR VREG GND VG2 ATFIN REC2IN REC1IN PCMIN VPSW2OUT VPSW1OUT 15k 18k PCMREC 10µ 0.1µ 0.01µ 0.01µ 0.1µ 10µ —19— 8 RF AGC YLEVEL 29 PBDUMP1 30 390 0.022µ 7 YIN PBDUMP2 31 390 0.022µ 6 0.01µ HEAD 40dB CIN VPSW1 V/I REC RAMP GEN VPSW2 VIDEO PCM 2 1 LOWGCA GND2 15dB 32 5 LOWLEVEL PB2IN VIDEO PCM 1 LOWGCA 33 1 YGCA 0.01µ 1 CGCA 4 0.01µ YIN XGAIN 1 1 AFMIN CIN REC2OUT 34 3 AFMIN REC2CONT SIGNAL IN 35 2 ATFIN PCMIN CCONT VCC2 36 10µ 1 0.1µ 37 38 39 40 41 42 43 44 45 46 47 48 100µ 0.01µ 0.01µ XGAIN PCMREC RFGND LOGIC CXA1704R Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party and other right due to same. CXA1704R Description of Operation After the recording level is adjusted so that the current level of the Y, chroma, AFM, ATF, and PCM signals are suitable at the head, the VIDEO + ATF and PCM + ATF signals are created and output to the CH1 and CH2 output pins with the proper timing. The Y level adjustment is made by Pin 7 (YLEVEL), the low frequency level adjustment is made by Pin 5 (LOWLEVEL), and the chroma level adjustment is made by Pin 1 (CCONT). LOWGCA for the VIDEO path and the PCM path is also adjusted accordingly. The gain values shown in the specifications are all I/O gain values. This performs V/I conversion on the signal for which the recording level was adjusted and drives the head. Feedback damping, which is used to suppress head resonance, is performed using EVR adjustment with Pin 26 (REC1CONT) and Pin 35 (REC2CONT). Be careful to avoid capacitance coupling between the inputs and the outputs. This amplifies the playback signal from the head with low noise and high gain. Feedback damping circuit to suppress head resonance is built in; the damping can be adjusted through external resistance connected to Pin 30 (PBDUMP1) and Pin 31 (PBDUMP2). Be careful to avoid capacitance coupling between the playback system outputs and the head amplifier inputs. This compensates for the frequency response of the playback signal. EVR adjustment of the center frequency is performed with Pin 17 (MTF0); of Q with Pin 24 (MTQ), and of the CH1 and CH2 boost with Pin 13 (MTG1) and Pin 15 (MTG2), respectively. The CH1 and CH2 signals are switched according to the RFSWP timing and are output to MTOUT and PCMOUT. The gain of the MTOUT signal is switched between 0 dB and 6 dB by Pin 3 (XGAIN). This outputs the playback VIDEO signal at a fixed 380 mVp-p. The input has a built-in capacitor for DC cut-off and external capacitor is not required. The detector input includes an HPF with a cut-off frequency of approximately 1 MHz, so that the gain in the bandwidth corresponding roughly to the Y signal is detected. A dropout is detected in the playback video signal, and a dropout pulse is output. The detection level is set to the optimum level based on a 224 mVp-p input as a reference. —20— CXA1704R In order to save power consumption, this IC is designed to reduce power supplied to those circuit blocks that are not operating. Therefore, power saving operation is executed automatically when all of the power supplies are turned on. In addition, this IC is equipped with many I/O switching circuits that must be switched with very complex timing, so that internal logic is provided to control them. The combinations of input and output in basic operations are as shown in the Control Logic Truth Table. Vreg (4.15 V) and Vg2 (2.45 V) are generated as the reference voltages used in the IC. Do not use these as external power supplies because they could cause cross talk in the IC. The voltage applied to the EVR adjustment pin is Vcc- variable, ranging from 1.8 V to Vcc. —21— CXA1704R Recording Level Adjustment YGCA gain control 0 Pin 41 (VPSW1OUT) Pin 38 (VPSW2OUT) gain (dB) gain (dB) LOWGCA (Video path) gain control –10 YLEVEL=Vylev –5 –15 –10 Pin 41 (VPSW1OUT) Pin 38 (VPSW2OUT) Pin 2 (AFMIN) Pin 48 (ATFIN) → –20 Pin 6 (YIN) → –15 –25 –20 2 3 4 Pin 7 (YLEVEL) voltage (V) 5 –30 –35 2 3 4 Pin 5 (LOWLEVEL) voltage (V) 5 LOWGCA (PCM path) gain control –10 Pin 41 (VPSW1OUT) gain (dB) Pin 38 (VPSW2OUT) CGCA gain control –10 When YLEVEL=Vylev and LOWLEV=Vllev –15 gain (dB) Pin 41 (VPSW1OUT) Pin 38 (VPSW2OUT) –15 –20 –20 Pin 4 (CIN)→ –25 –25 Pin 48 (ATFIN) → –30 –30 2 3 4 Pin 1 (CCONT) voltage (V) 5 –35 2 3 4 Pin 5 (LOWLEVEL) voltage (V) 5 —22— CXA1704R Middle-frequency tuner fo control 15 6 Middle-frequency tuner Q control 5 10 fo (MHz) 4 Q 3 5 2 1 0 2 3 4 Pin 17 (MYF0) voltage (V) 5 0 2 3 4 Pin 24 (MTQ) voltage (V) 5 Middle-frequency tuner boost control 20 15 10 Boost (dB) 5 0 2 3 4 Pins 13 and 15 (MTG1, MTG2) voltage (V) 5 —23— CXA1704R Package Outline Unit : mm 48PIN LQFP (PLASTIC) 9.0 ± 0.2 ∗ 36 37 7.0 ± 0.1 25 24 (8.0) A 48 1 0.5 ± 0.08 + 0.08 0.18 – 0.03 0.1 ± 0.1 + 0.2 1.5 – 0.1 12 13 (0.22) + 0.05 0.127 – 0.02 0.1 0° to 10° 0.5 ± 0.2 NOTE: Dimension “∗” does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE LQFP-48P-L01 ∗QFP048-P-0707-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY / PHENOL RESIN SOLDER PLATING 42 ALLOY 0.2g —24— 0.5 ± 0.2