CXA1746Q

CXA1746Q Electronic Volume For the availability of this product, please contact the sales office. Description The CXA1746Q is a 2-channel electronic volume IC. A 34-bit serial data input controls the level and characteristics of the output signal. It may be used in car stereos and general audio systems. Features • Loudness • Volume control (from 0 dB to –87 dB, –∞ dB: Fine (1 dB-step) Coarse (8 dB-step) • Balance • Tone control (3-band, 2 dB-step from –15 dB to +15 dB) • Fader (2 dB-step to –20 dB, –25 dB, –35 dB, –45 dB, –60 dB, –∞ dB) • Input and gain selector (4 channels) • Serial data control (DATA, CLK, CE) • Single 8 V power supply • Zero-cross detection circuit • Timer • Power-off mute Structure Bipolar IC 48 pin QFP (Plastic) Absolute Maximum Ratings (Ta=25°C) • Supply voltage VCC 13 V • Operating temperature Topr –40 to +85 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 350 mW (Ta = 85 °C) Recommended Operating Condition • Supply voltage VCC 6 to 12 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E94812D7Y CXA1746Q Block Diagram and Pin Configuration TCMC11 TCMC12 GAIN134 LDLC1 LDHC1 TCHC1 TCLC11 TCLC12 INAO1 VRIN1 36 GAIN12 GAIN11 IN14 IN13 IN12 IN11 IN21 IN22 IN23 IN24 GAIN21 GAIN22 37 38 39 35 34 33 32 31 30 29 28 27 26 TCO1 FDIN1 25 24 FNTO REO1 CE CLK DGND GND VCC VCT DATA TIMER REO FNTO2 23 22 21 20 19 18 17 16 15 14 13 12 LOUD 8dB STEP 1dB STEP V OLUME V OLUME TONE FA DER 40 41 42 43 44 45 46 47 48 INPUT SWITCH V CTBUFF V CTBUFF V CTBUFF ZCDET LA TCH SHIFT REGISTER V CTBUFF V CTBUFF V CTBUFF V OLUME 8dB STEP LOUD V OLUME 1dB STEP TONE FA DER LA TCH CONTROL 1 GAIN234 INPUT SWITCH 2 LDLC2 3 LDHC2 4 INAO2 5 VRIN2 6 TCHC2 7 TCMC21 8 TCMC22 9 TCLC21 10 11 —2— TCLC22 FDIN2 TCO2 CXA1746Q Pin Description and Equivalent Circuit Pin No. Pin Name I/O Resistance Pin voltage Equivalent Circuit VCC Description 2 LDLC2 35 LDLC1 6.18k VCT 2 35 Sets loudness low cut-off frequency. GND VCC 3 LDHC2 34 LDHC1 8.92k VCT 3 34 Set loudness high cut-off frequency GND VCC 4 INAO2 33 INAO1 — VCT 4 33 Input selector output GND VCC 5 VRIN2 32 VRIN1 10k VCT 5 32 Volume input GND VCC 6 TCHC2 31 TCHC1 5k VCT 6 31 Set tone Treble frequency GND —3— CXA1746Q Pin No. Pin Name I/O Resistance Pin voltage Equivalent Circuit VCC Description 7 TCMC21 30 TCMC11 4k VCT 7 30 Sets tone Mid frequency GND VCC 8 TCMC22 29 TCMC12 4k VCT 8 29 Sets tone Mid frequency GND VCC 9 TCLC21 28 TCLC11 8k VCT 9 28 Sets tone Bass frequency GND VCC 10 TCLC22 27 TCLC12 8k VCT 10 27 Sets tone Bass frequency GND VCC 11 TCO2 26 TCO1 — VCT 11 26 Tone control output GND —4— CXA1746Q Pin No. Pin Name I/O Resistance Pin voltage Equivalent Circuit VCC Description 12 FDIN2 25 FDIN1 24k VCT 12 25 Fader input GND VCC 13 REO2 24 REO1 — VCT 13 24 Rear output GND VCC 14 FNT02 23 FNT01 — VCT 14 23 Front output GND VCC 15 TIMER ~∞ — 15 Sets timer constant GND VCC 16 DATA ~∞ — 16 Serial data input GND —5— CXA1746Q Pin No. Pin Name I/O Resistance Pin voltage — VCT — VCC — Gnd — — Equivalent Circuit 1/2 VCC Description 17 VCT 18 VCC 19 GND 20 DGND Power supply input Ground Digital ground VCC 21 CLK ~∞ — 21 Serial clock input GND VCC 22 CE ~∞ — 22 Latch enable input GND VCC 1 36 37 38 47 49 GAIN234 GAIN134 GAIN12 GAIN11 GAIN21 GAIN22 1 36 ~∞ VCT 37 38 47 48 GND External gain setting for input amplifier 39 40 41 42 43 44 45 46 IN14 IN13 IN12 IN11 IN21 IN22 IN23 IN24 VCC 39 40 42 44 46 GND 50k VCT 41 43 45 Signal input —6— CXA1746Q Data Format First Bit D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 NOP NOP ISW LOUD VRC1 VRF1 VRC2 VRF2 TONE BASS TONE MID TONE TREBLE FADER Last Bit FADER SELECT —7— CXA1746Q ISW MODE IN14/IN24, GAIN134/GAIN234 IN13/IN23, GAIN134/GAIN234 IN12/IN22, GAIN12/GAIN22 IN11/IN21, GAIN11/GAIN21 D3 1 1 0 0 D4 1 0 1 0 LOUD MODE ON OFF D5 1 0 VRC1/VRC2 OUTPUT (dB) 0 –8 –16 –24 –32 –40 –48 –56 –64 –72 –80 –∞ –∞ D6/D13 1 1 1 1 1 1 1 1 0 0 0 0 0 D7/D14 1 1 1 1 0 0 0 0 1 1 1 1 0 D8/D15 1 1 0 0 1 1 0 0 1 1 0 0 0 D9/D16 1 0 1 0 1 0 1 0 1 0 1 0 0 —8— CXA1746Q VRF1/VRF2 OUTPUT (dB) 0 –1 –2 –3 –4 –5 –6 –7 D10/D17 1 1 1 1 0 0 0 0 D11/D18 1 1 0 0 1 1 0 0 D12/D19 1 0 1 0 1 0 1 0 BASS/MID/TREBLE OUTPUT (dB) 15 12 10 8 6 4 2 0 D20/D24/D28 1 1 1 1 0 0 0 0 D21/D25/D29 1 1 0 0 1 1 0 0 D22/D26/D30 1 0 1 0 1 0 1 0 BOOST/CUT MODE BOOST CUT D23/D27/D31 1 0 —9— CXA1746Q FADER OUTPUT (dB) –∞ –60 –45 –35 –25 –20 –18 –16 –14 –12 –10 –8 –6 –4 –2 0 D32 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D33 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D34 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D35 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 FADER SELECT MODE FRONT REAR D36 1 0 RESET Reset is performed automatically when power is first supplied to the IC; there is no reset pin. The following table shows the respective statuses of various settings after a reset has been performed. However, from the time when power is first supplied until the first data transfer, keep CE high by pulling it up to VCC, etc. MODE INPUT VRC1 VRF1 VRC2 VRF2 LOUD TONE BASS TONE MID TONE TREBLE FADER SET VALUE 1 – ∞dB –7 dB – ∞dB –7 dB OFF 0 dB 0 dB 0 dB 0 dB, REAR —10— CXA1746Q Timing Chart CE DATA D1 D2 D34 D35 D36 Invalid CLK t1 t1≥0.5µs t2≥0.5µs tck≥1.0µs tsu≥0.5µs th≥0.5µs tck tsu th t2 tL tL≥tT +0.5µs (tT is the maximum value for the timer operation time) CE tce tce≥4.0µs Timer Waiting Period Setting Chart (VCC = 6 to 12V, operating temperature = –40°C to 85°C) TIMER pin capacitance C C = 100pF C = 0.001µF C = 0.01µF C = 0.1µF C = 1µF C = 10µF Waiting period Min. Typ. Max. 3µs 5µs 9µs 30µs 50µs 90µs 300µs 500µs 900µs 3ms 5ms 9ms 30ms 50ms 90ms 300ms 500ms 900ms —11— CXA1746Q Electrical Characteristics VCC=8 V, Ta=25°C, Input=0 dB unless otherwise specified Item Current consumption Total Harmonic distortion Output noise voltage Max output voltage Separation Max. attenuation factor Loudness LOW Loudness HIGH Bass max. boost gain Bass max. cut gain Mid max. boost gain Mid max. cut gain Treble max. boost gain Treble max. cut gain Input voltage HIGH Input voltage LOW Input voltage range Symbol ICC THD Vn Vom CS ATTm Glb Glh Gbb Gbc Gmb Gmc Gtb Gtc Vsh Vsl Vin Conditions No signal 1 kHz, 5 dBm output Short-circuit at input, A weight 1 kHz 1 kHz 100 Hz, VRC=–16 dB 10 kHz, VRC=–16dB Min. — — — 8 72 85 7 7 13 13 13 13 13 13 3 0 1 Typ. 21 0.003 8 — 90 90 8 8 15 15 15 15 15 15 — — — Max. 23 0.01 10 — — — 9 9 17 17 17 17 17 17 6 1.5 VCC-1 Unit mV % µVrms dBm dB DATA, CLK, CE DATA, CLK, CE IN11 to 14 IN21 to 24 VRIN1, 2 FDIN1, 2 V —12— Electrical Characteristic Test Circuit C15 S2 0.022µ 10µ A C8 0.0027µ C10 0.033µ C12 10k C2 0.047µ R2 10k R4 10k R5 C4 0.0022µ 36 35 34 33 32 31 30 29 28 27 26 25 S5_A 10µ C18 A 10µ S1 B B C14 0.39µ C6 V4 AC OPAMP R18 1k R20 1k C21 TCO1 LDHC1 TCHC1 GAIN134 TCMC11 TCMC12 TCLC11 TCLC12 GAIN12 LDLC1 INAO1 VRIN1 FDIN1 37 R15 R15 R17 10k 10k 10k R19 38 GAIN11 1k AC AC V14 V2 A B S13 39 IN14 V3 B S14 -60dBm V5 220p 5V 0V CE 5V 0V CLK AC V13 A B S12 DGND GND VCC VCT DATA TIMER REO2 18 17 16 15 14 S4 19 20 40 IN13 FNTO1 R13 24 10k R12 REO1 23 10k R11 CE 22 1k R10 CLK 21 1k 41 IN12 AC V12 A B S11 AC V11 C19 100µ A B S21 43 IN21 AC V21 44 IN22 VEE 3-6V A B S22 VCC 3-6V AC V22 A B S23 45 IN23 AC V23 A B S24 1k 0.01µ B S3 A R8 10k R7 C20 R14 10k 13 AC V24 A 46 IN24 47 GAIN21 GAIN22 1 2 3 4 10µ 5 6 GAIN234 LDLC2 LDHC2 INAO2 VRIN2 TCHC2 TCMC21 TCMC22 TCLC21 TCLC22 TCO2 FDIN2 48 7 10k FNTO2 8 9 10µ 10 11 10µ 10k R5 10k 10k C1 0.047µ C3 R1 R3 0.0022µ 0.022µ C7 0.0027µ C9 0.033µ C11 C5 C13 C17 C15 0.39µ AB AC CXA1746Q V6 S5_B 12 V1 —13— 42 IN11 R9 DATA 5V 0V Application Circuit C15 0.39µ C18 10µ 27 26 25 C6 R5 10k C2 0.047µ C4 0.0022µ 10µ C14 10µ 28 R2 10k R4 10k 36 35 34 33 32 TCO1 LDHC1 TCHC1 GAIN134 TCMC11 TCMC12 TCLC11 TCLC12 GAIN12 REO1 CE CLK DGND GND VCC 18 17 R9 16 15 REO2 R8 14 10k R7 1k 0.01µ TIMER C20 VCT DATA 19 20 LDLC1 INAO1 VRIN1 FDIN1 37 C8 0.0027µ C10 0.033µ C12 31 30 29 0.022µ 38 GAIN11 OUTPUT SIGNAL 39 IN14 40 IN13 FNTO1 R13 24 10k R12 23 10k R11 22 1k R10 21 1k TO CPU 41 IN12 42 IN11 44 IN22 45 IN23 46 IN24 47 GAIN21 GAIN22 1 2 3 4 10µ 5 6 7 8 GAIN234 LDLC2 LDHC2 INAO2 VRIN2 TCHC2 TCMC21 TCMC22 TCLC21 TCLC22 TCO2 FDIN2 48 13 FNTO2 9 10µ 10 11 10µ 12 10k 10k R5 10k 10k C1 0.047µ C3 R1 R3 0.0022µ C7 0.0027µ C9 0.033µ C11 0.022µ C5 C13 C17 C15 CXA1746Q Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. 0.39µ C21 10µ —14— C19 INPUT SIGNAL SOURCES 43 IN21 33µ TO POWER SUPPLY CXA1746Q Description of Operation (1) Gain of input amplifier The input selector stage may be configured as a buffer or a non-inverting amplifier. Gain=1+R2/R1 R1 R2 VCT 39 IN14 40 IN13 41 IN12 42 IN11 36 GAIN134 37 GAIN12 38 GAIN11 CXA1746Q Input amp of channel 1 33 INA01 (2) Loud The loudness function achieves the necessary frequency characteristics by using a filter as shown below. The resistors are built in so that fL and fH can be set by selecting C1 and C2. fL=1/(2πC1R1) fH=1/(2πC2R2) 3 LDHC1 4 LDHC2 R2=8.92k C2 32 VRIN1 5 VRIN2 20k 25.7k R1=6.18k CXA1746Q VCT 3 LDLC1 C1 5 LDLC2 VCT fL fH —15— CXA1746Q (3) Tone control BASS: LPF fL=1/(2πC1R1//R2) R1=8k 8k R2=8k CXA1746Q 8k VCT 27 TCLC12 18 TCLC22 VCT VCT fL C1 MID: BPF fL=1/(2πC2R3) fH=1/(2πC3R4) HPF LPF R3=4k 4k 16k VCT 16k fM fH fL 4k R4=8k CXA1746Q 29 TCMC12 8 TCMC22 C2 38 TCMC11 7 TCMC21 C3 VCT VCT TREBLE: HPF fH=1/(2πC4R5) 10k 10k VCT fH 10k R5=5k CXA1746Q 3 TCHC11 1 TCHC21 10k C4 VCT —16— CXA1746Q (4) Zero-cross detector and Timer A built-in zero-cross detection circuit is used to detect the zero-cross points of the input signal. When data arrived at the IC, they are executed at the next zero-cross point or when there is no input signal. This is to minimize 'click' noise during the transition of levels. The timer circuit is added to ensure that the data is executed even when a zero-cross point is not detected after a pre-determined period of time from the falling edge of the CE pulse. Time constant=(0.5/10µ)×C [sec] VCC 10µA 0.5V CE 15 CXA1746Q TIMER C (5) VCT pin The internal circuit of VCT pin has the following structure. Insert a buffer when using it as a reference voltage for an external circuit. VCC 100k VCT 17 100k CXA1746Q GND (6) Power-off Mute This function mutes the output pins FNTO1, FNTO2, REO1 and REO2, when the VCC goes below 5V, by turning off the bias of the output stage of the fader circuit. By so doing, the 'pop' noise caused by the drop in these pins potential from VCC/2 during power-off can be avoided. —17— CXA1746Q Examole if Reoresentative Characteristics Tone Control Frequency Characteristics 20 10 15 dB VOLTAGE (dB) BASS 0 MID TREBLE –10 –15 dB –20 1 10 100 1k 10k 100k FREQUENCY (Hz) Loudness Frequency Characteristics 20 10 VOLTAGE (dB) 0 VRC=0 dB VRC=–8 dB –10 VRC=–16 dB VRC=–24 dB –20 –30 1 10 100 1k 10k 100k FREQUENCY (Hz) —18— CXA1746Q Package Outline Unit : mm 48PIN QFP (PLASTIC) 15.3 ± 0.4 + 0.4 12.0 – 0.1 + 0.1 0.15 – 0.05 0.15 36 25 37 24 48 13 + 0.2 0.1 – 0.1 1 + 0.15 0.3 – 0.1 12 0.8 0.24 M + 0.35 2.2 – 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-48P-L04 QFP048-P-1212 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER / PALLADIUM PLATING 42/COPPER ALLOY 0.7g —19— 0.9 ± 0.2 13.5