CXA1870

CXA1870S Color TV Y/C/Jungle For the availability of this product, please contact the sales office. Description The CXA1870S is a bipolar IC which integrates the NTSC color TV luminance signal processing, chroma signal processing, sync signal processing, and RGB signal processing onto a single chip. Features • I2C bus compatible. Various types of adjustments and user controls performed with two bus lines SCL and SDA. • H and V oscillation frequencies made nonadjusting with a countdown system. • Non-adjusting Y system filters (chroma trap, delay line) • Built-in V picture distortion correction circuit • Built-in delay line aperture compensation • Auto cut-off function for automatic CRT cut-off adjustment and compensation for changes with time • Multiple inputs Composite video: 2 systems (Built-in 2-input, 1-output video switch) Y/C separation input: 1 system On screen display input: 1 system Applications • Color TV Structure Bipolar silicon monolithic IC 42 pin SDIP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VCC 12 V • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 1.73 W Recommended Operating Conditions Supply voltage VCC 9±0.5 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E95431-TE Block Diagram ABL LPF J GND AFC H S/S OUT V SYNC V BIAS V HOLD XRAY ABL IN V PLS VOSC REG SCL HD VD HP 34 32 41 33 31 30 29 H SYNC CERA V LPF IREF I2C BUS DECODER PHASE DET. 1/32 H.DRIVE 2fH V.SYNC SEP PHASE SHIFT V COUNT DOWN HV COMP V COMPENSATION VOSC ABL SDA 38 37 35 40 36 39 5 27 ABL V ZOOMING 28 26 42 25 23 24 REGU LATOR XRAY V OFF 32fH VCO PHASE DET IREF H.SYNC SEP XRAY VEX C MODE 6 AFC HLOCK H PHASE SUB BRIGHT BRIGHT V LIN V SIZE V SHIFT S CORR IN SW SW GAIN SW OUT V1 IN 4 BLACK PICTURE DC TRAN SHARPNESS 0/6DB AMP PMUTE B OFF G OFF R OFF DY COL B DRIVE GAMMA PRE OVER G DRIVE RGB LIM V2 IN OSD NR BLUE 22 TRAP SW SUB CONT 16 RGB SW PIC OSD DYNAMIC TURE MIX COLOR GAMMA BRIGHT DRIVE LIMIT DC SHIFT REF BLK G CUTOFF 18 20 Y IN ROUT GOUT BOUT —2— SUB HUE OSD BLK AXIS CHROMA DET. AXIS PHASE DET. HUE HUE LPF 3.58M VCO PHASE SHIFT 7 BUS CONT TRAP AUTO Y/C MIX YM DELAY SHARP NR CLAMP PEDESTAL CLAMP NESS DELAY SUB COLOR B CUTOFF AKB TIMING AKB ACC DET. TOT SW COLOR C IN 9 ACC TOT IK COLOR COLOR KILLER CLAMP VCC 3 KILLER 2 X'TAL A PED APC 1 8 10 11 12 13 14 21 15 17 19 IK R S/H OSD BLK B S/H G S/H V GND OSD R OSD B OSD G CXA1870S CXA1870S Pin Configuration X'TAL 1 2 3 4 5 6 7 8 9 42 V BIAS APC 41 V SYNC VCC 40 H SYNC V1 IN 39 H S/S OUT V HOLD 38 SDA SW OUT 37 SCL Y IN 36 REG A PED 35 IREF C IN 34 AFC V GND 10 33 CERA OSD BLK 11 32 J GND OSD R 12 31 HP OSD G 13 30 XRAY OSD B 14 29 HD R S/H 15 28 V PLS R OUT 16 27 V LPF G S/H 17 26 V OSC G OUT 18 25 ABL LPF B S/H 19 24 VD B OUT 20 23 ABL IN IK 21 22 V2 IN —3— CXA1870S Pin Description Pin No. Symbol Pin voltage Equivalent circuit Description VCC 4k 1 X'TAL 2.6 V 1 500 Connect a 3.58 MHz crystal oscillator. VCC VCC 1.2k 2 2 APC 5V 1.2k 25k APC lag-lead filter CR connection pin. 3 VCC 9V VCC Power supply pin. 4 4 22 V1 IN V2 IN 150 2V 22 Video switch input pins. Sync tip clamping is performed, so input via capacitors. 55k VCC 5 V HOLD 0.7 V 150 1k 50k Peak hold pin for V sync separation. Connect a capacitor. 5 —4— CXA1870S Pin No. Symbol Pin voltage Equivalent circuit Description VCC VCC 500 VCC 6 SW OUT — 6 2k 30k 12k Video switch output pin. 25k VCC VCC 1.2k 50k 7 Y IN 3.5 V 7 Y signal input pin. Input via a capacitor. Standard input level: 2 Vp-p VCC VCC VCC VCC 16k 20k 1.2k 20k 8 A PED 3.5 V 8 Auto pedestal (black elongation) black peak hold pin. Connect a capacitor. VCC 30k 9 C IN — 9 6k 30k 6k Chroma signal input pin. Standard input level (burst level): 570 mVp-p 10 V GND — Video system (Y/C/RGB) GND pin. —5— CXA1870S Pin No. Symbol Pin voltage VCC Equivalent circuit VCC Description 40k 11 60k 60k 60k 30k 2k 15k 2k 11 OSD BLK — 30k 30k 2k 2k VCC Blanking signal input pin for OSD RGB input. 0 to 1 V: Blanking not performed. 2 to 3 V: Signal from Y IN/C IN lowered by –6 dB. 4 to 6 V: R, G and B outputs become lower than black level. VCC 12 12 13 14 OSD R OSD G OSD B 13 — 14 Digital R, G and B signal input pins for on screen display. 0 to 1 V: No OSD display. 2 to 3 V: OSD level = 46 IRE (33 IRE) 4 to 6 V: OSD level = 92 IRE (65 IRE) Figures in parentheses are for when the I2C OSD register is set to 0. VCC 15 15 17 19 R S/H G S/H B S/H 17 — 1.2k 19 Sample-and-hold pins for R, G and B AKB (Auto Kinetic Bias). Connect to GND via capacitors. VCC 150 VCC VCC 16 18 20 R OUT G OUT B OUT — 16 5k 18 20 R, G and B output pins. —6— CXA1870S Pin No. Symbol Pin voltage Equivalent circuit VCC VCC Description 21 IK — 21 150 Inputs the signal obtained by converting the CRT beam current (Ik) into voltage. Connect to an emitter follower via a capacitor. VCC 10k 30k 23 ABL IN — 150 23 ABL voltage input pin. VCC 3k VCC VCC 3k 24 VD — 24 15k 24k 5k Vertical deflection sawtooth wave output pin. VCC VCC 24k 25 VCC 25 ABL LPF — 100k ABL signal LPF pin. Connect a capacitor. VCC VCC VCC 100 26 V OSC — 26 100 Connect a capacitor to generate the V sawtooth wave. —7— CXA1870S Pin No. Symbol Pin voltage Equivalent circuit VCC Description VCC 27 V LPF 5V 27 Connect a capacitor to hold the AGC voltage which maintains the V sawtooth wave at a constant amplitude. VCC VCC 74k 28 V PLS — 28 18k V pulse output pin. A negative polarity pulse 3 to 3.5 H width is output from this pin. High level: 4.5 V Low level: 0 V VCC 29 29 HD — 20k 20k H drive output pin. This pin is output at the open collector. VCC VCC VCC 19k VCC 63k 30 30 XRAY — 30k 40k 30k 27k X-ray protection circuit input pin. When a pulse with a width of 7 V or more is input, HD output becomes low and R, G and B outputs are blanked. This status is maintained until the power supply is turned off. Vilmax = 2.4 V Vihmin = 3.0 V VCC VCC 31 HP 3.3 V (at no signal) VCC 10k 31 60k H pulse input pin. Inputs a 3 to 5 Vp-p signal via a capacitor. 32 J GND — —8— Jungle system (H/V) GND pin. CXA1870S Pin No. Symbol Pin voltage Equivalent circuit VCC VCC VCC 10k 28k 330 33 Description 33 CERA 2.3 V Connect a 32 fh (503.5 kHz) ceramic oscillator. VCC VCC 40k 34 1.2k VCC 34 AFC 3.2 V AFC lag-lead filter CR connection pin. VCC 35 IREF 2.6 V 35 150 20k Connect a 15 kΩ resistor between this pin and GND. VCC VCC VCC VCC 4p VCC 40k 36 36 REG 7V 1.2k Regulator pin for voltage generated internally from VCC. Connect a capacitor for stabilization. 50µA VCC 37 38 SCL SDA 37 — 4k 38 4k I2C bus SCL (Serial Clock) and SDA (Serial Data) pins. Vilmax = 1.5 V Vihmin = 3 V Volmax = 0.4 V —9— CXA1870S Pin No. Symbol Pin voltage Equivalent circuit Description VCC VCC 1.2k 39 H S/S OUT — 39 23k H sync separation pulse output. A positive polarity pulse is output from this pin. High level: 4.6 V Low level: 0 V VCC 14k 24k 150 40 H SYNC 2.6 V 40 10µA 20k H sync separation input pin. Inputs a 2 Vp-p video signal via a capacitor and resistor. VCC 10k 26k 150 41 31k 10k 20µA 20k 41 V SYNC 3.4 V V sync separation input pin. Inputs a 2 Vp-p video signal via a capacitor and resistor. VCC 4k VCC 42 V BIAS 3.8 V 30k 42 20k The V oscillator reference voltage is output from this pin. —10— CXA1870S Electrical Characteristics Setting conditions • Ta = 25 °C VCC = 9 V • I2C bus register should be set to “I2C Bus Register Initial Settings”. No. 1 Item Current consumption 1 Symbol ICC1 Measurement conditions Measurement pin 3 Measurement method Measure the VCC pin inflow current. Min. Typ. Max. Unit 53 80 110 mA H system items No. Item Symbol Hfree ∆H Video In: Sig-H2,H3 AFC: 0 Video In: Sig-H6 4 AFC gain 1 AFCmax AFC: 0 Video In: Sig-H7 AFC: 0 Video In: Sig-H6 5 AFC gain 2 AFCcen AFC: 1 Video In: Sig-H7 AFC: 1 Video In: Sig-H6 6 AFC gain 3 AFCmin AFC: 2 Video In: Sig-H7 AFC: 2 7 8 9 10 11 12 13 HD output pulse width HD output high level HD output low level Horizontal phase operating range 1 Horizontal phase operating range 2 Horizontal phase operating range 3 HP blanking delay time 1 HP blanking delay time 2 HSS OUT high level HSS OUT low level protection circuit VHT HD, W HD, H HD, L HPHmax HPHcen HPHmin HPBLK1 Video In: Sig-Y11 HPBLK2 20 31 Pin 31 HPBLK1 HPBLK2 — 100 — ns Video In: Sig-H1 Video In: Sig-H1 Video In: Sig-H1 Video In: Sig-Y11 HPHASE: F Video In: Sig-Y11 HPHASE: 7 Video In: Sig-Y11 HPHASE: 0 Pin 20 HPH 20 31 Pin 31 Pin 20 29 24 8.7 HD,W 0.5 26 9 0.8 28 — 1.1 µs V V µs µs µs ns 31 AFCmin=t1-t2 0.75 1.2 1.75 µs 31 t2: Video In: Time from fall of Sig-H7 to rise of Pin 31. AFCcen=t1-t2 — 0.5 — µs 31 Measurement conditions Measurement pin 29 Check that I2C register HLOCK is 1. t1: Video In: Time from fall of Sig-H6 to rise of Pin 31. AFCmax=t1-t2 0.12 0.3 0.48 µs Measurement method Min. Typ. Max. Unit 15.60 15.78 15.96 kHz –400 — 400 µs 2 Horizontal free running frequency 3 Horizontal sync pull-in range HD,H HD,L –4.3 –3.3 –2.3 –1.5 –0.5 1.3 — 2.3 100 0.5 3.3 — 14 15 16 HSS, H 39 HSS, L XVTH 30 HSS,H HSS,L 4 0 2.4 4.6 0.1 2.6 5 0.5 2.8 V V V 17 Overvoltage Check that HD appears at 2.4 V and disappears at 2.8 V. —11— CXA1870S V system items No. 18 VBias 19 V PLS high level 20 V PLS low level 21 22 23 24 25 VD output center voltage V SHIFT variable range 1 V SHIFT variable range 2 V SIZE variable range 1 V SIZE variable range 2 S CORR variable range 1 S CORR variable range 2 V LIN variable range 1 V LIN variable range 2 ∆ La V LIN: F ∆ Lc HV COMP: 0, Pin 23: 6 V 30 V zooming 1 ∆VZ1 31 V zooming 2 ∆VZ2 HV COMP: 7, Pin 23: 6 V HV COMP: 0, Pin 23: 0 V HV COMP: 7, Pin 23: 0 V 16.57ms 8.75ms Vc-Vlc Vsmin= Vc-Va Vsmax= Vc-Va Vsmin(Vc-Va) Vsmax(Vc-Va) 60 80 100 mV 0 3 15 mV 60 90 110 mV ∆ Sa S CORR: F Video ∆ Sc V LIN: 0 In: Sig-V1 28 24 VTRIG GND Va Vc-Vsc Vla=Va Vlc=Vc 0.1ms Va-Vla 90 120 140 mV –55 –35 –15 mV Item Symbol V Bias VPLS, H Video In: Sig-V1 VPLS, L VDcen V SHIFT: F VSHIFT– V SHIFT: 0 VSHIFT+ V SHIFT: 1F VSIZE– V SIZE: 0 Vc Pin 24 VSIZE+ V SIZE: 3F S CORR: 0 Vc-Va Vsa=Va Vb Vsc=Vc Va-Vsa 45 65 85 mV 1.5 1.65 1.8 V 28 VPLS, L Vb Vb-VDcen Vb-VDcen Vc-Va Measurement conditions Measurement pin 42 Measurement method Measure the pin voltage. 4 0 2.75 Min. Typ. Max. Unit 3.8 4.5 0.1 2.9 5 0.5 3.05 V V V V VPLS, H –140 –125 –115 mV 110 0.9 120 1.1 140 1.2 mV V 26 27 29 —12— CXA1870S Y system items No. Item Symbol VR Measurement conditions Video In: Sig-Y1 16 Video In: Sig-Y1 Vsc2 Measurement pin Measurement method Min. Typ. Max. Unit — 20log 20log Vsc1 VR Vsc2 VR Vtr2 Vtr1 2.2 –3.8 2.5 2.7 –33 — 3.2 –2.8 V dB dB 32 R output level 33 34 Sub-contrast variable range 1 Sub-contrast variable range 2 VR Vsc1 Gsc, max SUBCONT: F Gsc, min SUBCONT: 0 TRAP SW: 0 Vtr1 Video In: Sig-Y2 16 Vtr2 20log — –30 –20 dB 35 Trap attenuation ATTtrap TRAP SW: 1 36 37 38 Sharpness characteristics 1 Sharpness characteristics 2 Sharpness characteristics 3 RGB output Gsh, max Gsh, cen Gsh, min SHARP NESS: F SHARP NESS: 7 SHARP NESS: 0 Video In: Sig-Y4 16 Video In: Sig-Y5 16 18 20 Vdpp Vs1 (Sig-Y4) 20log Vs2 (Sig-Y5) Vf1 (Sig-Y4) Vf2 (Sig-Y6) Vs2 Vs1 5.5 1.5 7.0 2.5 8.5 4.5 dB dB dB –7.5 –5.5 –4.5 39 frequency response Gfreq Video In: Sig- Y4, Y6 Video In: Sig-Y3 20log Vf2 Vf1 –6 –3.5 0 dB 40 DC transmission rate 1 Gdt1 DC TRAN: 0 Video In: Sig-Y1 Video In: Sig-H1 Video In: Sig-Y3 16 Vdpp Vdb Vdw Vdw-Vdb Vdpp 96 99 100 % 41 DC transmission rate 2 Gdt2 DC TRAN: 7 Video In: Sig-Y1 Video In: Sig-H1 Vdb Vdw Vdw-Vdb Vdpp 73 78 85 % 42 Auto pedestal operation 1 Pin 8: 3 V Vdp1 Pin 8: 5 V Pin 8: 3 V Vdp2 Pin 8: OPEN NR: 1 Video In: Sig-H1 Voff 16 Von Voff-Von 280 340 400 mV 43 Auto pedestal operation 2 Video In: Sig-Y10 Voff 16 Von Voff-Von 120 170 220 mV 44 NR operation Gnr NR: 0 Video In: Sig-Y7 Von 16 Voff Vin (Pins 4 and 22) Vout (Pin 6) 20log 20log Von Voff –5.5 –4 –2.5 dB 45 SW gain 1 46 SW gain 2 Gsw1 Gsw2 SW GAIN: 1 SW GAIN: 0 Video In: Sig-Y1 4, 22 6 Vout Vin 5.5 –0.5 6 0 6.5 0.5 dB dB —13— CXA1870S C system items No. 47 Item APC pull-in range 1 Symbol ∆ f, apc1 Measurement conditions Video-In: Sig-H1 C In: Sig-C1, C2 Video-In: Sig-H1 48 Carrier leak Vcl COLOR: 3F SUBCOLOR: F Video-In: Sig-H1 49 Residual carrier level Vrcl C In: Sig-C3 COLOR: 3F SUBCOLOR: F 50 Color output level Vco, cen 51 52 53 54 55 56 57 58 59 Color variable range 1 Color variable range 2 Sub-color variable range 1 Sub-color variable range 2 Hue variable range 1 Hue variable range 2 Hue variable range 3 Sub-hue variable range 1 Sub-hue variable range 2 Gco, max Vco COLOR: 3F Video In C In :Sig-C5 20 f=100kHz Vco1 20log Vco2 20log Vsc1 20log Vsc2 During Sig-C3 Vco0 20log Vrcl Vcl 20 3.58 MHz component and 7.16 MHz component Vco1 Vco0 Vco2 Vco0 Vsc1 Vco0 Vsc2 Vco0 –5.4 –3.7 –2.0 –10 –56 20 –24 7 90° + tan–1 270° – tan–1 Vx Vx 90° + tan–1 ∆V1 ∆V2 18 Vg1 Vg2 66 67 Detective output ratio R2 Detective output ratio G2 Gr2 AXIS: 1 Gg2 Video In :Sig-H1, C In : Sig-C5 18 f=100kHz 16 Vx Vx Vrg Vgg Vx VBW VBW GcomaxVRW GcomaxVGW 0.7 0.26 0.8 0.3 0.9 0.34 — — Vr2 270° – tan–1 Vg2 Vg1 245 252 259 deg Vr2 Vr1 105 112 119 deg Vg2 Vg1 VBW VBW 0.7 0.26 0.8 0.3 0.9 0.34 — — 233 240 247 deg Vr2 Vr1 89 96 103 deg 0 –46 30 –18 13 10 –36 40 –12 19 dB deg deg deg deg deg 2.1 2.7 3.3 dB — –50 –40 dB — — 200 mV f=3.58MHz — — 50 mV Measurement pin 20 Measurement method Check that the burst frequency is changed to 3579545 ±400 Hz and pulled in. Min. Typ. Max. Unit –400 — 400 Hz 0.6 5.4 0.9 6.0 1.2 6.6 V dB Gco, min COLOR: 0 : Sig-H1, Gsc, max Gcs, min ø cen ø max ø min HUE: 3F HUE: 0 SUB COLOR :F SUB COLOR :0 Video In: Sig-H1, C In : Sig-C3, -C4 20 Vc1 Vc2 Vc1-Vc2 Vc4-Vc3 During Sig-C4 tan–1 ø s, max SUB HUE: F ø s, min SUB HUE:0 Vc3 Vc4 Vr1 60 Video In Detective axis R1 ø r1 AXIS: 0 : Sig-H1, C In : Sig-C4 ø g1 Gr1 AXIS: 0 Gg1 -C3 Video In :Sig-H1, C In : Sig-C5 Video In :Sig-H1, AXIS: 1 C In : Sig-C4, ø g2 -C3 18 16 18 Vx 16 ∆V1 ∆V2 Vg1 Vg2 Vr2 61 Detective axis G1 62 63 Detective output ratio R1 Detective output ratio G1 Vrg Vgg Vr1 GcomaxVRW GcomaxVGW f=100kHz 64 Detective axis R2 ø r2 16 65 Detective axis G2 —14— CXA1870S No. 68 69 ACC Item Symbol Gacc1 Gacc2 Measurement conditions Video In: Sig-H1 C In: Sig-C6 C In: Sig-C7 Video In: Sig-H1 C In:Sig-C8, -C9 C In: TOT SW: 1 Sig-C5 -C11 VIdeo-In: Measurement pin Measurement method Vac1 20log 20log Vacl Vco0 Vac2 Vco0 Min. Typ. Max. Unit –1.0 –3 0.1 –1 1.0 0 dB dB characteristics 1 ACC characteristics 2 20 f=100kHz Vac2 70 Killer point Chroma 71 frequency response 1-1 Chroma 72 frequency response 1-2 Chroma 73 frequency response 2-1 Chroma 74 frequency response 2-2 KP 20 Check that output disappears at -38 dB –38 and appears at -30 dB. –34 –30 dB Gcf1– — 20log Vx Vref Vx 20 — –3 — dB Gcf1+ Sig-H1 C In: Sig-C10 C In: –1 — dB Gcf2– TOT SW: 0 Sig-C5 -C11 VIdeo-In: Vref= Vx (Sig-C5) C In: Sig-C10 –2.3 — 0.2 dB Gcf2+ Sig-H1 –2.7 — 0.2 dB RGB system items No. Item Symbol Measurement conditions Measurement pin 16, 18 75 Drive variable range 1 Drive variable range 2 Picture variable range Dynamic color operation R Dynamic color operation B Gamma 80 characteristics 1 (50 IRE) Gamma 81 characteristics 2 (100 IRE) 82 OSD level 1 83 OSD level 2 84 OSD level 3 85 OSD level 4 Vosd1 OSD : 0 Vosd2 Vosd3 OSD : 1 Vosd4 VOSD1(3) Video In : Sig-Y1 OSD BLK : Sig-R3 16 18 20 V1 VOSD2(4) GAM2 GAM1 GAMMA : 0/7 Video In : Sig-H1, Y In : SigR1 Vg2 16 18 20 Vg1 Gdr1 20 G DRIVE : 1F B DRIVE : 1F 76 Gdr2 G DRIVE : 0 B DRIVE : 0 PICTURE : 0 Video In : DY COL : 0 Gdy, b Sig-H1 Y In : SigR1 Video In : Sig-H1, Y In : Sig-R1 18 20 Vdr2 16 18 20 Gdy, r 16 20 Vdyr Vdyr Vdyb Vr0 Vdyb Vb0 Vr1 20log Vr0 Vdr1 20log Vdr2 Vr0 Vr1 Vr0 –5.2 –4.5 –3.3 dB 20log Vdr1 Vr0 0.7 1.5 2.2 dB Measurement method Min. Typ. Max. Unit 77 Gpic –15.7 –14.7 –13.7 dB 78 79 × 100 × 100 94.5 104 97 106 98.5 108 % % Vg1 (GAMMA: 7) –Vg1 (GAMMA: 0) Vg2 (GAMMA: 0) Vg2 (GAMMA: 7) –Vg2 (GAMMA: 0) Vg2 (GAMMA: 0) VOSD V1 10 18 26 IRE –8 0 8 IRE 55 × 100 23 82 36 65 33 92 46 75 43 102 56 IRE IRE IRE IRE V1=100IRE —15— CXA1870S No. Item Symbol Measurement conditions OSD BLK: Video In: Sig-R2 (5V) Sig-Y1 Measurement pin 16 18 20 16 18 20 16 Measurement method Min. Typ. Max. Unit 86 OSD BLK black variation ∆ Vosd VD– VOSDBLK VOSDBLK V1 V2 20log VD V2 V1 –150 190 410 mV 87 OSD BLK attenuation Gosd OSD BLK: Video In: Sig-R2 (3V) Sig-Y1 –7 –6 –5 dB 88 ABL threshold 89 ABL gain 1 90 ABL black level 1 91 ABL gain 2 92 ABL black level 2 93 Blanking level 94 Ik clamp level 95 Ik R level 96 97 Ik variable range 1 Ik variable range 2 RGB output DC range 1 RGB output DC range 2 Vth, abl Video In: Sig-Y1 Gabl1 ABL: 3 Vabl1 Gabl2 ABL: 0 Vabl2 Vblk Vlk, clp Vlk, r Vlk, max Vlk, min Vref, max Vref, min Vary the voltage applied to Pin 23 and measure the voltage at which picture ABL operates. 20log Vp, 5V Vp, 9V Vp Vb, 5VVb, 9V Vb 20log Vp, 5V Vp, 9V Vb, 5VVb, 9V 1.1 1.2 1.3 V dB mV dB mV V V V V V Video In: Sig-Y1 16 Pin 25: 9 V/5 V –3.4 –2.4 –1.4 100 200 300 –8.8 –6.8 –4.8 –100 0 0 0.2 100 0.4 Video In: Sig-Y1 16, 18, 20 Measure the R, G and B blanking levels. B G VIK 1.25 1.35 1.45 0.76 0.86 0.96 Video In: G CUTOFF: F Sig-V1 B CUTOFF: F G CUTOFF: 0 B CUTOFF: 0 Vsh: 4.6V (Pins 15, 17 and 19) Vsh: 8V (Pins 15, 17 and 19) 21 Vlk,b Vlk,g Vlk,r Vlkg, b-Vlk, r Vlk,clp –0.64 –0.54 –0.44 0.2 0.35 0.4 98 16 18 20 Vref 3.2 3.5 4.0 V 99 0.45 0.85 1.25 –0.5 –0.4 –0.3 Vsig-Vref REFP Vsig –0.46 –0.36 –0.26 0.3 0.35 0.4 V V V V V V V V V V V 100 Bright center -R 101 Bright center -G, B Bright variable range 1-G, B Bright variable range 2-G, B Sub-bright variable range 1-R Sub-bright variable range 1-G, B Sub-bright variable range 2-R Sub-bright variable range 2-G, B Vbcen, r BRIGHT: 1F Vbcen, gb 16 18 20 16 18 Video In: Sig-V1 20 16 18 20 Vref Vsig (BRIGHT: 1F) –Vsig 102 Bright variable range 1-R Vbrt1, r BRIGHT: 3F 103 Vbrt1, gb 0.27 0.32 0.37 –0.38 –0.33 –0.28 –0.36 –0.31 –0.26 0.3 0.35 0.4 104 Bright variable range 2-R Vbrt2, r BRIGHT: 0 105 106 107 108 109 Vbrt2, bg Vsbrt1, r Vsbrt1, gb Vsbrt2, r Vsbrt2, gb SUB BRIGHT: 0 SUB BRIGHT: 3F 16 18 20 16 18 20 0.27 0.32 0.37 –0.38 –0.33 –0.28 –0.36 –0.34 –0.26 —16— CXA1870S I2C bus system items No. 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 Item High level input voltage Low level input voltage High level input current Low level input current Low level output voltage During current inflow of 3 mA to SDA (Pin 38) SDA inflow current Input capacitance SCL clock frequency Time the bus must be free before a new transmission can start Hold time start condition The Low period of the clock The High period of the clock Set up time for start condition Hold time data Set-up time data Rise time of both SDA and SCL lines Fall time of both SDA and SCL lines Set-up time for stop condition Symbol Vih Vil lih lil Vol lol Ci fscl tbuf thd;sta tlow thigh tsu;sta thd;dat tsu;dat tr tf tsu;sto Min. 3.0 0 — — 0 3 — 0 4.7 4.0 4.7 4.0 4.7 5 250 — — 4.7 Typ. — — — — — — — — — — — — — — — — — — Max. 5.0 1.5 10 10 0.4 — 10 100 — — — — — — — 300 300 — Unit V V µA µA V mA pF kHz µs µs µs µs µs µs ns ns ns µs —17— CXA1870S Signals Used for Measurements H system 63.556µs SIG-H1 4.8µs 0.57V fH=15.734kHz 61.98µs SIG-H2 4.65µs 0.57V fH+400Hz 65.215µs SIG-H3 4.96µs 0.57V fH–400Hz 59.759µs SIG-H4 4.51µs 0.57V fH+1kHz 67.870µs SIG-H5 5.13µs 0.57V fH–1kHz 62.563µs SIG-H6 4.73µs 0.57V fH+250Hz 64.583µs SIG-H7 4.88µs 0.57V fH–250Hz —18— CXA1870S V system Equalizing pulse 3H Vsync 3H Equalizing pulse 3H 1H=63.556µs SIG-v1 4.8µs Equalizing pulse interval 1/2H Vsync interval 1/2H 2.5µs fV=fH / 262 —19— CXA1870S Y system 1.7µs 9.5µs 1.43V SIG-Y1 4.8µs 0.57V 0.7V SIG-Y2 f = 3.58MHz 1.7µs SIG-Y3 9.5µs 26µs 1.43V 4.8µs 0.57V 0.7V SIG-Y4 f = 100kHz 0.7V SIG-Y5 f = 3MHz —20— CXA1870S 0.7V SIG-Y6 f = 8MHz 0.28V SIG-Y7 f = 5 MHz 1.4V SIG-Y8 f = 5MHz 0.7V SIG-Y9 f = 9 MHz 0.14V SIG-Y10 6.6µs 9.8µs 1.43V SIG-Y11 4.8µs 0.57V 63.556µs —21— CXA1870S C system 63.556µs SIG-H1 fH = 15.734kHz 4.8µs 0.57V 1.7µs 0.5µs fsc+400Hz fsc+100kHz, 0.1Vp-p SIG-C1 0.5Vp-p 3µs fsc–400Hz SIG-C2 0.5Vp-p fsc+100kHz, 0.1Vp-p fsc0° SIG-C3 0.5Vp-p fsc+90°, 0.3Vp-p fsc–90°, 0.3Vp-p 35.5µs fsc0° SIG-C4 0.5Vp-p fsc+0°, 0.3Vp-p fsc+180°, 0.3Vp-p 35.5µs fsc SIG-C5 0.5Vp-p fsc+100kHz, 0.5Vp-p 0dB fsc SIG-C6 fsc+100kHz, 1.0Vp-p 6dB 1Vp-p —22— CXA1870S 63.556µs SIG-H1 4.8µs 0.57V fH = 15.734kHz 1.7µs 0.5µs fsc SIG-C7 50mVp-p 3µs fsc SIG-C8 32mVp-p fsc+100kHz, 50mVp-p –20dB fsc+100kHz, 32mVp-p –30dB fsc SIG-C9 5mVp-p fsc+100kHz, 5mVp-p –40dB fsc SIG-C10 0.5Vp-p fsc+500kHz, 0.1Vp-p fsc SIG-C11 0.5Vp-p fsc–500kHz, 0.1Vp-p —23— CXA1870S RGB system 1.43Vp-p 0.7Vp-p SIG-R1 3V or 5V SIG-R2 5V 2.5V SIG-R3 —24— CXA1870S Measurement Method I2C Bus Register Initial Settings Register name PICTURE RGB LIM HUE IN SW COLOR SW GAIN BRIGHT NR ON SHARPNESS SUB CONT SUB HUE SUB COLOR SUB BRIGHT TRAP ON TOT ON PIX ON R ON G ON B ON PRE OVER AXIS No. of Initial Description bits setting 6 3FH Maximum value 2 3H Maximum value 6 1FH Center point 1 0H V1 IN selected 6 1FH Center point 1 0H 0 dB gain 6 1FH Center point 1 0H NR OFF 4 7H Center point 4 7H Center point 4 7H Center point 4 7H Center point 6 1FH Center point 0H TRAP OFF 1 0H TOT OFF 1 1H Picture mute OFF 1 1H R output ON 1 1H G output ON 1 1H B output ON 1 0H Minimum value 3 0H JAPAN detective axis 1 Register name BLACK DYCOL OFF REF ABL BLUE OSD G DRIVE DC TRAN B DRIVE GAMMA G CUTOFF B CUTOFF H PHASE V ON V EX OFF AFC V SHIFT HV COMP V SIZE C MODE V LIN SCORR No. of Initial Description bits setting 1 0H BLACK OFF 1 1H DY COL OFF 2 1H Center point 2 0H Minimum value 1 0H BLUE OFF 1 0H Luminance level small 5 FH Center point 3 0H Minimum value 5 FH Center point 3 0H Correction OFF 4 7H Center point 4 7H Center point 4 7H Center point 1H VD output ON 1 1H V sync elongation OFF 1 1H Center point 2 FH Center point 5 3H Center point 3 1FH Center point 6 0H Countdown ON 1 7H Center point 4 7H Center point 4 —25— CXA1870S Electrical Characteristics Measurement Circuit 3.3k 100p 12p 2.2k 10k 1 470p X'TAL V BIAS 42 330 1µ 2 APC VCC 9V 0.47µ 15k 47µ 0.01µ 0.22µ V SYNC 41 220k H SYNC 40 560 4700p 3 VCC 4 V1 IN H S/S OUT 39 VIDEO IN 330k 5 0.47µ V HOLD SW OUT SDA 38 I2 C 6 2.2K 0.22µ SCL 37 4.7µ 7 4.7µ 3/5 V Y IN REG 36 15k 8 9 A PED IREF 35 0.01µ C IN AFC 34 5.6k 2.2µ C IN CXA1870S 10 V GND CERA 33 500 kHz ceramic oscillator J GND 32 11 OSD BLK 12 OSD R HP 31 13 OSD G XRAY 30 X RAY 0V HD 29 14 OSD B ∗Pin 15, 17, 19 and 21 switches are ON only for electrical characteristic measurements No. 93 to 96. 0.1µ ∗ 6.7V 15 R S/H V PLS 28 0.1µ film 16 R OUT 0.1µ ∗ 17 G S/H V OSC 26 4.7µ 18 0.1µ ∗ 19 B S/H VD 24 0/6V 20 B OUT ABL IN 23 V2 IN 22 0.22µ G OUT ABL LPF 25 V LPF 27 0.22µ film CRT DRIVE 21 ∗ 10µ IK —26— HP GEN. 2.2k 9/5 V CXA1870S Reference Circuit CRT Drive Circuit +9V 1.1k 110k 1.1k 2SA 1175 2SC 2785 100 1k 110k 1.1k 2SA 1175 2SC 2785 2SC 2785 470 100 1k 2SC 2785 47k 470 GND 110k 2SA 1175 68k to IK of the IC 2SC 2785 100 1k 2SC 2785 470 2SA1175 from Pins R, G and B OUT of the IC HP Gen +9V 10k Pulse width 12 µs 3.3k 1000 p 6.8k 16 15 14 13 12 11 10 68 k 1µ HP 0.022µ 9 4538 1 2 3 4 5 6 7 8 470p 10k Delay 10µs HD —27— CXA1870S Application Circuit 3.3k 3.58MHz X'TAL 12p 2.2k 470p 330 1µ 100p 10k 1 2 X'TAL V BIAS 42 APC V SYNC 41 220k 0.47µ 15k +9V Composite video 1 input 47µ 0.01µ 0.22µ 3 4 330k VCC H SYNC 40 560 4700 p H SYNC SEP output 220 V1 IN H S/S OUT 39 5 0.47µ V HOLD SW OUT SDA 38 220 I 2C 6 2.2k 0.22µ SCL 37 4.7µ 7 4.7µ Y IN REG 36 15k 8 9 10 220 A PED IREF 35 0.01µ C IN AFC 34 5.6k 2.2µ V GND CERA 33 500 kHz ceramic oscillator 1µ 11 OSD BLK 220 12 OSD inputs 220 13 220 14 OSD B 0.1µ film 15 220 16 R OUT 0.1µ film 17 RGB outputs 220 18 0.1µ film 19 B S/H 220 20 47k 10k Ik input 47p 0.47µ 21 100 IK B OUT G OUT G S/H R S/H OSD G OSD R J GND 32 2.2k H pulse input HP 31 10k XRAY 30 1µ HD 29 100p V PLS 28 0.1µ film V LPF 27 0.22µ film V OSC 26 4.7µ ABL LPF 25 X-ray protection circuit input H drive output V pulse output VD 24 1.5k V drive output ABL IN 23 1µ ABL input Composite Video 2 input V2 IN 22 0.22µ Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —28— CXA1870S Description of Operation 1. Synchronizing and picture distortion correction systems The video signals (2 Vp-p standard) input to Pins 40 and 41 are led to the horizontal and vertical sync separation circuits for sync separation. The horizontal sync signal is output from Pin 39 with positive polarity. This horizontal sync signal is compared with the signal obtained by 1/32 frequency dividing the 32 fH VCO output using the ceramic oscillator (frequency: 503.5 kHz) to detect a phase difference. The error voltage resulting from the phase difference is applied to the H oscillator after attenuating the medium and high frequency components by a lag-lead filter. The phase of the H oscillator output is compared and shifted to match the phase of the H deflection pulse (flyback pulse) input from Pin 31, and then output from Pin 29. After the vertical sync signal is synchronized to the input signal by the V countdown system, a sawtooth wave is generated by charging and discharging the capacitor attached externally to Pin 26. AGC is performed to ensure that the amplitude of the sawtooth wave is maintained constant regardless of the vertical frequency of the input, after which the sawtooth wave passes through the picture distortion correction circuit and is output from Pin 24. Note that there is no need to adjust the free running frequency for either the H or V oscillator. When voltage of 3 V or more is applied to Pin 30, the H drive output is held at low level. A time constant circuit is included to protect against overvoltages, and H drive is output normally when high voltage input continues for less than 7 V cycles. To release holddown, the IC must be turned off and then started up again. Note) When the external capacitance at Pin 27 is used with 0.1 µF below of recommended value, VD output at Pin 24 may be unstable. When changing capacitance value, use it more than 0.047 µF. 2. Y/C system The Y/C system has the following three input systems. Composite video input (1 Vp-p/2 Vp-p) 2 systems (The gain can be switched between 0 and 6 dB for both systems.) Y/C separation input (2 Vp-p) 1 system The Y signal (specified input level 2 Vp-p) input to Pin 7 is passed through the sub-contrast control, chroma trap (or delay line), delay line, sharpness control, noise reduction, clamp and auto pedestal circuits. The signal is then mixed with the color difference signal, passed through the clamp and Y/C MIX circuits again, and input to the RGB interface system block. Since a built-in chroma trap is provided, the video signal can be directly input. Trap frequency adjustment is not necessary as a dummy filter is provided inside the IC and feedback is applied using the 3.58 MHz signal generated by a crystal oscillator for reference. When the chroma trap is off, the Y system frequency response is approximately 8 MHz, –3 dB for R, G and B outputs. Sharpness control is delay line type with a variable PRE/OVER ratio. Dynamic picture control consists of pulling in the signal below 40 IRE to the black side so that the signal black peak held by Pin 8 becomes the pedestal level. The chroma signal (specified input level, burst 570 mVp-p, or video signal 2 Vp-p) input to Pin 9 is passed through the ACC, TOT, color control (saturation control) and killer detection circuits, after which the burst locked VCO oscillation output is detected as the carrier. (The detective output LPF is a quadruple.) —29— CXA1870S The signal is then separated into color difference signals R-Y, B-Y and G-Y by the matrix circuit, passed through the Y/C MIX circuit, and input together with the Y signal to the RGB interface system block. The detective axis (Japan/US) can be switched by the I2C bus register. 3. RGB interface system YS/YM switching is performed according to the amplitude of the OSD RGB input blanking signal input from Pin 11. 0 to 1.5 V TV (Y/C input) 1.5 to 3.5 V TV –6 dB 3.5 to 5.5 V Black The R, G and B signals of the Y/C system pass through the RGB switch (BLUE and BLACK ON/OFF) and receive picture control. These signals are mixed with the digital R, G and B signals (specified input level 0 to 5 V DC) input from Pins 12, 13 and 14, passed through the dynamic color, gamma correction, bright control, drive adjustment (R channel is fixed, G and B channels are variable.), cut-off adjustment (R channel is fixed, G and B channels are variable.) and auto cut-off DC level shift circuits, and then output from Pins 16, 18 and 20 as the R, G and B signals. The RGB output amplitude has a limit voltage whose setting value can be controlled with the I2C bus register. The digital R, G and B signals are mainly used for on screen display of channels, etc. and the display level can be set with the I2C bus register. The signal input to Pin 23 (ABL IN) is compared with the internal reference voltage and is then integrated by the capacitor connected to Pin 25 (ABL LPF) for picture and brightness control. Picture ABL mode and combined picture ABL and brightness ABL mode can be switched with the I2C bus register. Note) When the digital R, G and B signals and OSDBLK signal are not used, connect Pins 11, 12, 13 and 14 to GND. Auto cut-off For white balance, drive control (gain control between R, G and B outputs) and cut-off control (black side DC level control) are involved. This IC uses the I2C bus register for drive control. For cut-off control, a loop is formed between the IC and CRT to achieve auto cut-off control. This auto cut-off arrangement makes it possible to compensate for CRT changes with time. To absorb the CRT variance, the cut-off voltages of the G and B outputs are adjusted by the I2C bus register. The auto cut-off loop is configured as described below. (1) R, G and B reference pulses for auto cut-off, shifted 1H each in the order mentioned, are added to the top of the picture. (2) The IK of each of the R, G and B outputs is converted to a voltage and input to Pin 21. (3) The voltage input to Pin 21 is compared with the reference voltage in the IC to change the DC level of the reference pulses. The loop mentioned above determines the shift level of the R, G and B outputs and lets the capacitances connected to Pins 15, 17 and 19 hold the DC shift level during the 1 V period. If the voltage at any one of Pins 15, 17 or 19 is less than 4.2 V, the status register IK (bit 6) becomes “1”. Use this information to blank the R, G and B outputs with the I2C bus register. The positions of the reference pulses can be changed by the I2C bus register. —30— CXA1870S Definition of I2C Bus Registers Slave addresses 88H: Slave receiver 89H: Slave transmitter Register table • All registers are set to 0 when the IC power is turned on. • “X” indicates “don’t care”; “∗” indicates undefined. Control registers Sub Address XXXX0000 XXXX0001 XXXX0010 XXXX0011 XXXX0100 XXXX0101 XXXX0110 XXXX0111 XXXX1000 XXXX1001 XXXX1010 XXXX1011 XXXX1100 XXXX1101 XXXX1110 XXXX1111 PIX ON BLACK R ON DY COL OFF G DRIVE B DRIVE G CUTOFF H PHASE VSHIFT V SIZE V LIN S CORR V ON VEX OFF HV COMP 0 C MODE SHARPNESS SUB HUE SUB BRIGHT G ON REF B ON PRE OVER ABL BLUE DC TRAN GAMMA B CUTOFF AFC bit 7 bit 6 bit 5 PICTURE HUE COLOR BRIGHT SUB CONT SUB COLOR TRAP ON TOT ON AXIS OSD bit 4 bit 3 bit 2 bit 1 RGB LIM bit 0 ∗ ∗ ∗ IN SW SW GAIN NR ON Status register bit 7 H LOCK bit 6 IK bit 5 KILLER bit 4 XRAY bit 3 0 bit 2 0 bit 1 0 bit0 0 —31— CXA1870S Description of I2C Bus Registers Sub Address 0000 PICTURE (6): Picture control 0 = Minimum 63 = Maximum RGB LIM (2): RGB output amplitude limiter voltage control 0 = Limited at 4.9 V (with a black level of 2 V) 1 = Limited at 5.1 V (with a black level of 2 V) 2 = Limited at 5.3 V (with a black level of 2 V) 3 = Limited at 5.5 V (with a black level of 2 V) Sub Address 0001 HUE (6): Hue control 0 = Skin color nearer to red 63 = Skin color nearer to green IN SW (1): Input selector switch 0 = V1 IN 1 = V2 IN Sub Address 0010 COLOR (6): Color control 0 = Minimum 63 = Maximum SW GAIN (1): Switch output gain switching 0 = SW GAIN 0 dB 1 = SW GAIN 6 dB Sub Address 0011 BRIGHT (6): Brightness control 0 = Minimum 63 = Maximum NR ON (1): Y signal noise reduction ON/OFF 0 = OFF 1 = ON Sub Address 0100 SHARPNESS (4): Sharpness control 0 = Minimum 15 = Maximum SUB CONT (4): Sub-contrast control 0 = Minimum 15 = Maximum —32— CXA1870S Sub Address 0101 SUB HUE (4): Hue center control 0 = Skin color nearer to red 15 = Skin color nearer to green SUB COLOR (4): Color center control 0 = Minimum 15 = Maximum Sub Address 0110 SUB BRIGHT (6): Sub-bright control 0 = Minimum 63 = Maximum TRAP ON (1): Chroma trap in Y system ON/OFF 0 = OFF 1 = ON TOT ON (1): Chroma TOT filter ON/OFF 0 = OFF 1 = ON Sub Address 0111 PIX ON (1): Picture mute ON/OFF 0 = Picture mute (Auto cut-off reference pulse also muted.) 1 = Picture mute released. R ON (1): R OUT ON/OFF 0 = R OUT OFF 1 = R OUT ON G ON (1): G OUT ON/OFF 0 = G OUT OFF 1 = G OUT ON B ON (1): B OUT ON/OFF 0 = B OUT OFF 1 = B OUT ON PRE OVER (3): Sets the sharpness preshoot and overshoot ratio. 0 = Pre Shoot 100 %, Over Shoot 0 % 7 = Pre Shoot 25 %, Over Shoot 75 % AXIS (1): Detective axis switching 0 = JAPAN 1 = USA —33— CXA1870S Sub Address 1000 BLACK (1): Blanks the Y IN/C IN signals and sets the R, G and B outputs to black level. 0 = OFF 1 = ON DY COL OFF (1): Dynamic color ON/OFF 0 = Dynamic color ON 1 = Dynamic color OFF REF (2): Switches the auto cut-off reference pulse position. 0 = B-18H G-19H R-20H 1 = B-20H G-21H R-22H 2 = B-22H G-23H R-24H 3 = B-24H G-25H R-26H ABL (2): ABL mode setting 0 = Picture ABL mode (including protective bright ABL) 1 = Combined picture ABL and bright ABL mode (bright ABL low) 2 = Combined picture ABL and bright ABL mode (bright ABL medium) 3 = Combined picture ABL and bright ABL mode (bright ABL high) BLUE (1) On screen display B IN ON/OFF. Setting to ON turns the entire screen blue. 0 = OFF 1 = ON OSD (1): On screen display luminance setting 0 = Level small 1 = Level large Sub Address 1001 G DRIVE (5): G OUT drive control 0 = Minimum 31 = Maximum DC TRAN (3): DC transmission ratio setting 0 = Maximum (100 %) 7 = Minimum(75 %) Sub Address 1010 B DRIVE (5): B OUT drive control 0 = Minimum 31 = Maximum GAMMA (3): γ correction value setting 0 = Correction OFF 7 = Maximum correction —34— CXA1870S Sub Address 1011 G CUTOFF (4): G OUT cut-off voltage control 0 = Minimum 15 = Maximum B CUTOFF (4): B OUT cut-off voltage control 0 = Minimum 15 = Maximum Sub Address 1100 H PHASE (4): Horizontal position control 0 = Screen shifted to right 15 = Screen shifted to left V ON (1): VD output ON/OFF 0 = VD output stopped. (Picture mute applied simultaneously. Auto cut-off reference pulse also muted.) 1 = VD output V EX OFF (1): V sync elongation ON/OFF 0 = V sync elongation ON 1 = V sync elongation OFF AFC (2): AFC loop gain switching 0 = AFC loop gain large 1 = AFC loop gain medium 2 = AFC loop gain small 3 = AFC loop open, free running mode Sub Address 1101 V SHIFT (5): Vertical position control 0 = Rise 31 = Lower HV COMP (3): Vertical correction amount setting for high voltage fluctuations 0 = Correction amount minimum 7 = Correction amount maximum Sub Address 1110 V SIZE (6): Vertical amplitude control 0 = V size minimum 63 = V size maximum C MODE (1): V countdown system mode switching 0 = Non-standard signal mode, standard signal mode and no signal mode switched automatically. 1 = Fixed to non-standard signal mode (wide V sync window mode). —35— CXA1870S Sub Address 1111 V LIN (4): Vertical linearity control 0 = Top of screen compressed, bottom of screen expanded. 15 = Top of screen expanded, bottom of screen compressed. S CORR (4): Vertical S correction control 0 = S correction amount minimum 15 = S correction amount maximum H LOCK (1): Returns whether the H oscillator of the IC and the signal input to H SYNC are locked. 0 = Not locked 1 = Locked IK (1): Returns the AKB loop stable status by detecting the IK current. 0 = IK current stable for each of R, G and B 1 = IK current unstable KILLER (1): Returns the color killer ON/OFF status. 0 = OFF 1 = ON XRAY (1): Returns the X-ray protection status. 0 = OFF (X-ray protection is not functioning.) 1 = ON (X-ray protection is functioning.) —36— CXA1870S 8.0 2.0 6.0 TOT SW = 1 0 4.0 Attenuation (dB) –2.0 2.0 (dB) –4.0 TOT SW = 0 0 –2.0 –6.0 –8.0 –4.0 –6.0 0 1 2 3 4 5 SHARPNESS = F SHARPNESS = 7 SHARPNESS = 0 –10.0 6 7 8 Frequency (MHz) –800 –600 –400 –200 0 200 400 600 800 Fig 1. Sharpness characteristics Fig 2. Chroma frequency characteristics ∆fsc (kHz) fsc = 3.58MHz Output amplitude (black to white) (Vp-p) 0 Attenuation (dB) –10 1.0 –20 TRAPSW = 0 TRAPSW = 1 0.5 Input: IRE changed at Full Flat Output: R OUT DYCOL= AKB=OFF GAMMA=DCTRAN=0 –30 0 1 2 3 4 5 6 7 8 Fig 3. Trap F0 frequency characteristics Input frequency (MHz) 0 10 20 30 40 50 60 Fig 4. Auto pedestal characteristics Input amplitude (IRE) Output amplitude (Vp-p) 2.0 1.0 GAMMA = 7 GAMMA = 3 GAMMA = 0 0 20 40 60 80 100 Fig 5. Gamma characteristics Input amplitude (IRE) —37— CXA1870S Output amplitude (black to white) (Vp-p) 3.0 Gch = Bch = +1.5dB 1.0 +3.0dB Rch = 0.86 Vp-p Gch = Bch = –4.5dB 2.0 Input: Y IN 1.4Vp-p (black to white) Output: adjust to be 2.5Vp-p at R OUT IK level (Vp-p) 2.5 –8.3dB Input: Y IN all black 0.5 AKB = ON Output: IK (Pin 21) 1.5 DYCOL = AKB = OFF DCTRAN = 0 0 7 F 17 1F G, B drive data (HEX) 0 5 A F G, B cutoff data (HEX) Fig 6. G, B drive characteristics Fig 7. Cutoff control characteristics 3.0 Output amplitude (black to white) (Vp-p) 1.4 VD-output amplitude (Vp-p) 2.0 1.35 Input: YIN 1.4Vp-p (black to white) Output: ROUT 1.0 SUBCONT = 7 DYCOL = AKB = OFF DCTRAN = 0 Output: VD (Pin 24) HV COMP = 7 1.3 Variable range 14.7dB 0 2 4 6 8 10 ABL IN Applied voltage (V) 0 8 10 18 20 28 30 38 3F Fig 8. HV COMP characteristics Fig 9. Picture control data (HEX) —38— CXA1870S 2.5 ABL3 Output amplitude (white to black) (Vp-p) ABL0 2.0 1.8 1.5 ABL0 Output black level (V) 1.6 ABL3 1.0 Input YIN 2.0Vp-p R OUT PIC = 3F SUBCONT = 7 1.4 0.5 DCTRANT = 0 AKB = OFF 1.2 0 1 2 3 4 5 6 7 8 9 ABL-FIL applied voltage (V) 0 1 2 3 4 5 6 7 8 9 Fig 10. ABL characteristics (picture) Fig 11. ABL characteristics (bright) ABL-FIL applied voltage (V) 3.0 3.0 Input YIN 1.4Vp-p (black to white) Output ROUT Output level (Vp-p) 2.0 OSD = 0 Output amplitude (black to white) (Vp-p) OSD = 1 2.0 PIC = 3F SUBCONT = 7 AKB = OFF 1.0 1.0 –5.7dB Input OSDR Output ROUT 100IRE = 2.5Vp-p 0 1 2 3 4 5 6 OSDR applied voltage (V) 0 1.0 2.0 3.0 4.0 5.0 OSD-BLK applied voltage (V) Fig 12. OSD RGB I/O characteristics Fig 13. OSD-BLK voltage —39— CXA1870S Package Outline Unit : mm 42PIN SDIP (PLASTIC) + 0.1 – 0.05 22 42 15.24 ± 0.25 + 0.3 13.0 – 0.1 0.25 0° to 15° 21 1.778 0.5 ± 0.1 + 0.4 37.8 – 0.1 1 0.9 ± 0.15 Two kinds of package surface: 1.All mat surface type. 2.Center part is mirror surface. PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SOLDER PLATING 42/COPPER ALLOY 4.4g SONY CODE EIAJ CODE JEDEC CODE SDIP-42P-02 SDIP042-P-0600 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS —40— 3.0 MIN + 0.4 4.6 – 0.1 0.5 MIN