CXA1871S

CXA1871S NTSC/PAL Y/C/Jungle Description The CXA1871S is a bipolar IC which integrates the NTSC and PAL color TV luminance signal processing, chroma signal processing, sync signal processing, and RGB signal processing onto a single chip. Features • I2C bus compatible. Various types of adjustments and user controls performed with two bus lines SCL and SDA. • H and V oscillation frequencies made nonadjusting with a countdown system. • Non-adjusting Y system filters (chroma trap, delay line) • Built-in V picture distortion correction circuit • Built-in delay line aperture compensation • Auto cut-off function for automatic CRT cut-off adjustment and compensation for changes with time • Multiple inputs Composite Video 2 systems (Built-in 2-input, 1-output video switch) Y/C separation input: 1 system On screen display input: 1 system • Multiple system configuration possible using a nonadjusting SECAM chroma decoder. Applications Color TV Structure Bipolar silicon monolithic IC 48 pin SDIP (Plastic) Absolute Maximum Ratings • Supply voltage • Operating temperature • Storage temperature • Allowable power dissipation Operating Conditions Supply voltage (Ta=25 °C) VCC 12 V Topr –20 to +75 °C Tstg –65 to +150 °C PD 1.8 W VCC 9±0.5 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E95432-TE Block Diagram AFC CERA J GND HD XRAY SCP V LPF HP V HOLD VOSC VD V SYNC V PLS ABL LPF 28 26 SCL IREF SDA H SYNC 41 29 30 40 37 42 44 36 35 34 33 32 31 27 38 43 39 REG 8 ABL IN ABL 32fH VCO XRAY PHASE DET V ZOOMING REGU LATOR I2C BUS DECORDER V OFF HV COMP ABL IREF H.SYNC SEP 1/32 H.DRIVE VOSC V COMPENSATION PHASE DET. PHASE SHIFT V.SYNC SEP V COUNT DOWN 2fH XRAY H PHASE 50/60 V LIN S CORR SW OUT AFC HLOCK 9 VEX C MODE V SHIFT V SIZE BRIGHT IN SW SW GAIN DC TRAN V1 IN 7 OSD DY COL SUB BRIGHT R OFF G OFF PMUTE SHARPNESS PRE OVER GAMMA G DRIVE TRAP SW SUB CONT B DRIVE V2 IN 25 NR BLUE B OFF 0/6DB AMP BLACK PICTURE NT/PAL 1 2 X PAL1 X PAL2 X NTSC 13 3 4 5 11 A PED 47 48 45 46 EXT COLOR APC OSD BLK IK R S/H V GND B-Y IN R-Y IN OSD R SECAM REF B-Y OUT R-Y OUT OSD G OSD B G S/H B S/H —2— SHARPNESS NR PICTURE CLAMP YM RGB SW AUTO PEDESTAL OSD MIX Y/C MIX CLAMP DYNAMIC COLOR Y IN 10 19 ROUT GAMMA BRIGHT DRIVE DC SHIFT SUB CONT TRAP DELAY BLK 21 GOUT DELAY SUB COLOR SUB HUE NT/PAL NT/PAL OSD BLK REF G CUTOFF 23 BOUT HUE AXIS 2fH F.F AXIS B CUTOFF AKB TIMING AKB ACC DET. PAL ID ID AXIS TOT SW C IN 12 ACC TOT B.G. COLOR CLAMP IK COLOR KILLER HUE LPF 4.43/3.58 SW CHROMA VCO PHASE SHIFT DEM AXIS CHROMA DET. PHASE DET. COLOR VCC X' TAL PIN 6 DET SW KILLER SECAM CLAMP 14 15 16 17 24 18 20 22 CXA1871S CXA1871S Pin Configuration SECAM REF X PAL1 X PAL2 X NTSC APC VCC V1 IN V HOLD SW OUT Y IN 1 2 3 4 5 6 7 8 9 10 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 R-Y OUT B-Y OUT B-Y IN R-Y IN V SYNC H SYNC SCP SDA SCL REG IREF AFC CERA J GND HP XRAY HD V PLS V LPF V OSC ABL LPF VD ABL IN V2 IN A PED 11 C IN 12 V GND 13 OSD BLK 14 OSD R 15 OSD G 16 OSD B 17 R S/H 18 R OUT 19 G S/H 20 G OUT 21 B S/H 22 B OUT 23 IK 24 —3— CXA1871S Pin Description Pin No. Symbol Pin voltage Equivalent circuit VCC VCC 6k 20 p VCC Description When the IC is in the SECAM identification mode, the 4.43 MHz VCO oscillation waveform is output from this pin only during the VBLK period centering on DC = 1 V. If current of 150 µA is led from this pin during this identification mode, the IC switches to the SECAM mode. In the SECAM mode, DC = 5 V. 1 SECAM REF 1.3 V 1 20 k VCC 4k 2 3 4 X PAL 1 X PAL 2 X NTSC VCC 2.6 V 2 3 4 500 Crystal oscillator connection pins. Connect the PAL/N and 4.43 MHz crystals to Pin 2, the PAL/M crystal to Pin 3, and the NTSC crystal to Pin 4. VCC VCC 1.2 k 5 5 APC 5V 1.2 k 25 k APC lag-lead filter CR connection pin. 6 VCC 9V VCC Power supply pin. 7 7 25 V1 IN V2 IN 150 2V 25 Video switch input pins. Sync tip clamping is performed, so input via capacitors. —4— CXA1871S Pin No. Symbol Pin voltage Equivalent circuit Description 55 k VCC 8 V HOLD 0.7 V 150 1k 50 k Peak hold pin for V sync separation. Connect a capacitor. 8 VCC VCC 500 VCC 9 SW OUT — 9 2k 30 k 12 k Video switch output pin. 25 k VCC VCC 1.2 k 50 k 10 Y IN 3.5 V 10 Y signal input pin. Input via a capacitor. Standard input level: 2 Vp-p VCC VCC VCC VCC 16 k 20 k 1.2 k 20 k 11 A PED 3.5 V 11 Auto pedestal (black stretch) black peak hold pin. Connect a capacitor. —5— CXA1871S Pin No. Symbol Pin voltage VCC Equivalent circuit Description 30 k Chroma signal input pin. Standard input level (burst level) : 570 mVp-p 12 C IN — 12 6k 30 k 6k 13 V GND — VCC VCC Video system (Y/C/RGB) GND pin. 40 k 14 60 k 60 k 60 k 30 k 15 k 2k 2k VCC Blanking signal input pin for OSD RGB input. 0 to 1 V: Blanking not performed. 2 to 3 V: Signal from Y IN/C IN lowered by –6 dB. 4 to 6 V: R, G and B outputs become lower than black level. 14 OSD BLK — 30 k 30 k 2k 2k VCC 15 Digital R, G and B signal input pins for on screen display. 0 to 1 V: No OSD display. 2 to 3 V: OSD level 49 IRE (34 IRE) 4 to 6 V: OSD level 96 IRE (67 IRE) Figures in parentheses are for when the I2C OSD register is set to 0. 15 16 17 OSD R OSD G OSD B — 16 17 VCC 18 18 20 22 R S/H G S/H B S/H 20 — 1.2 k 22 Sample-and-hold pins for R, G and B AKB (Auto Kinetic Bias). Connect to GND via capacitors. —6— CXA1871S Pin No. Symbol Pin voltage Equivalent circuit VCC 150 VCC Description VCC 19 21 23 R OUT G OUT B OUT — 19 5k 21 23 R, G and B output pins. VCC VCC 24 IK — 24 150 Inputs the signal obtained by converting the CRT beam current (IK) into voltage. Connect to an emitter follower via a capacitor. VCC 10 k 30 k 26 ABL IN — 150 26 ABL voltage input pin. VCC 3k VCC VCC 3k 27 VD — 27 5k 15 k 24 k Vertical deflection sawtooth wave output pin. VCC VCC VCC 24 k 28 100 k VCC 35 k 10 k 28 ABL LPF — ABL signal LPF pin. Connect a capacitor. If the AKB loop is unstable when the power is turned on, this pin is lowered to around 0.3 V. —7— CXA1871S Pin No. Symbol Pin voltage Equivalent circuit VCC VCC VCC 100 Description 29 V OSC — 29 100 Connect a capacitor to generate the V sawtooth wave. VCC VCC 30 V LPF 5V 30 Connect a capacitor to hold the AGC voltage which maintains the V sawtooth wave at a constant amplitude. VCC VCC 74 k 31 V PLS — V pulse output pin. A negative polarity pulse 3 to 3.5 H width is output from this pin. High level: 4.5 V Low level: 0 V 31 18 k VCC 32 32 HD — 20 k 20 k H drive output pin. This pin is output at the open collector. VCC VCC VCC 19 k VCC 63 k 33 33 XRAY — 30 k 40 k 30 k 27 k X-ray protection circuit input pin. When a pulse with a width of 7 V or more is input, HD output becomes low and R, G and B outputs are blanked. This status is maintained until the power supply is turned off. Vilmax = 2.4 V Vihmin = 3.0 V —8— CXA1871S Pin No. Symbol Pin voltage Equivalent circuit VCC VCC Description 34 HP 3.3 V (at no signal) VCC 10 k 34 60 k H pulse input pin. Inputs a 3 to 5 Vp-p signal via a capacitor. 35 J GND — VCC 10 k 28 k Jungle system (H/V) GND pin. VCC VCC 36 CERA 2.3 V 36 330 Connect a 32 fh (503.5 kHz) ceramic oscillator. VCC VCC 46 k VCC 37 AFC 3.2 V 37 1.2 k AFC lag-lead filter CR connection pin. VCC 38 IREF 2.6 V 38 150 20 k Connect a 15 kΩ resistor between this pin and GND. —9— CXA1871S Pin No. Symbol Pin voltage VCC Equivalent circuit VCC VCC VCC 4p 40 k VCC Description 39 REG 7V 39 1.2 k Regulator pin for voltage generated internally from V CC . Connect a capacitor for stabilization. 50 µA VCC VCC I2C bus SCL (Serial Clock) and SDA (Serial Data) pins. Vilmax = 1.5 V Vihmin = 3 V Volmax = 0.4 V 40 41 SCL SDA — 40 41 4k 4k VCC 1.2 k VCC VCC Outputs BGP, HBLK and VBLK as SCP (Sand Cathle Pulse). The Typ. waveform is as follows. 5.0 V BGP 2.5 V 42 SCP — 500 µA H,VBLK 0.3 V VCC 14 k 24 k 43 H SYNC 2.6 V 150 43 10 µA 20 k H sync separation input pin. Inputs a 2 Vp-p video signal via a capacitor and resistor. VCC 10 k 26 k 150 44 31 k 20 µA 10 k 44 V SYNC 3.8 V V sync separation input pin. Inputs a 2 Vp-p video signal via a capacitor and resistor. 20 k —10— CXA1871S Pin No. Symbol Pin voltage VCC Equivalent circuit Description VCC 45 1.2 k 46 Color difference signal input pins. Input via capacitors. Standard input level B-Y: 1.33 Vp-p R-Y: 1.05 Vp-p 45 46 R-Y IN B-Y IN 5.2 V BGP 100 µA 50 k VCC 47 VCC VCC VCC 20 k 10 k Color difference signal output pins. Standard input level B-Y: 0.665 Vp-p R-Y: 0.525 Vp-p 47 48 B-Y OUT R-Y OUT 48 5V 80 k —11— CXA1871S Electrical Characteristics Setting conditions • Ta = 25 °C, VCC = 9 V • I2C bus register should be set to “I2C Bus Register Initial Settings”. No. Item Symbol ICC1 Measurement conditions Measurement pin 6 Measurement method Measure the VCC pin inflow current. Min. Typ. Max. 70 105 140 Unit mA 1 Current consumption 1 H system items No. Item Horizontal free running frequency Horizontal sync pull-in range Symbol Measurement conditions Measurement pin 32 Video In: Sig-H2,H3 AFC: 0 Video In: Sig-H6 4 AFC gain 1 AFCmax AFC: 0 Video In: Sig-H7 AFC: 0 Video In: Sig-H6 5 AFC gain 2 AFCcen AFC: 1 Video In: Sig-H7 AFC: 1 Video In: Sig-H6 6 AFC gain 3 AFCmin AFC: 2 Video In: Sig-H7 AFC: 2 7 HD output pulse width 8 HD output high level HD, W HD, H Video In: Sig-H1 Video In: Sig-H1 32 9 HD output low level Horizontal phase operating range 1 Horizontal phase operating range 2 Horizontal phase operating range 3 HP blanking delay time 1 HPBLK1 Video In: Sig-Y1 23 34 14 HP blanking delay time 2 HPBLK2 HPHmin HPHcen HD, L Video In: Sig-H1 Video In: Sig-Y1 HPHASE: F Video In: Sig-Y1 HPHASE: 7 Video In: Sig-Y1 HPHASE: 0 23 34 24 8.7 26 9 28 — µs V 34 AFCmin=t1-t2 0.75 1.2 1.75 µs 34 t2: Video In: Time from fall of Sig-H7 to rise of Pin 34. AFCcen=t1-t2 — 0.5 — µs 34 t1: Video In: Time from fall of Sig-H6 to rise of Pin 34. AFCmax=t1-t2 0.12 0.30 0.48 µs Measurement method Min. Typ. Max. Unit 2 Hfree ∆H 15.47 15.65 15.83 kHz 3 Check that I2C register HLOCK is 1. –400 — 400 Hz HD,H HD,L HD,W 0.5 0.8 1.1 V 10 HPHmax Pin 23 –4.3 –3.3 –2.3 µs 11 –1.5 –0.5 0.5 µs 12 HPH Pin 23 Pin 34 HPBLK1 HPBLK2 1.3 2.3 3.3 µs 13 — 100 — ns — 100 — ns 15 SCP BGP output level VSB 4 5.0 6 V VSB 16 SCP BLK output level VSBL 42 VSL 17 SCP low level Overvoltage protection circuit VTH VSL VSBL 2.5 V 0.3 32 Check that HD appears at 2.4 V and disappears at 2.8 V. V 18 XVTH 2.4 2.6 2.8 V —12— CXA1871S V system items No. Item Symbol VPLS, H Video In:Sig-V1 20 V PLS low level 21 VD output center voltage 22 V SHIFT variable range 1 23 V SHIFT variable range 2 24 V SIZE variable range 1 25 V SIZE variable range 2 S CORR:0 26 S CORR variable range 1 ∆Sa S CORR:F 27 S CORR variable range 2 ∆Sc V LIN:0 28 V LIN variable range 1 ∆La V LIN:F 29 V LIN variable range 2 ∆Lc HV COMP: 0, Pin 26: 6 V 30 V zooming 1 ∆VZ1 31 V zooming 2 ∆VZ2 HV COMP: 7, Pin 26: 6 V HV COMP: 0, Pin 26: 0 V HV COMP:7, Pin 26: 0 V Video In: Sig-V1 27 Vsa=Va VSIZE+ V SIZE:3F VSIZE– V SIZE:0 VSHIFT+ V SHIFT:1F Vb-VDcen 110 120 140 mV VSHIFT– V SHIFT:0 Vb-VDcen –140 –125 –115 mV VPLS, L 31 Measurement conditions Measurement pin Measurement method Min. Typ. Max. 4 4.5 5 Unit V 19 V PLS high level VPLS, H VPLS, L 0 0.1 0.5 V VDcen V SHIFT:F Vb 2.75 2.9 3.05 V Vc Pin 27 Vc-Va 0.9 1.1 1.2 V Vc-Va 1.5 1.65 1.8 V Vb Vsc=Vc Va-Vsa 45 65 85 mV GND Va Vc-Vsc –55 –35 –15 mV VTRIG Vla=Va Vlc=Vc Va-Vla 90 120 140 mV 0.1 ms Vc-Vlc 60 90 110 mV 8.75 ms 16.57 ms Vsmin= Vc-Va Vsmax= Vc-Va Vsmin(Vc-Va) Vsmax(Vc-Va) 60 80 100 mV 0 3 15 mV —13— CXA1871S Y system items No. Item Symbol Measurement conditions Video In:Sig-Y1 Measurement pin Measurement method Min. Typ. Max. — 20log Vsc1 VR 20log Vsc2 VR Video In: Sig-Y2 TRAP SW: 1 fsc= 3.58 MHz TRAP SW: 0 36 Trap attenuation 2 ATT trap2 TRAP SW: 1 SHARP NESS: F SHARP NESS: 7 SHARP NESS: 0 Video In: Sig-Y2 fsc= 4.43 MHz 37 Sharpness characteristics 1 Sharpness characteristics 2 Sharpness characteristics 3 Gsh, max Video In: Sig-Y4 19 Video In: Sig-Y5 19 19 2.5 — Unit V 32 R output level Sub-contrast variable range 1 Sub-contrast variable range 2 VR VR 19 33 Gsc, max SUBCONT: F Gsc, min SUBCONT: 0 TRAP SW: 0 Video In: Sig-Y1 Vsc1 Vsc2 Vtr1 2.2 2.7 3.2 dB 34 –3.8 –3.3 –2.8 dB 35 Trap attenuation 1 ATT trap1 20log Vtr2 Vtr1 — –30 –20 dB Vtr2 Vtr1 20log Vtr2 Vtr1 — –30 –20 dB Vtr2 Vs1 (Sig-Y4) 20log 5.5 Vs2 Vs1 7.0 8.5 dB 38 Gsh, cen 1.5 2.5 4.5 dB 39 Gsh, min Vs2 (Sig-Y5) Vf1 (Sig-Y4) 20log –7.5 –5.5 –3.0 dB 40 RGB output frequency response 1 Gfreq1 DELAY=0 Video In: Sig-Y4, Y6 19 21 23 Vf2 Vf1 –6 –3.0 0 dB Vf2 (Sig-Y6) 41 RGB output frequency response 2 Gfreq2 DELAY=2 Video In: Sig-Y4, Y6 19 21 23 Vf1 (Sig-Y4) 20log Vf2 Vf1 –7 –4.2 –1 dB Vf2 (Sig-Y6) Vdpp Video In: Sig-Y3 42 DC transmission rate 1 Gdt1 DC TRAN: 0 Video In: Sig-Y1 Video In: Sig-H1 Video In: Sig-Y3 DC transmission rate 2 Video In: Gdt2 DC TRAN: 7 Sig-Y1 Video In: Sig-H1 19 Vdw Vdb Vdpp Vdw-Vdb Vdpp 96 99 100 % 43 Vdw Vdb Vdw-Vdb Vdpp 73 78 85 % 44 Auto pedestal operation 1 Pin 11: 3 V Vdp1 Pin 11: 5 V Video In: Sig-H1 Voff 19 Voff-Von 280 340 400 mV Von Voff 19 Voff-Von 80 130 170 mV 45 Auto pedestal operation 2 Pin 11: 3 V Vdp2 Pin 11: OPEN Video In: Sig-Y10 Von —14— CXA1871S No. Item Symbol Measurement conditions NR: 1 Measurement pin Measurement method Min. Typ. Max. Unit 46 NR operation Gnr NR: 0 Video In: Sig-Y7 Von 19 20log Von Voff –6 –4.5 –3 dB Voff Vin (Pins 7 and 25) 20log Vout Vin 5.5 6 6.5 dB 47 SW gain 1 Gsw1 SW GAIN: 1 Video In: Sig-Y1 7, 25 9 48 SW gain 2 Gsw2 SW GAIN: 0 Vout (Pin 9) –0.5 0 0.5 dB C system items No. Item APC pull-in range 1 APC pull-in range 2 Symbol ∆f, apc1 ∆f, apc2 Measurement conditions Video-In: Sig-H1 C In: Sig-C1, C2 Video-In: Sig-H1 C In: Sig-C1, C2 Video-In: Sig-H1 51 Carrier leak Vcl COLOR: 3F SUBCOLOR: F Video-In: Sig-H1 52 Residual carrier level Vrcl C In: Sig-C3 COLOR: 3F SUBCOLOR: F 53 Color output level 54 Color variable range 1 Color variable range 2 Sub-color variable range 1 Sub-color variable range 2 Hue variable range 1 Hue variable range 2 Hue variable range 3 Sub-hue variable range 1 Sub-hue variable range 2 Vco, cen Gco, max COLOR: 3F Gco, min COLOR: 0 Video In: Sig-H1, 23 23 23 Measurement pin Measurement method Check that the burst frequency is changed to 3579545 ±350 Hz and pulled in. Check that the burst frequency is changed to 4433619 ±350 Hz and pulled in. Min. Typ. Max. –350 — 350 Unit Hz 49 50 –350 — 350 Hz Vcl f=fsc (3.58 MHz or 4.43 MHz) — — 50 mV Vrcl fsc (3.58 MHz or 4.43 MHz) component and 2 fsc component Vco0 Vco Vco1 20log — — 200 mV 0.6 Vco1 Vco0 20log Vco2 Vco0 20log Vsc1 Vco0 20log Vsc2 Vco0 5.6 0.9 6.3 1.2 6.9 V dB 55 f=100 kHz Vco2 Vsc1 Vsc2 — –50 –40 dB 56 Gsc, max SUB COLOR C In: Sig -C5 :F SUB COLOR :0 2.1 2.7 3.3 dB 57 Gsc, min φcen φmax φmin –5.4 –3.7 –2.0 dB 58 During Sig-C3 Vc1 Video In: Sig-H1, C In: Sig -C3 -C4 20 –10 0 10 deg 59 HUE: 3F Vc2 During Sig-C4 – Vc1-Vc2 tan 1 Vc4-Vc3 –54 –44 –34 deg 60 HUE: 0 23 33 43 deg 61 φs, max SUB HUE: F φs, min SUB HUE:0 –21 –15 –9 deg 62 Vc3 Vc4 Vr1 90°+ tan–1 Vr2 Vr1 8 13 20 deg 63 Detective axis R1 φr1 AXIS: 0 φg1 Video In: Sig-H1, C In: Sig -C4 -C3 19 105 112 119 deg ∆V1 ∆V2 Vr2 Vg1 270°– tan–1 64 Detective axis G1 21 Vg2 Vg1 244 251 259 deg Vg2 65 Detective output ratio R1 Detective output ratio G1 Vx Gr1 AXIS: 0 Gg1 Video In: Sig-H1, C In: Sig -C5 21 19 Vrg Vgg Vx VBW Gcomax VRW Vx VBW 0.7 0.8 0.9 — 66 f=100 kHz Gcomax VGW 0.26 0.3 0.34 — —15— CXA1871S No. Item Symbol Measurement conditions Measurement pin Measurement method Min. Typ. Max. Unit Vr1 67 Detective axis R2 φr2 AXIS: 1 68 Detective axis G2 φg2 Video In: Sig-H1, C In: Sig-C4, -C3 21 19 90°+ tan–1 Vr2 Vr1 83 90 97 deg ∆V1 ∆V2 Vr2 Vg1 Vg2 270°– tan–1 Vg2 Vg1 VBW 229 236 243 deg 69 Detective output ratio R2 Detective output ratio G2 AGC characteristics 1 AGC characteristics 2 Gr2 AXIS: 1 Gg2 Video In: Sig-H1 C In: Si -C5 C In: Video In: Sig-H1 Sig-C6, C In: Sig-C7 During NTSC input During PAL input TOT SW: 1 Video-In: Sig-H1 Video In: Sig-H1 C In: Sig-C8 -C9 C In: Sig-C5 -C11 19 Vx Vrg Vgg Vac1 Vx Gcomax VRW Vx VBW 0.49 0.56 0.63 — 70 20 f=100 kHz Gcomax VGW 20log Vac1 Vco0 Vac2 Vco0 0.29 0.34 0.39 — 71 Gacc1 –1.0 0.1 1.0 dB 20 72 Gacc2 f=100 kHz Vac2 20log –3 –1 0 dB 73 Killer point 1 KPNT Check that output 23 disappears at –38 dB and appears at –30 dB. –38 –34 –30 dB 74 Killer point 2 KPPAL –38 –34 –30 dB 75 Chroma frequency response 1-1 Gcf1– — –3 — dB 76 Chroma frequency response 1-2 Gcf1+ fsc =3.58 MHz C In: Sig-C10 — –1 — dB 77 Chroma frequency response 2-1 Gcf2– TOT SW: 0 Video-In: Sig-H1 C In: Sig-C5 -C11 –2.3 — 0.2 dB 78 Chroma frequency response 2-2 Gcf2+ fsc =3.58 MHz C In: Sig-C10 23 Vx 20log Vx Vref –2.7 — 0.2 dB 79 Chroma frequency response 3-1 Gcf3– TOT SW: 1 Video-In: Sig-H1 C In: Sig -C5 -C11 C In: Sig-C10 C In: Sig-C5 -C11 C In: Sig-C10 Vref= Vx (Sig-C5) — –3 — dB 80 Chroma frequency response 3-2 Gcf3+ fsc =4.43 MHz — –1 — dB 81 Chroma frequency response 4-1 Gcf4– TOT SW: 0 Video-In: Sig-H1 –2.3 — 0.2 dB 82 Chroma frequency response 4-2 R-Y output amplitude B-Y output amplitude Output amplitude ratio Gcf4+ fsc =4.43 MHz –2.7 — 0.2 dB 83 VRY Video-In: Sig-H1 C In: Sig-C13 Video-In: Sig-H1 C In: Sig-C12 48 — 0.5 — Vp-p 84 VBY 47 — 0.62 — Vp-p 85 VBR — VBR=VBY/VRY — 1.26 — —16— CXA1871S RGB system items No. Item Symbol Measurement conditions Measurement pin 19 Gdr1 G DRIVE: 1F B DRIVE: 1F 87 Drive variable range 2 Picture variable range Dynamic color operation R Dynamic color operation B Gamma 91 characteristics 1 (50 IRE) Gamma 92 characteristics 2 (100 IRE) 93 OSD level 1 Vosd1 OSD: 0 94 OSD level 2 Vosd2 GAM2 GAM1 GAMMA: 0/7 Video-In: Sig-H1 Y In: Sig-R1 19 21 23 Gdr2 G DRIVE: 0 B DRIVE: 0 Video-In: Sig-H1 Y In: Sig-R1 19 Gpic PICTURE: 0 21 23 Gdy, r DY COL: 0 Gdy, b Video-In: Sig-H1 Y In: Sig-R1 19 21 23 Measurement method Min. Typ. Max. Unit 86 Drive variable range 1 Vr0 20log Vdr1 Vr0 0.7 1.5 2.2 dB Vdr1 20log Vdr2 Vr0 Vr1 Vr0 –5.2 –4.5 –3.3 dB Vdr2 Vr1 Vdyr Vdyb 20log 88 –15.7 –14.7 –13.7 dB 89 Vdyr Vr0 Vdyb Vdr1 X100 94.5 97 98.5 % 90 23 X100 103 105.5 107 % Vg2 Vg1 Vg1 (GAMMA: 7) –Vg1 (GAMMA: 0) Vg2 (GAMMA: 0) Vg2 (GAMMA: 7) –Vg2 (GAMMA: 0) Vg2 (GAMMA: 0) 55 65 75 IRE –8 0 8 IRE 10 18 26 IRE VOSD1(3) Video-In: Sig-H1 OSD BLK: 19 21 23 VOSD V1 VOSD2(4) V1 X100 23 33 43 IRE 95 OSD level 3 Vosd3 OSD: 1 Sig-R3 V1=100IRE 82 92 102 IRE 96 OSD level 4 Vosd4 36 46 56 IRE 97 OSD BLK black variation ∆Vosd OSD BLK: Video In: 19 21 23 VD – VOSDBLK Sig-R2 (5 V) Sig-Y1 –150 190 410 mV VOSDBLK VD 98 OSD BLK attenuation Gosd OSD BLK: Video In: 19 21 23 V1 V2 20log V2 V1 Sig-R2 (3 V) Sig-Y1 –7 –6 –5 dB 99 ABL threshold value Vth, abl Video In: Sig-Y1 19 Vary the voltage applied to Pin 26 and measure the voltage at which picture ABL operates Vp, 5 V 20log Vp, 9 V 1.1 1.2 1.3 V 100 ABL gain Gabl1 ABL: 3 Video In: Sig-Y1 19 –3.4 –2.4 –1.4 dB 101 ABL black level 1 Vabl1 Vp Vb, 5 VVb, 9 V 140 240 340 mV 102 ABL gain 2 Gabl2 ABL: 0 Pin 28: 9 V/5 V Vb Vp, 5 V 20log Vp, 9 V Vb, 5 VVb, 9 V –8.8 –6.8 –4.8 dB 103 ABL black level 2 Vabl2 –100 0 100 mV 19 104 Blanking level Vblk Video In: Sig-R1 21 23 Measure the R, G and B blanking levels. 0 0.2 0.4 V —17— CXA1871S No. Item Symbol Measurement conditions Measurement pin Measurement method Min. Typ. Max. 1.25 1.35 1.45 Unit V 105 Ik clamp level VIk, clp B G VIK 106 Ik R level Ik variable range 1 Ik variable range 2 RGB output DC range 1 VIk, r Video In: G CUTOFF: F Sig-V1 B CUTOFF: F G CUTOFF: 0 B CUTOFF: 0 Vsh: 4.6 V 0.76 0.86 0.96 24 V 107 VIk, max Vlk,b Vlk,g Vlk,r Vlkg, b-Vlk, r 0.25 0.35 0.45 V 108 VIk, min Vlk,clp –0.64 –0.54 –0.44 V 109 Vref, max (Pins 18, 20 and 22) Vsh: 8 V Vref, min (Pins 18, 20 and 22) Vbcen, r BRIGHT: 1F 19 21 23 Vref 3.2 3.5 4.0 V 110 RGB output DC range 2 0.45 0.85 1.25 V 111 Bright center -R 19 21 23 19 21 23 19 BRIGHT: 0 Vsig-Vref –0.5 –0.4 –0.3 V 112 Bright center -G, B Vbcen, gb 113 Bright variable range 1-R Bright variable range 1-G, B Bright variable range 2-R Bright variable range 2-G, B Sub-bright variable range 1-R Sub-bright variable range 1-G, B Sub-bright variable range 2-R Sub-bright variable range 2-G, B –0.46 –0.36 –0.26 V Vbrt1, r BRIGHT: 3F Vbrt1, gb REFP Vsig Video In: Sig-V1 0.3 0.35 0.4 V 114 0.27 0.32 0.37 V 115 Vbrt2, r –0.38 –0.33 –0.28 V Vref 21 23 Vsig (BRIGHT: 1F) –Vsig 0.3 0.35 0.4 V –0.36 –0.31 –0.26 V 116 Vbrt2, bg 117 Vsbrt1, r SUB BRIGHT: 3F 19 21 23 19 21 23 118 Vsbrt1, gb 0.27 0.32 0.37 V 119 Vsbrt2, r SUB BRIGHT: 0 –0.38 –0.33 –0.28 V 120 Vsbrt2, gb –0.36 –0.34 –0.26 V —18— CXA1871S I2C bus system items No. 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 Item High level input voltage Low level input voltage High level input current Low level input current Low level output voltage During current inflow of 3 mA to SDA (Pin 41) SDA inflow current Input capacitance Clock frequency Data change minimum waiting time Data transfer start waiting time Low level clock pulse width High level clock pulse width Start preparation waiting time Data hold time Data preparation time Rise time Fall time Stop preparation waiting time Symbol Vih Vil Iih Iil Vol Iol Ci fscl tbuf thd;sta tlow thigh tsu;sta thd;dat tsu;dat tr tf tsu;sto Min. 3.0 0 — — 0 3 — 0 4.7 4.0 4.7 4.0 4.7 5 250 — — 4.7 Typ. — — — — — — — — — — — — — — — — — — Max. 5.0 1.5 10 10 0.4 — 10 100 — — — — — — — 300 300 — Unit V V µA µA V mA pF kHz µs µs µs µs µs µs ns ns ns µs —19— CXA1871S Signals Used for Measurements H system 63.556 µs SIG-H1 4.8 µs 0.57 V fH=15.734 kHz 61.98 µs SIG-H2 4.65 µs 0.57 V fH+400 Hz 65.21 µs SIG-H3 4.96 µs 0.57 V fH–400 Hz 59.759 µs SIG-H4 4.51 µs 0.57 V fH+1 kHz 67.870 µs SIG-H5 5.13 µs 0.57 V fH–1 kHz 62.563 µs SIG-H6 4.73 µs 0.57 V fH+250 Hz 64.583 µs SIG-H7 4.88 µs 0.57 V fH–250 Hz —20— CXA1871S V system Equivalent pulse 3 H Vsync3 H Equivalent pulse 3 H 1 H=63.556 µs SIG-V1 4.8 µs Equivalent pulse interval 1/ 2 H Vsync interval 1/ 2 H 2.5 µs fV = fH / 262 —21— CXA1871S Y system 1.7 µs 9.5 µs 1.43 V SIG-Y1 4.8 µs 0.57 V 0.7 V SIG-Y2 f = 3.58 MHz 1.7 µs SIG-Y3 9.5 µs 26 µs 1.43 V 4.8 µs 0.57 V 0.7 V SIG-Y4 f = 100kHz 0.7 V SIG-Y5 f = 3MHz —22— CXA1871S 0.7V SIG-Y6 f = 8MHz 0.28V SIG-Y7 f = 5 MHz 1.4V SIG-Y8 f = 5MHz 0.7V SIG-Y9 f = 9 MHz 0.14V SIG-Y10 6.6µs 9.8µs 1.43V SIG-Y11 4.8µs 0.57V 63.556µs —23— CXA1871S C system 63.556 µs SIG-H1 fH = 15.734 kHz 4.8 µs 0.57 V 1.7 µs 0.5 µs fsc+350 Hz fsc+100kHz, 0.1 Vp-p SIG-C1 0.5 Vp-p 3 µs fsc–350 Hz SIG-C2 0.5 Vp-p fsc+100 kHz, 0.1 Vp-p fsc0° SIG-C3 0.5 Vp-p fsc+90°, 0.3 Vp-p fsc-90°, 0.3 Vp-p 35.5 µs fsc0° SIG-C4 0.5 Vp-p fsc+0°, 0.3 Vp-p fsc+180°, 0.3 Vp-p 35.5 µs fsc SIG-C5 0.5 Vp-p fsc+100 kHz, 0.5 Vp-p 0 dB fsc SIG-C6 fsc+100 kHz, 1.0 Vp-p 6 dB 1 Vp-p —24— CXA1871S 63.556 µs SIG-H1 4.8 µs 0.57 V fH = 15.734 kHz 1.7 µs 0.5 µs fsc SIG-C7 50mVp-p 3µs fsc SIG-C8 32 mVp-p fsc+100 kHz, 50 mVp-p –20 dB fsc+100 kHz, 32 mVp-p –30 dB fsc SIG-C9 5 mVp-p fsc+100 kHz, 5 mVp-p –40 dB fsc SIG-C10 0.5 Vp-p fsc+500 kHz, 0.1 Vp-p fsc SIG-C11 0.5 Vp-p fsc–500 kHz, 0.1 Vp-p fsc0° SIG-C12 0.5 Vp-p fsc–13°, 0.96 Vp-p fsc+167°, 0.96 Vp-p 35.5 µs fsc0° SIG-C13 0.5 Vp-p fsc+104°, 1.36 Vp-p fsc–76°, 1.36 Vp-p 35.5 µs —25— CXA1871S RGB system 1.43 Vp-p 0.7 Vp-p SIG-R1 3 V or 5 V SIG-R2 5V 2.5 V SIG-R3 —26— CXA1871S Mesurement Method I2C Bus Register Initial Settings Register name PICTURE RGB LIM HUE IN SW COLOR SW GAIN BRIGHT NR ON SHARPNESS SUB CONT SUB HUE SUB COLOR SUB BRIGHT TRAP ON TOT ON PIX ON R ON G ON B ON PRE OVER AXIS BLACK DYCOL OFF REF ABL BLUE No. of bits 6 2 6 1 6 1 6 1 4 4 4 4 6 1 1 1 1 1 1 3 1 1 1 2 2 1 Initial setting 3 FH 3H 1 FH 0H 1 FH 0H 1 FH 0H 7H 7H 7H 7H 1 FH 0H 0H 1H 1H 1H 1H 0H 0H 0H 1H 1H 0H 0H Description Maximum value Maximum value Center value V1 IN selected Center value 0 dB gain Center value NR OFF Center value Center value Center value Center value Center value TRAP OFF TOT OFF Picture mute OFF R output ON G output ON B output ON Minimum value NTSC detective axis BLACK OFF DY COL OFF Center value Minimum value BLUE OFF Register name OSD G DRIVE DC TRAN B DRIVE GAMMA G CUTOFF B CUTOFF H PHASE V ON V EX OFF AFC V SHIFT HV COMP V SIZE C MODE V LIN SCORR SYSTEM1 SYSTEM2 SYSTEM3 SYSTEM4 SYSTEM5 X’TAL PIN DELAY 4.43X’TAL EXT COLOR No. of bits 1 5 3 5 3 4 4 4 1 1 2 5 3 6 1 4 4 1 1 1 2 1 2 2 1 1 Initial setting 0H FH 0H FH 0H 7H 7H 7H 1H 1H 1H FH 3H 1 FH 0H 7H 7H 1 0 0 0 0 2 0 0 0 Description Luminance level small Center value Minimum value Center value Correction OFF Center value Center value Center value VD output ON V sync expansion OFF Center value Center value Center value Center value Countdown ON Center value Center value Fixed mode 60 Hz 60 Hz NTSC 3.58 MHz Pin 4 Y Delay 0ns 3.58 MHz x’tal Identification switching —27— CXA1871S Electrical Characteristics Measurement Circuit 5V 47 µ 0.01 µ 1 12 p 12 p 12p 2.2 k SECAM REF R-Y OUT X PAL1 X PAL2 X NTSC APC VCC V1 IN V HOLD SW OUT B-Y OUT B-Y IN R-Y IN V SYNC H SYNC SCP SDA SCL REG IREF 48 47 1µ 46 1µ 45 2 2.2 k 3 2.2 k 470 p 10 k 4 5 330 44 220 k 43 560 VCC 9 V 0.47 µ 15 k 47 µ 0.01 µ 0.22 µ 1µ 6 7 330 k 4700 p 100 k 42 41 I 2C 40 4.7 µ 39 15 k 38 0.01 µ 37 5.6 k 2.2 µ 36 35 34 33 X RAY 0 V 32 2.2 k 31 0.1 µ film 30 0.22 µ film 29 4.7 µ 28 27 0/6V 26 25 0.22 µ ∗ Pin 18, 20, 22 and 24 switches are ON only for electrical characteristic measurements No. 106 to 109. 500 kHz ceramic oscillator 8 0.47 µ 9 2.2 k 0.22 µ 10 Y IN 3/5 V 0.47 µ 11 12 A PED CXA1871S C IN AFC CERA J GND HP XRAY HD V PLS V LPF V OSC ABL LPF VD ABL IN V2 IN 13 V GND 14 OSD BLK 15 OSD R 16 17 ∗ VDC 6.7 V OSD G OSD B 18 R S/H 19 ∗ 20 G S/H R OUT 21 G OUT ∗ 22 23 B S/H B OUT CRT DRIVE 24 IK ∗ 10 µ —28— HP GEN. 9/5 V 100 p 3.3 k 1H DELAY LINE C IN CXA1871S Reference Circuit CRT Drive Circuit 1.1 k 110 k 1.1 k 2SA 1175 2SC 2785 100 1k 110 k 1.1 k 2SA 1175 2SC 2785 2SC 2785 470 100 1k 110 k 2SA 1175 68 k to IK of the IC 2SC 2785 100 1k 2SC 2785 470 2SA1175 2SC 2785 470 GND 47 k +9 V from Pins R, G and B OUT of the IC HP Gen +9 V 10 k Pulse width 12 µ 6.8 k 1µ HP 6.8 k 16 15 14 13 12 11 10 0.022 µ 1000 p 3.3 k 9 4538 1 2 3 4 5 6 7 8 470 p 10 k Delay 10 µs HD 1H DELAY LINE R-Y OUT B-Y OUT B-Y IN R-Y IN +5 V 1000 P 16 15 1000 P 14 13 12 11 10 9 TDA4665 1 2 3 4 5 6 7 8 SCP —29— CXA1871S Application Circuit PAL/N or 4.43 MHz 1 ∗1 X'TAL ∗2 2.2 k 12 p SECAM REF X PAL1 X PAL2 X NTSC APC VCC V1 IN V HOLD SW OUT Y IN A PED C IN V GND OSD BLK OSD R OSD G OSD B R S/H R OUT G S/H G OUT B S/H B OUT IK R-Y OUT 48 B-Y OUT 47 1µ B-Y IN 46 1µ R-Y IN 45 330 1µ V SYNC 44 220 k H SYNC 43 560 4700 p SCP 42 220 SDA 41 SCL 40 REG 39 15 k IREF 38 0.01 µ AFC 37 5.6 k 2.2 µ CERA 36 J GND 35 1µ HP 34 XRAY 33 HD 32 100 p V PLS 31 0.1 µ film V LPF 30 0.22 µ film V OSC 29 4.7 µ ABL LPF 28 VD 27 1.5 k ABL IN 26 1µ V2 IN 25 10 k 500 kHz ceramic oscillator 220 4.7 µ I2 C 2 3 4 5 Color difference output to 1 H delay line PAL/M X'TAL 2.2 k 12 p NTSC X'TAL 2.2 k 12 p 470 p 0.47 µ 15 k +9 V Composite video 1 input 47 µ 0.01 µ 0.22 µ 330 k 0.47 µ 2.2 k 0.22 µ Color difference input from 1 H delay line 10 k 2.2 k 6 7 8 9 10 4.7 µ 11 12 13 220 14 220 15 Sand Cathle Pulse output H pulse input X-ray protection input 1µ H drive output V pulse output OSD inputs 220 16 220 17 0.1 µ film 18 220 19 0.1 µ film 20 RGB outputs 220 21 0.1 µ film 22 220 23 47 k 0.47 µ 24 100 V drive output ABL input Composite video 2 input 0.22 µ ∗ When 4.43 MHz XTAL is connected to Pin 2 change the capacitance of +1 to 10 pF and the resistor of ∗2 to 470 Ω, and then use them. Ik input 10 k 47 p Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —30— 100 p 3.3 k CXA1871S Description of Operation 1. Synchronizing and picture distortion correction systems The video signals (2 Vp-p standard) input to Pins 43 and 44 are led to the horizontal and vertical sync separation circuits for sync separation. This horizontal sync signal is compared with the signal obtained by 1/32 frequency dividing the 32 fh VCO output using the ceramic oscillator (frequency: 503.5 kHz) to detect a phase difference. The error voltage resulting from the phase difference is applied to the H oscillator after attenuating the medium and high frequency components by a lag-lead filter. The phase of the H oscillator output is compared and shifted to match the phase of the H deflection pulse (flyback pulse) input from Pin 34, and then output from Pin 32. After the vertical sync signal is synchronized to the input signal by the V countdown system, a sawtooth wave is generated by charging and discharging the capacitor attached externally to Pin 29. AGC is performed to ensure that the amplitude of the sawtooth wave output is maintained constant regardless of the vertical frequency of the input, after which the sawtooth wave passes through the picture distortion correction circuit and is output from Pin 27. Note that there is no need to adjust the free running frequency for either the H or V oscillator. When voltage of 3 V or more is applied to Pin 33, the H drive output is held at low level. A time constant circuit is included to protect against overvoltages, and H drive is output normally when high voltage input continues for less than 7 V cycles. To release holddown, the IC must be turned off and then started up again. BGP, HBLK and VBLK are output to Pin 42 as SCP (Sand Cathle Pulse). Note) If external capacitance of Pin 30 is used with 0.1 µF or less of the recommended value, vertical sync output may be unstable. When changing the capacitance value, use it with 0.047 µF or more. —31— CXA1871S 2. Y/C system The Y/C system has the following three input systems. Composite video input (1 Vp-p/2 Vp-p) → 2 systems (The gain can be switched between 0 and 6 dB for both systems.) Y/C separation input (2 Vp-p) → 1 system The Y signal (specified input level 2 Vp-p) input to Pin 10 is passed through the sub-contrast control, chroma trap (or delay line), delay line, sharpness control, noise reduction, clamp and auto pedestal circuits. The signal is then mixed with the color difference signal, passed through the clamp and Y/C MIX circuits again, and input to the RGB interface system block. Since a built-in chroma trap is provided, the video signal can be directly input. Trap frequency adjustment is not necessary as a dummy filter is provided inside the IC and feedback is applied using the 3.58 MHz or 4.43 MHz signal generated by a crystal oscillator for reference. When the chroma trap is off, the Y system frequency response is approximately 8 MHz, –3 dB for R, G and B outputs. Sharpness control is delay line type with a variable PRE/OVER ratio. Dynamic picture control consists of pulling in the signal below 40 IRE to the black side so that the signal black peak held by Pin 11 becomes the pedestal level. The chroma signal (specified input level, burst 570 mVp-p, or video signal 2 Vp-p) input to Pin 12 is passed through the ACC and TOT, and the burst only is set to the maximum gain by the B.G. This burst is then peak detected by ACC DET, level controlled by the I2C bus register, and fed back to the ACC again. When the B.G. output burst signal is smaller than a certain level, killer turns on, the chroma signal is replaced with DC by the B.G., and the color gain is set to the minimum. The burst signal is detected using the VCO oscillation output which has received hue control as the carrier, and a signal (the R-Y axis sub-carrier due to chroma demodulation) whose phase is offset 90° from the burst signal is generated. During PAL input, this sub-carrier is inverted 180° every 1 H and output. The phase is not inverted during NTSC input. The chroma signal is demodulated into the color difference signals R-Y and B-Y by this sub-carrier. The signal is set to 6 dB during NTSC input, or passed through the 1 H delay line and set to 0 dB during SECAM and PAL input, after which it is input to the matrix circuit where the G-Y color difference signal is generated. Then, the color difference signals are passed through the Y/C MIX circuit, and input together with the Y signal to the RGB interface system block. The detective axis (NTSC/PAL) can be switched by the I2C bus register. NTSC or PAL input is automatically identified and output to the status register. In addition, during PAL input, the phase relationship between the burst and R-Y sub-carrier is detected. If a phase error is detected at this time, it is corrected by applying feedback to the flip flop. —32— CXA1871S 3. RGB interface system YS/YM switching is performed according to the amplitude of the OSD RGB input blanking signal input from Pin 14. 0 to 1.5 V → TV (Y/C input) 1.5 to 3.5 V → TV –6 dB 3.5 to 5.5 V → Black The R, G and B signals of the Y/C system pass through the RGB switch (BLUE and BLACK ON/OFF) and receive picture control. These signals are mixed with the digital R, G and B signals (specified input level 0 to 5 V DC) input from Pins 15, 16 and 17, passed through the dynamic color, gamma correction, bright control, drive adjustment (R channel is fixed, G and B channels are variable.), cut-off adjustment (R channel is fixed, G and B channels are variable.) and auto cut-off DC level shift circuits, and then output from Pins 19, 21 and 23 as the R, G and B signals. The RGB output amplitude has a limit voltage whose setting value can be controlled with the I2C bus register. The digital R, G and B signals are mainly used for on screen display of channels, etc. and the display level can be set with the I2C bus register. The signal input to Pin 26 (ABL IN) is compared with the internal reference voltage and is then integrated by the capacitor connected to Pin 28 (ABL LPF) for picture and brightness control. Picture ABL mode and combined picture ABL and brightness ABL mode can be switched with the I2C bus register. Note) When the digital R, G and B signals and OSDBLK signal are not used, connect Pins 14, 15, 16 and 17 to GND. Auto cut-off For white balance, drive control (gain control between R, G and B outputs) and cut-off control (black side DC level control) are involved. This IC uses the I2C bus register for drive control. For cut-off control, a loop is formed between the IC and CRT to achieve auto cut-off control. This auto cut-off arrangement makes it possible to compensate for CRT changes with time. To absorb the CRT variance, the cut-off voltages of the G and B outputs are adjusted by the I2C bus register. The auto cut-off loop is configured as described below. (1) R, G and B reference pulses for auto cut-off, shifted 1H each in the order mentioned, are added to the top of the picture. (2) The IK of each of the R, G and B outputs is converted to a voltage and input to Pin 24. (3) The voltage input to Pin 24 is compared with the reference voltage in the IC to change the DC level of the reference pulses. The loop mentioned above determines the shift level of the R, G and B outputs and lets the capacitances connected to Pins 18, 20 and 22 hold the DC shift level during the 1 V period. If the voltage at any one of Pins 18, 20 and 22 is less than 4.2 V, the status register IK (bit 6) becomes “1”. Use this information to blank the R, G and B outputs with the I2C bus register. The positions of the reference pulses can be changed by the I2C bus register. —33— CXA1871S System Identification Method (when 443XTAL = 0) fSC fH fV PIN NO. Conditions for locking the system to this pin Conditions for releasing the lock PAL/N 3582056 15625 [Hz] [Hz] 50 [Hz] Pin 2 PAL/M 3575611 15734 [Hz] [Hz] 60 [Hz] Pin 3 NTSC 3579545 15734 [Hz] [Hz] 60 [Hz] Pin 4 (1) KILLER=ON (1) KILLER=ON (2) When NT/PAL identification (2) 50/60 identification result result changes from PAL to = 50 Hz∗1 NTSC∗2 (1) KILLER=ON (2) When NT/PAL identification result changes from PAL to (1) KILLER=OFF NTSC∗2 (3) When 50/60 identification result changes from 60 to 50 (1) KILLER=ON (1) KILLER=OFF (2) When 50/60 identification result changes from 60 to 50 ∗1 When the 50/60 identification result changes from 60 Hz to 50 Hz, pin switching is performed until the system is locked to Pin 2. However, when the 50/60 identification result changes from 50 Hz to 60 Hz, identification is ignored. ∗2 NTSC→PAL = Don’t care System Identification Method (when 443XTAL = 1) fSC fH fV PIN NO. Conditions for locking the system to this pin Conditions for releasing the lock 4.43/PAL 4433619 15625 [Hz] [Hz] 50 [Hz] Pin 2 4406250 15625 SECAM 4250000 [Hz] [Hz] 4.43 NTSC 4433619 15734 [Hz] [Hz] 50 [Hz] (1) KILLER=ON (1) KILLER=ON (2) When NT/PAL identification (2) 50/60 identification result result changes from PAL to = 50 Hz∗1 NTSC∗2 (1) KILLER=ON (1) When any one of the (2) 50/60 identification result conditions to the left is not = 50 Hz∗1 met (3) SECAM ID=ON (1) KILLER=OFF (1) KILLER=ON (1) KILLER=ON (2) When NT/PAL identification result changes from PAL to NTSC∗2 (3) When 50/60 identification result changes from 60 to 50 (1) KILLER=ON (2) When 50/60 identification result changes from 60 to 50 60 [Hz] PAL/M 3575611 15734 [Hz] [Hz] 60 [Hz] Pin 3 (1) KILLER=OFF NTSC 3579545 15734 [Hz] [Hz] 60 [Hz] Pin 4 (1) KILLER=OFF ∗1 When the 50/60 identification result changes from 60 Hz to 50 Hz, pin switching is performed until the system is locked to Pin 2. However, when the 50/60 identification result changes from 50 Hz to 60 Hz, identification is ignored. 2 NTSC→PAL = Don’t care ∗ —34— CXA1871S Definition of I2C Bus Registers Slave addresses 88H: Slave Receiver 89H: Slave Transmitter Register table • All registers are set to 0 when the IC power is turned on. • “X” indicates “don’t care”; “∗” indicates undefined. Control registers Sub bit 7 Address XXX00000 XXX00001 XXX00010 XXX00011 XXX00100 XXX00101 XXX00110 XXX00111 XXX01000 XXX01001 XXX01010 XXX01011 XXX01100 XXX01101 XXX01110 XXX01111 XXX10000 XXX10001 SYSTEM1 V LIN SYSTEM2 SYSTEM3 4.43X’TAL SYSTEM4 EXT COLOR ∗ PIX ON BLACK R ON DY COL OFF G DRIVE B DRIVE G CUTOFF H PHASE VSHIFT V SIZE S CORR SYSTEM5 ∗ ∗ X’TAL PIN ∗ V ON SHARPNESS SUB HUE SUB BRIGHT G ON REF B ON PRE OVER ABL BLUE DC TRAN GAMMA B CUTOFF VEX OFF HV COMP 0 C MODE AFC PICTURE HUE COLOR BRIGHT SUB CONT SUB COLOR TRAP ON TOT ON AXIS OSD ∗ ∗ ∗ RGB LIM IN SW SW GAIN NR ON bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 DELAY Status register bit 7 H LOCK bit 6 IK bit 5 KILLER bit 4 XRAY bit 3 NT/PAL bit 2 50/60 bit 1 VCO-F bit0 SECAM —35— CXA1871S Description of I2C Bus Registers Sub Address 00000 PICTURE (6) Picture control 0 = Minimum 63 = Maximum RGB LIM (2) RGB output amplitude limiter voltage control 0 = Limited at 4.9 V (with a black level of 2 V) 1 = Limited at 5.1 V (with a black level of 2 V) 2 = Limited at 5.3 V (with a black level of 2 V) 3 = Limited at 5.5 V (with a black level of 2 V) Sub Address 00001 HUE (6) Hue control 0 = Skin color nearer to red 63 = Skin color nearer to green IN SW (1) 0 = V1 IN 1 = V2 IN Sub Address 00010 Input selector switch COLOR (6) Color control 0 = Minimum 63 = Maximum SW GAIN (1) SW output gain switching 0 = SW GAIN 0dB 1 = SW GAIN 6dB Sub Address 00011 BRIGHT (6) Brightness control 0 = Minimum 63 = Maximum NR ON (1) 0 = OFF 1 = ON Y signal noise reduction ON/OFF Sub Address 00100 SHARPNESS (4) Sharpness control 0 = Minimum 15 = Maximum SUB CONT (4) Sub-contrast control 0 = Minimum 15 = Maximum —36— CXA1871S Sub Address 00101 SUB HUE (4) Hue center control 0 = Skin color nearer to red 15 = Skin color nearer to green SUB COLOR (4) Color center control 0 = Minimum 15 = Maximum Sub Address 00110 SUB BRIGHT (6) Sub-bright control 0 = Minimum 63 = Maximum TRAP ON(1) 0 = OFF 1 = ON TOT ON (1) 0 = OFF 1 = ON Chroma trap in Y system ON/OFF Chroma TOT filter ON/OFF Sub Address 00111 PIX ON (1) Picture mute ON/OFF 0 = Picture mute (Auto cut-off reference pulse also muted.) 1 = Picture mute released. R ON (1) R OUT ON/OFF 0 = R OUT OFF 1 = R OUT ON G ON (1) G OUT ON/OFF 0 = G OUT OFF 1 = G OUT ON B ON (1) B OUT ON/OFF 0 = B OUT OFF 1 = B OUT ON PRE OVER (3) Sets the sharpness preshoot and overshoot ratio. 0 = Pre Shoot 100 %, Over shoot 0 % 7 = Pre Shoot 25 %, Over shoot 75 % AXIS(1) 0 = NTSC 1 = PAL Detective axis switching —37— CXA1871S Sub Address 01000 BLACK (1) 0 = OFF 1 = ON Blanks the Y IN/C IN signals and sets the R, G and B outputs to black level. DY COL OFF (1) Dynamic color ON/OFF 0 = Dynamic color ON 1 = Dynamic color OFF REF (2) 0 = B-18H 1 = B-20H 2 = B-22H 3 = B-24H Switches the auto cut-off reference pulse position. G-19H R-20H G-21H R-22H G-23H R-24H G-25H R-26H ABL (2) ABL mode setting 0 = Picture ABL mode (including protective bright ABL) 1 = Combined picture ABL and bright ABL mode (bright ABL low) 2 = Combined picture ABL and bright ABL mode (bright ABL medium) 3 = Combined picture ABL and bright ABL mode (bright ABL high) BLUE (1) 0 = OFF 1 = ON OSD (1) On screen display luminance setting 0 = Level small 1 = Level large Sub Address 01001 G DRIVE (5) G OUT drive control 0 = Minimum 31 = Maximum DC TRAN (3) DC transmission ratio setting 0 = Maximum (100 %) 7 = Minimum (75 %) Sub Address 01010 B DRIVE (5) B OUT drive control 0 = Minimum 31 = Maximum GAMMA (3) γcorrection value setting 0 = Correction OFF 7 = Maximum correction —38— On screen display B IN ON/OFF. Setting to ON turns the entire screen BLUE. CXA1871S Sub Address 01011 G CUTOFF (4) G OUT cut-off voltage control 0 = Minimum 15 = Maximum B CUTOFF (4) B OUT cut-off voltage control 0 = Minimum 15 = Maximum Sub Address 01100 HPHASE (4) Horizontal position control 0 = Screen shifted to right 15 = Screen shifted to left V ON(1) VD output ON/OFF 0 = VD output stopped. (Picture mute applied simultaneously. Auto cut-off reference pulse also muted.) 1 = VD output V EX OFF (1) V sync expansion ON/OFF 0 = V sync expansion ON 1 = V sync expansion OFF AFC (2) AFC loop gain switching 0 = AFC loop gain large 1 = AFC loop gain medium 2 = AFC loop gain small 3 = AFC loop open, free running mode Sub Address 01101 V SHIFT (5) 0 = Rise 31 = Lower Vertical position control HV COMP (3) Vertical correction amount setting for high voltage fluctuations 0 = Correction amount minimum 7 = Correction amount maximum Sub Address 01110 V SIZE (6) Vertical amplitude control 0 = V size minimum 63 = V size maximum C MODE (1) V countdown system mode switching 0 = Non-standard signal mode, standard signal mode and no signal mode switched automatically. 1 = Fixed to non-standard signal mode (wide V sync window mode). —39— CXA1871S Sub Address 01111 V LIN (4) Vertical linearity control 0 = Top of screen compressed, bottom of screen expanded. 15 = Top of screen expanded, bottom of screen compressed. S CORR (4) Vertical S correction control 0 = S correction amount minimum 15 = S correction amount maximum —40— CXA1871S Sub Address 10000 SYSTEM1(1) Selects the internal mode switching method. 0 = Automatic switching 1 = Fixed according to the bus data (When ∗ 1 is selected, the SYSTEM3 to 5 and X’TAL PIN registers below must be designated.) SYSTEM2 (1) Selects the V cycle when sync cannot be obtained if automatic switching is selected by SYSTEM1. 0 = Outputs 60 Hz pulses when sync cannot be obtained. 1 = Outputs 50 Hz pulses when sync cannot be obtained. Selects the V cycle. SYSTEM3(1) 0 = 60 Hz 1 = 50 Hz SYSTEM4 (2) Inputs the input signal broadcast system. 0 = NTSC 1 = PAL 2 = SECAM 3 = SECAM SYSTEM5 (1) Selects the VCO frequency 0 = 3.58 MHz 1 = 4.43 MHz X'TAL PIN (2) 0 = Pin 2 1 = Pin 3 2 = Pin 4 3 = Pin 4 4.43X'TAL (1) Selects which of the crystals connected to the various pins to use. Inputs whether the crystal connected to Pin 2 is 3.58 MHz or 4.43 MHz. (When connecting a 4.43 MHz crystal, be sure to connect it to Pin 2.) 0 = 3.58 MHz 1 = 4.43 MHz EXT COLOR (1) Forcibly switches the DET SW input to external input (R-Y IN, B-Y IN). 0 = Switched according to the NTSC/PAL identification results 1 = External input Sub Address 10001 DELAY (2) 0 = 0 ns 1 = 40 ns 2 = 80 ns 3 = 120 ns Allows the following delay times to be added to the Y signal. —41— CXA1871S H LOCK (1) Returns whether the H oscillator of the IC and the signal input to H SYNC are locked. 0 = Not locked 1 = Locked IK (1) Returns the AKB loop stable status by detecting the IK current. 0 = IK current stable for each of R, G and B 1 = IK current unstable KILLER (1) Returns the color killer ON/OFF status. 0 = OFF 1 = ON XRAY(1) Returns the X-ray protection status. 0 = OFF (X-ray protection is not functioning.) 1 = ON (X-ray protection is functioning.) NT/PAL (1) Identifies whether the input signal is NTSC or PAL and returns the results. 0 = NTSC 1 = PAL 50/60 (1) Returns the 50/60 Hz identification results. 0 = 60 Hz 1 = 50 Hz VCO-F (1) Detects the burst frequency of the input signal and returns the results. 0 = 3.58 MHz 1 = 4.43 MHz SECAM (1) Identifies whether the input signal is SECAM or a different signal and returns the results. —42— CXA1871S 8.0 2.0 6.0 TOT SW = 1 0 4.0 Attenuation (dB) –2.0 2.0 (dB) –4.0 TOT SW = 0 0 –2.0 –6.0 –8.0 –4.0 –6.0 0 1 2 3 4 5 SHARPNESS = F SHARPNESS = 7 SHARPNESS = 0 –10.0 6 7 8 Frequency (MHz) –800 –600 –400 –200 0 200 400 600 800 Fig 1. Sharpness characteristics Fig 2. Chroma frequency characteristics ∆fsc (kHz) fsc = 3.58MHz Output amplitude (black to white) (Vp-p) 0 Attenuation (dB) –10 1.0 –20 TRAPSW = 0 TRAPSW = 1 0.5 Input: IRE changed at Full Flat Output: R OUT DYCOL= AKB=OFF GAMMA=DCTRAN=0 –30 0 1 2 3 4 5 6 7 8 Fig 3. Trap F0 frequency characteristics Input frequency (MHz) 0 10 20 30 40 50 60 Fig 4. Auto pedestal characteristics Input amplitude (IRE) Output amplitude (Vp-p) 2.0 1.0 GAMMA = 7 GAMMA = 3 GAMMA = 0 0 20 40 60 80 100 Fig 5. Gamma characteristics Input amplitude (IRE) —43— CXA1871S Output amplitude (black to white) (Vp-p) 3.0 Gch = Bch = +1.5dB 1.0 +3.0dB Rch = 0.86 Vp-p Gch = Bch = –4.5dB 2.0 Input: Y IN 1.4Vp-p (black to white) Output: adjust to be 2.5Vp-p at R OUT IK level (Vp-p) 2.5 –8.3dB Input: Y IN all black 0.5 AKB = ON Output: IK (Pin 21) 1.5 DYCOL = AKB = OFF DCTRAN = 0 0 7 F 17 1F G, B drive data (HEX) 0 5 A F G, B cutoff data (HEX) Fig 6. G, B drive characteristics Fig 7. Cutoff control characteristics 3.0 Output amplitude (black to white) (Vp-p) 1.4 VD-output amplitude (Vp-p) 2.0 1.35 Input: YIN 1.4Vp-p (black to white) Output: ROUT 1.0 SUBCONT = 7 DYCOL = AKB = OFF DCTRAN = 0 Output: VD (Pin 24) HV COMP = 7 1.3 Variable range 14.7dB 0 2 4 6 8 10 ABL IN Applied voltage (V) 0 8 10 18 20 28 30 38 3F Fig 8. HV COMP characteristics Fig 9. Picture control data (HEX) —44— CXA1871S Output amplitude (white to black) (Vp-p) 2.0 ABL=3 1.6 ABL=0 Output black lebel (V) 1.4 ABL=0 ABL=3 1.0 1.2 Input YIN 1.4Vp-p (black to white) Output ROUT 1.0 0 1 2 3 4 5 6 7 8 9 ABL-FIL applied voltage (V) 0 1 2 3 4 5 6 7 8 9 Fig 10. ABL characteristics (picture) Fig 11. ABL characteristics ABL-FIL (bright) applied voltage (V) 3.0 3.0 Input YIN 1.4Vp-p (black to white) Output ROUT Output level (Vp-p 2.0 OSD = 0 Output amplitude (black to white) (Vp-p OSD = 1 2.0 PIC = 3F SUBCONT = 7 AKB = OFF 1.0 1.0 –5.7dB Input OSDR Output ROUT 100IRE = 2.5Vp-p 0 1 2 3 4 5 6 OSDR applied voltage (V) 0 1.0 2.0 3.0 4.0 5.0 OSD-BLK applied voltage (V) Fig 12. OSD RGB I/O characteristics Fig 13. OSD-BLK voltage —45— CXA1871S Package Outline Unit : mm 48PIN SDIP (PLASTIC) + 0.1 5 0.0 0.25 – 25 + 0.4 43.2 – 0.1 48 15.24 + 0.3 13.0 – 0.1 0° to 15° 1 1.778 24 0.5 ± 0.1 0.9 ± 0.15 Two kinds of package surface: 1.All mat surface type. 2.Center part is mirror surface. PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 5.1g SONY CODE EIAJ CODE JEDEC CODE SDIP-48P-02 SDIP048-P-0600 —46— 3.0 MIN LEAD TREATMENT LEAD MATERIAL PACKAGE MASS + 0.4 4.6 – 0.1 0.5 MIN