CXA2002

CXA2002R 2-channel Recording/Playback Amplifier Description The CXA2002R is a bipolar IC developed as recording/playback amplifiers for Hi8 VCRs. Features • Recording/playback system • Wideband recording/playback amplifier for Hi8 VCR • Supports electronic volume (EVR) control (3V) • Recording system • Recording amplifier feedback dumping circuit and its EVR control function facilitates printed circuit board design. • Five-input (Y, chroma, AFM, ATF and PCM) mix amplifier and EVR control function of Y and lowband recording level • Ramp circuit for the recording amplifier output bias current • Playback system • Playback amplifier feedback dumping circuit facilitates printed circuit board design. • Middle-band compensation circuit (middle tune) and independent adjustments of the center frequency, Q and boost by EVR • RFAGC and dropout detection circuits Absolute Maximum Ratings • Supply voltage VCC 7 • Operating temperature Topr –10 to +75 • Storage temperature Tstg –65 to +150 • Allowable power dissipation PD 1100 (when mounted on the printed circuit board) Recommended Operating Condition • Supply voltage • Vcc EVR voltage 48 pin LQFP (Plastic) Application 8 mm VCR Structure Bipolar silicon monolithic IC V °C °C mW 4.75 +0.5 –0.25 3.15 ±0.15 V V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E95201-ST CXA2002R Block Diagram RAMPCONT BOTH REC PCMOUT RFSWP RP PB VCC 24 23 22 21 20 19 18 17 16 15 14 13 VCC1 25 1CH REC1CONT 26 REC REC1OUT 27 40dB PB1IN 28 HEAD 15dB 2CH V/I 1CH MUTE VIDEOSW GND1 29 RF AGC PBDUMP1 30 VPSW1 VIDEO PBDUMP2 31 PCM 15dB 6 7 AGCDET 8 DOCDET 9 M·T –6dB 12dB 10 RAMP GEN 2CH MUTE PCMSW 12 VCC EVR RAMP MTF0 MTQ MTG MTOUT DOP 11 DOCDET RFAGCIN RFAGCTC RFAGCOUT YLEVEL YIN GND2 32 HEAD 40dB 5 LOWLEVEL PB2IN 33 V/I REC2OUT 34 REC RAMP GEN REC2CONT 35 VPSW2 VIDEO 1 PCM YGCA 1 LOWGCA CGCA 1 4 CIN 1 1 3 AFREC 1 2 2 LOWGCA AFMIN VCC2 36 1 CCONT 37 38 39 40 41 42 43 44 45 46 47 48 IR1 PCMREC VG2 RECPCM VPVTRIN RECVIDEO VPPCMIN –2– PCMIN ATFIN VREG GND IR CXA2002R Pin Description Pin No. Symbol Pin voltage Equivalent circuit Description 25k 10k 1 CCONT — 7k 7k 1 50k 143 15k EVR adjusting pin for the recording chroma level. Increasing the applied voltage reduces the gain. 70µ 20p 143 2 50k 2 AFMIN — Input pin for recording AFM. DC component is cut by built-in C. Input level: 125mVp-p (typ.) 35µ 35µ 35µ 3 AFREC — 143 1.5V 3 After-recording mode switchover pin (High: Afterrecording) H: 2.3V or above L: 0.6V or below 70µ 143 4 CIN 2.45 50k 2.45V 4 Recording chroma input pin. Input after cutting DC component with C. Input level: 300mVp-p (typ.) –3– CXA2002R Pin No. Symbol Pin voltage Equivalent circuit Description 25k 10k 5 LOWLEVEL — 7k 7k 5 50k 143 15k EVR adjusting pin for recording RF. Increasing the applied voltage reduces the gain. Simultaneous adjustment of VIDEO and PCM paths. VIDEO path: C+AFM+ATF adjustment PCM path: ATF adjustment 40µ 143 6 50k 2.45V 6 YIN 2.45 Recording Y input pin. Input after cutting DC component with C. Input level: 500mVp-p (typ.) 25k 10k 7 50k 143 15k 7 YLEVEL — 7k 7k EVR adjusting pin for the recording Y signal level. Increasing the applied voltage reduces YLEV. 40µ 8 RFAGCOUT 2.8 600µ 410µ 8 Playback Y signal output pin. Output level: 410mVp-p (typ.) –4– CXA2002R Pin No. Symbol Pin voltage Equivalent circuit Description 4700p 9 470k 143 Vcc 9 RFAGCTC — 9 25µ 25µ 50µ 50µ ( Pin to apply time constant of RFAGC. EVR adjustment of RFAGC gain is possible. Adjustment range: 2.5V to 4.75V Gain: Small to Large ) 13p 143 10 RFAGCIN — 50k 50µ 3.25V 10 RFAGC input pin for the playback Y signal. Playback VIDEO signal output to Pin 14 (MTOUT) is input again to Pin 10 (RFAGCIN) via external ATF TRAP, AFM TRAP and C TRAP. DC component is cut by built-in C. 4.15V 47k 143 11 DOCDET 2.5 79k 50µ 11 Pin to determine the dropout detection level. 150 12 12 DOP H: 3.15 L: 0 3.15V 2.4k Output pin for the dropout detection signal. High upon dropout. 1.3m –5– CXA2002R Pin No. 13 Symbol VCC EVR Pin voltage 3.15 Equivalent circuit Description Power supply pin for EVR block. 40µ 14 MTOUT 2.4 400µ 330µ 14 Output pin for playback VIDEO signal. Y + C + AMF + ATF is output. 25k 10k 15 MTG — 7k 7k 15 50k 143 15k EVR adjusting pin for the middle-tune boost. Increasing the applied voltage reduces the boost. 40µ 16 PCMOUT 2 3.5k 360µ 310µ 16 Output pin for playback PCM 25k 10k 17 MTF0 — 7k 7k 17 50k 143 15k EVR adjusting pin to determine middle-tune fo. Increasing the applied voltage increases fo. –6– CXA2002R Pin No. Symbol Pin voltage 35µ Equivalent circuit Description 35µ 35µ 6.1k 50k 18 RP PB — 18 143 REC/PB switchover pin High: PB 2.3V or above Low: REC 0.6V or below 1.5V 19 VCC 4.75 Power supply pin for components other than REC amplifier, PB amplifier and EVR. 35µ 35µ 35µ 20 BOTH REC — 143 20 EACH REC/BOTH REC switchover pin. High: BOTH REC 2.3V or above Low: EACH REC 0.6V or below 1.5V 35µ 35µ 35µ 21 RFSWP — 21 143 RFSWP input pin. High: 2.3V or above Low: 0.6V or below 1.5V 35µ 35µ 35µ 22 RAMP — 143 22 1.5V Pin to turn ON/OFF the REC amplifier bias current during after-recording. The bias current turns ON when this pin goes high. High: 2.3V or above Low: 0.6V or below –7– CXA2002R Pin No. Symbol Pin voltage Equivalent circuit Description 35µ 35µ 35µ 23 RAMPCONT — 143 23 Ramp pulse rising slope switchover pin. Low: 32µA/µs 0.6V or below High: 17µA/µs 2.3V or above (The fall time is 32µA/µs in both cases.) 1.5V 25k 10k 24 MTQ — 24 50k 143 15k 7k 7k EVR adjusting pin to determine middle-tune Q. Increasing the applied voltage increases Q. 25 VCC1 4.75 Power supply pin for CH1 REC amplifier and PB amplifier. 270 34k 26 REC1CONT — 71k 66k 143 26 EVR adjusting pin for the CH1 recording dumping level. Reducing the applied voltage strengthens dumping. 40µ 12k 27 40µ 27 REC1OUT — CH1 recording output pin. Open collector. 5.7k 1k 30 –8– CXA2002R Pin No. Symbol Pin voltage Equivalent circuit 1.2m 2.5k Description 28 PB1IN 0.7 28 1.5V CH1 playback input pin. 29 GND1 0 GND pin for CH1 REC amplifier and PB amplifier. 120µ 270 30 30 PBDUMP1 2.5 4k 4k 130µ 120µ 270 31 40µ 4k Pin to determine the dumping of CH1 playback by external resistance. Increasing resistance strengthens dumping. 31 PBDUMP2 2.5 4k 4k 130µ 40µ Pin to determine the dumping level of CH2 playback by external resistance. Increasing resistance strengthens dumping. 4k 32 GND2 0 GND pin for CH2 REC amplifier and PB amplifier. –9– CXA2002R Pin No. Symbol Pin voltage Equivalent circuit 1.2m 2.5k Description 33 PB2IN 0.7 33 1.5V CH2 playback input pin. 12k 34 34 REC2OUT — 5.7k CH2 recording output pin. Open collector. 1k 270 34k 30 35 REC2CONT — 71k 66k 143 35 EVR adjusting pin for the CH2 recording dumping. Reducing the applied voltage strengthens dumping. 40µ 40µ 36 VCC2 4.75 Power supply pin for CH2 REC amplifier and PB amplifier. 20µ 143 37 37 VPPCMIN 2.45 50k 40µ 2.45V VPSW input pin for recording PCM path. The Pin 38 signal is input after cutting its DC component with external C. – 10 – CXA2002R Pin No. Symbol Pin voltage Equivalent circuit Description 25µ 38 RECPCM 2.4 6k 220µ 180µ 38 Output pin for the recording PCM path. The recording PCM signal and the recording ATF signal are mixed and output. 10k 39 VREG 4.15 39 5p 4.15V regulator output pin. 20µ 143 40 40 VPVTRIN 2.45 50k 40µ 2.45V VPSW input pin for the recording VIDEO path. The Pin 41 signal is input after cutting its DC component with external C. 40µ 41 RECVIDEO 2.4 6k 220µ 300µ 41 Output pin for the recording VIDEO path. The recording (Y + C + AFM + ATF) mix signal is output. – 11 – CXA2002R Pin No. 42 Symbol Pin voltage 0 Equivalent circuit Description GND pin for all components other than REC amplifier and PB amplifier. GND 43 IR1 1.9 40k 1k 20k 40µ 4.15V 43 Pin to determine REC amplifier gain. The reference current is produced by connecting 15kΩ between this pin and GND. 40k 44 IR 1.9 40k 1k 20k 40µ 4.15V 44 Pin to produce the reference current for the middle tune, dropout detector and ramp. Connect 18kΩ between this pin and GND. 42k 270 34.5k 45 VG2 2.45 45 20k 2.45V internal reference voltage source. 49k 75µ 4k 4.15V 70µ 143 46 50k 2.45V 46 PCMIN 2.45 Recording PCM input pin. Input after cutting DC component with C. Input level: 300mVp-p (typ.) – 12 – CXA2002R Pin No. Symbol Pin voltage Equivalent circuit Description 35µ 35µ 35µ 47 PCMREC — 143 47 PCM recording switchover pin. PCM recording is performed when this pin goes high. High: 2.3V or above Low: 0.6V or below 1.5V 70µ 143 48 50k 2.45V 48 ATFIN 2.45 Recording ATF input pin. Input after cutting DC component with C. Input level: 125mVp-p (typ.) – 13 – Electrical Characteristics ∗ See the Control Logic Truth Table for control logic conditions. (Vcc = 4.75V, VccEVR = 3.15V, Ta = 25°C. See the Electrical Characteristics Measurement Circuit.) Measurement conditions Symbol Measurement method Min. Typ. Max. Input pin Level Frequency — — IC internal current during playback. IC internal current (including REC amplifier output bias current) during after-recording. Measure the pin voltage. Measure the pin voltage. 45 3.95 2.30 — — — A 45 A 39 I IVCC1+ IVCC2 G 26 IVCC1+ IVCC2 37 64 4.15 2.45 A 33 47 IVCC1+ IVCC2 IC internal consumption current (including REC amplifier output bias current) during switched recording. 61 48 83 4.35 2.60 IREC IPB IAFREC VREG VG2 — — — — — — — — — — Input condition Measurement Control point, ammeter logic name Unit mA mA mA V V No. Item 1 Current consumption for recording 2 Current consumption for playback 3 Current consumption for afterrecording 4 VREG pin voltage 5 VG2 pin voltage Recording system GYmin GYcen GYmax VFY DY GlVmin 2 125mVpp 1.7MHz A 6 500mVpp 7MHz A 41 41 6 500mVpp 14MHz, 300kHz A 41 6 200mVpp 300kHz A 41 6 500mVpp 300kHz A 41 6 500mVpp 300kHz A 41 Pin 7 (YLEVEL) = 3.15V Adjust Pin 7 (YLEVEL) so that Pin 41 (RECVIDEO) output level becomes 200mVp-p → VYLEV Pin 7 (YLEVEL) = 0.0V 14MHz level/300kHz level Pin 7 (YLEVEL) = VYLEV Pin 7 (YLEVEL) = VYLEV Pin 5 (LOWLEVEL) = 3.15V Pin 7 (YLEVEL) = VYLEV — — –3.6 –1.5 — — –23.2 –8.0 –1.3 –0.5 –55 –30.4 –14.1 — — +0.5 — –26.0 dB dB dB dB dB dB – 14 – GlVcen 2 125mVpp 1.7MHz A 41 GlVmax 2 2 DAFM 125mVpp 1.7MHz 125mVpp 1.7MHz A A 41 41 6 Y signal GCA min. gain 7 Y signal GCA center gain 8 Y signal GCA max. gain 9 Y signal GCA frequency response (center gain) 10 Y signal GCA secondary distortion (center gain) 11 Low-band signal GCA (VIDEO path) min. gain 12 Low-band signal GCA (VIDEO path) center gain Adjust Pin 5 (LOWLEVEL) so that Pin 41 (RECVIDEO) output level becomes 12.5mVp-p → VILEV Pin 7 (YLEVEL) = VYLEV Pin 5 (LOWLEVEL) = 0.0V Pin 7 (YLEVEL) = VYLEV Pin 5 (LOWLEVEL) = 0.0V Pin 7 (YLEVEL) = VYLEV — –20 — dB 13 Low-band signal GCA (VIDEO path) max. gain –14.0 — –11.6 –55 — — dB dB CXA2002R 14 AFM path secondary distortion Measurement conditions Symbol Measurement method Min. Typ. Max. Unit Input pin Level Frequency A A Pin 5 (LOWLEVEL) = 3.15V Pin 5 (LOWLEVEL) = 0.0V Pin 5 (LOWLEVEL) = VlLEV Pin 7 (YLEVEL) = VYLEV Pin 1 (CCONT) = 3.15V — –14.0 A A 41 38 38 — –30.7 –11.9 –26.4 41 Pin 5 (LOWLEVEL) = 0.0V Pin 7 (YLEVEL) = VYLEV –14.0 –11.6 — –26.0 — –21.6 GVATF 48 48 48 4 300mVpp 300kHz 125mVpp 100kHz 125mVpp 100kHz GPATF1 GPATF2 Gcmin 125mVpp 100kHz Input condition Measurement Control point, ammeter logic name dB dB dB dB No. Item 15 ATF (VIDEO path) max. gain 16 ATF (PCM path) min. gain 17 ATF (PCM path) max. gain 18 Chroma signal GCA min. gain 19 Gccen 4 Chroma signal GCA center gain 300mVpp 300kHz A 41 Adjust Pin 1 (CCONT) so that Pin 41 (RECVIDEO) output level becomes 50mVp-p→VCLEV Pin 5 (LOWLEVEL) = VlLEV Pin 7 (YLEVEL) = VYLEV Pin 5 (LOWLEVEL) = VlLEV Pin 7 (YLEVEL) = VYLEV Pin 1 (CCONT) = 0.0V — –15.6 — dB – 15 – Gcmax 4 300mVpp 300kHz A 41 VFC 4 2MHz 300mVpp 300kHz A 41 DC GP VFP DP IB1 — IB2 — — A IB2 46 300mVpp 46 300mVpp 14MHz 300kHz 7MHz 46 300mVpp 300kHz A A A B 4 300mVpp 750kHz A 41 38 38 38 IB1 20 Chroma signal GCA max. gain –13.3 –10.5 — dB 21 Chroma signal GCA frequency response (center gain) Pin 5 (LOWLEVEL) = VlLEV Pin 7 (YLEVEL) = VYLEV Pin 1 (CCONT) = VCLEV 2MHz level/300kHz level Pin 5 (LOWLEVEL) = VlLEV Pin 7 (YLEVEL) = VYLEV Pin 1 (CCONT) = VCLEV –0.5 0 +0.5 dB 22 Chroma signal GCA secondary distortion (center gain) — –4.5 14MHz gain/300kHz gain –0.8 — 14.55 –50 –3.7 0.0 –55 18.8 — –2.9 +0.8 — 23.05 dB dB dB dB mA 23 PCM signal path gain 24 PCM signal path frequency response 25 PCM signal path secondary distortion 1ch 26 CXA2002R REC amplifier output bias current 2ch Measure DC currents. Pin 26 (REC1CONT), Pin 35 (REC2CONT) = 3.3V Measurement conditions Symbol Measurement method Min. Typ. Max. Unit Input pin Level B 40 IR2 A B 27 10MHz level/1MHz level — A 34 27 2500µsec H Input L Output ∗ Logic is inverted in CH2 measurement. No. Frequency 27 18.1 20.7 34 –0.2 Pin 26 (REC1CONT), Pin 35 (REC2CONT) = 3.3V Output level (Vp-p)/51 (Ω) Item Input condition Measurement Control point, ammeter logic name 1ch 200mVpp 1MHz IR1 27 REC amplifier output current VFR1 40 VFR2 B Ton1 A 34 27 34 Slope: Ton1 23.3 mApp 2ch 200mVpp 10MHz 1MHz 1ch 28 REC amplifier frequency response — dB 2ch 1ch 29 21 B A Toff See the Measurement method. Slope: Toff Ramp rising slope 1 — 32 — µA/µs 2ch 1ch 30 Ramp falling slope — 32 — µA/µs 2ch – 16 – K 27 Ton2 H 34 Slope: Ton2 Input 2500µsec H L 1ch 22 31 Ramp rising slope 2 — Output See the Measurement method. 17 — µA/µs 2ch Playback system GV1 200µVpp GV2 GP1 200µVpp GP2 VAGC1 VAGC2 VAGC3 10 10 56mVpp 896mVpp 10 224mVpp 33 7MHz 7MHz 7MHz 28 300kHz H G G G 8 8 8 Measure the output level, applying a time constant to Pin 9 (RFAGCTC). 340 315 — 410 380 420 480 — 490 mVpp mVpp mVpp 33 300kHz G G 16 57.7 61.2 64.7 dB 28 H 14 Pin 15 (MTG) = 3.15V 58.0 61.5 65.0 dB 1ch 32 Head amplifier MTOUT gain 2ch 1ch 33 Head amplifier PCMOUT gain 2ch 34 RFAGC standard output 35 RFAGC cover-range high CXA2002R 36 RFAGC cover-range low Measurement conditions Symbol Measurement method Min. Typ. Max. Unit Input pin Level Frequency G Apply a time constant to Pin 9 (RFAGCTC). Pin 10 (RFAGCIN) 10kHz 7MHz a b 224mVp-p VDOP-h VDOP-l Kdop-on = 20 log 224 b 224 Kdop-off = 20 log a No. Item Input condition Measurement Control point, ammeter logic name 37 Kdop-on Dropout detection ON level 12 –15.0 –12.0 –9.0 dB 38 See the Measurement method (figure to the right). Pin 12 (DOP) Dropout detection OFF level Kdop-off G 12 –9.5 –6.5 –3.5 39 Vdop-l G 12 Dropout pulse low level 0 0.01 0.2 V 2.9 3.15 3.4 40 Dropout pulse high level Vdop-h G 12 – 17 – 50µs Pin 10 (RFAGCIN) 5kHz 7M/224mVp-p 41 Dropout ON detection time Tdop-on G 12 — 1.1 — See the Measurement method (figure to the right). Pin 12 (DOP) µs 42 Dropout OFF detection time Tdop-off G 12 Tdop-on Tdop-off — 2 — CXA2002R Control Logic Truth Table Operation of each section under respective input condition Recording Playback Input condition and operation Operation Mode Control logic input condition AFREC PB1chAmp PB2chAmp 18 RP PB 20 BOTH REC 21 RFSWP 22 RAMP 23 RAMPCONT 47 PCMREC 3 RFAGCOUT 8 Dropout detector 41 RECVIDEO 38 RECPCM 27 REC1OUT 34 REC2OUT 16 PCMOUT 14 MTOUT Control logic conditions A B C D L L L L — — L L L L x x x x x x x x O O O O CH1 CH2 CH2 CH1 O O O O L L H H L L V V P P P V V P x x x x x x x x x x x x L L L L L L H H L H L H L L L L L L L L L L L L L L L L V V V V ∗ ∗ ∗ ∗ V ∆ V V x x x x x x x x x x x x x x x x x x x x x x x x ∆ V V V VIDEO EACH REC ↓ VIDEO BOTH REC ↓ PCM REC ↓ PB ↓ REC E F L L H H L H – 18 – H H H H L L H H H H H H H H H H x x x x P P P P P x P x x P x P x O x O O x O x Mute Mute Mute Mute Mute Mute Mute Mute Hold Hold Hold Hold O O O O (Description of operation mode) O : Operating x V P CH1 CH2 : Not operating : Video signal is selected. : PCM signal is selected. : CH1 signal is output. : CH2 signal is output. ∗ 0.6V or below G H H H L L L H PB I J K H H H H H L L L L L H L H After-recording ↓ ↓ ↓ PCM after-recording After-recording mode RAMPCONT = L : Recording bias current rising slope 32µA/µs (typ.) RAMPCONT = H : Recording bias current falling slope 17µA/µs (typ.) (Description of input conditions) H : Control logic input voltage 2.3V or above : Operating with no signal output ∆ : Operating with bias current turned off Mute : Signal is muted. Hold : Time constant is kept on hold. CXA2002R L : Control logic input voltage — : Indenpendent of H and L Electrical Characteristics Measurement Circuit MTQ RAMP RFSWP RP PB MTF0 MTG RAMPCONT BOTH REC PCMOUT MTOUT A IVCC2 10µ 0.1µ 10µ VCC EVR 3.15V 0.1µ RP PB 10µ RFSWP BOTH REC VCC PCMOUT MTQ RAMPCONT RAMP MTF0 MTG MTOUT VCC EVR 14 13 100µ 24 VCC1 25 12 1CH REC1CONT 26 RAMP GEN MUTE 11 DOCDET RFAGCIN M·T –6dB 12dB 10 0.01µ RFAGCTC 2CH MUTE VIDEOSW 29 PBDUMP1 30 390 PBDUMP2 31 390 GND2 32 HEAD 15dB 40dB PB2IN 33 0.01µ REC2OUT 51∗ 34 RAMP GEN 35 2 36 1 1 REC PCM V/I YGCA VIDEO 1 1 LOWGCA 10µ 19 18 17 16 15 23 22 20 21 0.1µ DOP DOP PCMSW 10µ REC1CONT 2CH IB1 A REC1OUT 51∗ PB1IN 28 HEAD DOCDET AGCDET 8 RF AGC YLEVEL 7 YIN PCM 6 0.01µ VPSW1 VIDEO 15dB 0.01µ GND1 9 40dB 1CH 27 V/I REC 51 RFAGCIN 5.6µ PB1IN 470k 4700p RFAGCOUT RFAGCOUT 10µ 0.1µ RFAGCTC 0.01µ 49 1 1 IR1 IR VREG PCMIN 0.01µ 0.01µ ATFIN 0.01µ 0.01µ A IVCC1 GND VG2 VPPCMIN RECPCM VPVTRIN VCC 4.75V 15k∗ 18k∗ PCMREC 51 51 51 RECVIDEO 0.1µ 10µ 10µ 0.1µ 51 PCMIN VPPCMIN RECPCM VPVTRIN PCMREC ATFIN RECVIDEO – 19 – VPSW2 1 1 1 0.022µ YLEVEL 51 YIN 0.022µ LOWLEVEL 5 CIN CGCA 4 0.01µ AFREC 3 AFREC LOWLEVEL 51 CIN 5.6µ PB2IN 49 IB2 A REC2CONT AFMIN 2 LOWGCA 51 AFMIN REC2CONT VCC2 CCONT CCONT 10µ 0.1µ 37 38 39 40 41 42 43 44 45 46 47 48 Signal output pin Signal input pin EVR adjusting pin Control logic pin ∗ Resistance accuracy 1% 100µ CXA2002R Application Circuit LOGIC RFSWP RAMPCONT RAMP BOTH REC RP PB AFM TRAP PB C RF PB RF SIGNAL OUT PCM OUT RFAGCOUT RFVCC1 RFVCC2 10µ 100µ 0.1µ ATF TRAP C TRAP RF EQ EVR REC2CONT MTQ RAMPCONT RFSWP BOTH REC VCC RP PB RAMP MTF0 PCMOUT MTG MTOUT 0.1µ 24 23 22 20 21 17 16 15 14 19 18 13 10µ DOP 12 1CH 2CH MUTE 11 DOCDET RFAGCIN M·T –6dB 12dB RFAGCTC 2CH MUTE VIDEOSW AGCDET RFAGCOUT 8 RF AGC YLEVEL VPSW1 VIDEO YIN PCM 6 0.01µ LOWLEVEL 5 CIN VPSW2 VIDEO 1 1 1 LOWGCA VCC1 DOP PCMSW 25 REC1CONT RAMP GEN V/I 10 40dB 15dB DOCDET 4700p 9 470k 1CH 26 CH1 HEAD REC REC1OUT 27 PB1IN 28 HEAD 0.01µ GND1 VCC EVR 100µ REC1CONT 29 MTQ MTF0 MTG CH2 HEAD IR1 VREG GND VG2 PCMIN ATFIN 100µ IR RECPCM VPPCMIN VPVTRIN RECVIDEO 15k 18k PCMREC 10µ 0.1µ 0.1µ 10µ – 20 – 7 15dB 40dB CGCA 4 0.01µ AFREC 1 1 AFMIN 1 LOWGCA PBDUMP1 30 390 0.022µ YLEVEL LOWLEVEL CCONT EVR PBDUMP2 31 390 0.022µ GND2 32 HEAD PB2IN 33 V/I PCM RAMP GEN YGCA 0.01µ REC2OUT YIN 3 CIN AFMIN 2 ATFIN PCMIN CCONT 1 SIGNAL IN 34 REC REC2CONT 35 2 VCC2 36 10µ 0.1µ 38 39 41 42 43 40 44 45 46 47 48 37 0.01µ 0.01µ 0.01µ 0.01µ AFREC PCMREC RFGND LOGIC CXA2002R Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. CXA2002R Description of Operation Y, chroma, AFM, ATF and PCM signals are input at specified levels so that they are mixed internally to achive an appropriate current value at the head. The VIDEO path signal (Y + chroma + AFM + ATF) is output to Pin 41 (RECVIDEO) and the PCM path signal (PCM + ATF) to Pin 38 (RECPCM). The Y level is EVR-adjusted at Pin 8 (YLEVEL) and the low band (chroma, AFM, ATF) level at Pin 5 (LOWLEVEL). The low-band levels of the video path and the PCM path are interlocked in adjustment. The VIDEO path signal and the PCM path signal, which underwent recording level adjustment, are switched at a correct timing, then converted to a current to drive the head. A feedback dumping circuit is incorporated to inhibit head resonance, and the peaking can be adjusted by EVR at Pin 26 (REC1CONT), Pin 35 (REC2CONT). During recording, the output capacitance is about 12pF including that of the head amplifier. The playback signal from the head is amplified with low noise and high gain. A feedback dumping circuit is incorporated to inhibit head resonance, and the peaking can be adjusted by external resistors connected to Pin 30 (PBDUMP1), Pin 31 (PBDUMP2). During playback, the input capacitance is about 20pF including that of the recording amplifier. This section switches the playback signals of CH1 and CH2 at the correct timing and outputs the playback VIDEO signal to Pin 14 (MTOUT) and the playback PCM signal to Pin 16 (PCMOUT). In the PCM after-recording mode, both playback VIDEO signal and playback PCM signal are muted during the PCM recording period. The middle tune circuit corrects the frequency response of the playback VIDEO signal. The center frequency can be adjusted by EVR at Pin 17 (MTF0), Q at Pin 24 (MTQ) and the boost at Pin 15 (MTG). The figure to the right shows the center condition that sets f0 = 8MHz, Q = 2.5 and the boost = 6dB. Each control characteristics shown in "Example of Representative Characteristics" is obtained when two of them are fixed to the center condition. Gain Boost amount = 6dB 3dB f1 f2 Center frequency f0 = 8MHz Q = f0 / (f2 – f1) = 2.5 Frequency This circuit inputs the playback Y signal separated from the playback VIDEO signal using an external circuit and outputs it at a constant level of 410mVp-p. In the PCM after-recording mode, RFAGC gain is kept unchanged during PCM recording period. A dropout is detected in the playback Y signal, and a dropout pulse is output. The detection level is optimized using 224mVp-p input as a reference. If necessary, the detection level can be adjusted by inputting a DC voltage to Pin 11 (DOCDET). To make this adjustment, input a voltahe proportional to the output voltage of Pin 39 (VREG). – 21 – CXA2002R This IC exercises power-saving control of circuit blocks which are not in immediate need for operation. The IC also incorporates a logic circuit for controlling a number of SWs which change inputs and outputs at complicated timing. The combinations of input and output in the basic operation are shown in the "Control Logic Truth Table". VG2 2.45V and VREG 4.15V are generated as a reference voltages used in the IC. VG2 cannot be used outside the IC. VREG cannot also be used outside the IC except for adjusting the dropout detection level at Pin 11 (DOCDET). Notes on Operation 1. This IC is characterized by high-voltage gain (about 61dB in the playback system). Pay attention to the following when using the IC. 1) Use reinforced power supply and ground lines. Decouple the power supply pin with a coil and a capacitor. Connect the decoupling capacitor as close to the pin as possible. 2) Use of a regulator power supply is recommended. 3) Connecting a capacitive load to the output may cause oscillation. 4) Take particular care not to make capacitive coupling between the head amplifier input and the playback output. Also be careful not to make capacitive coupling between the recording input and the recording amplifier output. 5) Use of decoupling capacitors is recommended between the following DC voltage input pins and GND. When the control voltage source is at high impedance, aggravation of cross talk or oscillation is feared to occur. Pin 1 (CCONT), Pin 5 (LOWLEVEL), Pin 7 (YLEVEL) Pin 9 (RFAGCTC) [not when time constant is connected], Pin 11 (DOCDET) Pin 17 (MTF0), Pin 24 (MTQ), Pin 26 (REC1CONT) Pin 35 (REC2CONT) 6) When a decoupling capacitor is necessary for other pins (not power supply pin), it is recommended to connect each decoupling capacitor as close as to the pin as possible. 2. When Pin 13 (EVR Vcc) is used for 5V system (4.75 or larger than that of Pin 13 (EVR Vcc). +0.5V –0.25V ), the voltage of Pin 19 (Vcc) should be equal to 3. The voltage input to the EVR adjusting pin should be proportional to the EVR Vcc voltage. Control the input voltage in the range from 0V to 3.15V when EVR Vcc = 3.15V. For EVR adjustment at Pin 26 (REC1CONT) and Pin 35 (REC2CONT), control the input voltage in the range from 1.8V to 4.75V when Vcc = 4.75V, in proportion to the supply voltage Vcc; at Pin 9 (RFAGCTC), control the input voltage in the range from 2.5V to 4.75V. – 22 – CXA2002R Example of Representative Characteristics YGCA gain control 0 –10 LOWGCA (VIDEO path) gain control Pin 6 (YIN) → Pin 41 (RECVIDEO) gain [dB] Pin 48 (ATFIN) → Pin 41 (RECVIDEO) gain [dB] Pin 2 (AFMIN) → Pin 41 (RECVIDEO) gain [dB] –5 –15 –10 –20 –15 –25 –20 VCC = 4.75V EVR VCC = 3.15V 1.0 2.0 3.0 –30 VCC = 4.75V EVR VCC = 3.15V 1.0 2.0 3.0 Pin 7 (YLEVEL) voltage [V] Pin 5 (LOWLEVEL) voltage [V] LOWGCA (PCM path) gain control –10 CGCA gain control Pin 48 (ATFIN) → Pin 38 (RECPCM) gain [dB] –15 Pin 4 (CIN) → Pin 41 (RECVIDEO) gain [dB] VCC = 4.75V EVR VCC = 3.15V 1.0 2.0 3.0 –10 –20 –15 –25 –20 –30 –25 VCC = 4.75V EVR VCC = 3.15V 1.0 2.0 3.0 Pin 5 (LOWLEVEL) voltage [V] Pin 1 (CCONT) voltage [V] – 23 – CXA2002R Middle tune fo control Middle tune Q control 6 15 Center frequency fo [MHz] 5 10 4 Q 3 5 2 VCC = 4.75V EVR VCC = 3.15V 1.0 2.0 3.0 1 VCC = 4.75V EVR VCC = 3.15V 1.0 2.0 3.0 Pin 17 (MTF0) voltage [V] Pin 24 (MTQ) voltage [V] Middle tune boost control 15 Boost [dB] 10 5 0 VCC = 4.75V EVR VCC = 3.15V 1.0 2.0 3.0 Pin 15 (MTG) voltage [V] – 24 – CXA2002R Package Outline Unit : mm 48PIN LQFP (PLASTIC) 9.0 ± 0.2 ∗ 36 37 7.0 ± 0.1 25 24 S (8.0) A 48 1 0.5 + 0.08 0.18 – 0.03 + 0.2 1.5 – 0.1 12 13 B (0.22) + 0.05 0.127 – 0.02 0.13 M 0.1 0.1 ± 0.1 0.5 ± 0.2 S (0.127) +0.05 0.127 – 0.02 (0.18) 0.18 ± 0.03 0° to 10° 0.5 ± 0.2 DETAIL B:SOLDER DETAIL A DETAIL B:PALLADIUM NOTE: Dimension “∗” does not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE LQFP-48P-L01 LQFP048-P-0707 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 0.2g – 25 – 0.127 ± 0.04 + 0.08 0.18 – 0.03