CXA2013

CXA2013M EIAJ Sound Multiplexing Decoder Description The CXA2013M is a bipolar IC designed as EIAJ TV sound multiplexing decoder, provides various functions including sound multiplexing demodulation, broadcast mode identification (stereo/bilingual discrimination display), volume, tone control and muting. Features • Adjustment free of filter • Audio multiplexing decoder • Sound processor — One external input — Bass control — Treble control — Volume control — Balance control are all included in a single chip. Almost any sort of signal processing is possible through this IC. • Separation adjustment, each mode control and sound processor control are possible through I2C BUS. Applications TVs Structure Bipolar silicon monolithic IC Pin Configuration 24 TV OUT-R 25 TV OUT-L 16 LS OUT-L 27 MC OUT 30 SC OUT 21 AUX-R 22 AUX-L 26 MC IN 28 SC IN 18 CH-R 20 CL-R 17 CH-L 19 CL-L 30 pin SOP (Plastic) Absolute Maximum Ratings • Supply voltage • Operating temperature • Storage temperature • Allowable power dissipation (Ta = 25°C) VCC 12 V Topr –20 to +75 °C Tstg –65 to +150 °C PD 1000 mW 8.5 to 9.5 V Operating Supply Voltage Range 29 NC 23 NC DGND 10 BAL 11 TRE 12 BASS 13 VOL 14 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E00Y28A1Y-PS LS OUT-R 15 1 2 3 4 5 6 7 8 SDA MPX IN SUBI REFL CUBI GND Vcc SCL NC 9 Block Diagram TV OUT-R TV OUT-L MC OUT SC OUT AUX-R AUX-L MC IN SC IN SUBI CH-L 17 1 30 28 27 26 SUB MATRIX MAIN 25 24 21 22 19 SUBDEEM SW CL-L TONE MAINDEEM VCA 16 LS OUT-L SUB DET FM DEMOD SUB BPF BUFFER BIAS CURRENT BIAS VOLTAGE VOLTAGE REGULATOR 4.5fH TRAP VCA ATT MPX SIGNAL 2 GND 3 REFL 4 Vcc 5 MPX IN CUE BPF CUE CARRIOR DGND CH-R CUBI CL-R BASS TRE SDA VOL SCL BAL –2– IBIAS IIL LOGIC & CONT 3.5fH CLOCK 952Hz CLOCK BASS TRE VOL BAL 3.5fH VCO AM DEMOD 952Hz BPF TONE COMP VCA 15 LS OUT-R DAC BUS DEC 6 18 20 11 12 13 14 8 9 10 CXA2013M CXA2013M Pin Description Pin No. Symbol Pin voltage Equivalent circuit Vcc 80µ 20µ (Ta = 25°C, VCC = 9V) Description Vcc 16k 64k 1 SUBI 4.1V 16k 1 147 4.2V 1.7V 147 1k 8k 8k Bias capacitor connection of sub FM detector 2 GND 0 Vcc 2 Analog block GND 147 3 REFL 1.2V 3 3.3k 20k 24k 20k GND The noise elimination filter connection of internal reference voltage 4 VCC — Vcc 87.9k 147 27.6k 30k 80µ 4.2V GND Power supply 5 MPX IN 4.1V 5 50k Sound multiplexing signal input. Typical input level = 110mVrms (monoural 100%) Vcc 147 1k 40k 40k Vcc 11k 2k 4.2V 6 CUBI 4.1V 6 40k Bias capacitor connection of Cue pulse generator 7, 23, 29 NC — — — –3– CXA2013M Pin No. Symbol Pin voltage Equivalent circuit VCC 7.5k 35µ 4k 2.1V ×2 Description 8 SDA — 7.5k 4.5k ×5 3k Serial data I/O pin VIH > 3.0V VIL < 1.5V 8 VCC 7.5k 35µ 4k 2.1V 9 SCL — 10.5k 9 ×4 3k Serial clock I/O pin VIH > 3.0V VIL < 1.5V 10 DGND — VCC 10 Digital block GND DAC output pin. (BAL) Connect LPF capacitance of DAC. Internal impedance is approximately 20kΩ. 5.2V 11 BAL 4.2V 40k 20k 2k 11 12 13 2k 75µ 12 TRE 4.2V DAC output pin. (TRE) Connect LPF capacitance of DAC. Internal impedance is approximately 20kΩ. DAC output pin. (BASS) Connect LPF capacitance of DAC. Internal impedance is approximately 20kΩ. 13 BASS 4.2V VCC 10k 5k 2k 14 5.2V 14 VOL 5.2V ×4 ×4 DAC output pin. (VOL) Connect LPF capacitance of DAC. Internal impedance is approximately 5kΩ. 300µ –4– CXA2013M Pin No. Symbol Pin voltage VCC Equivalent circuit Description 3k 15 LS OUT-R 4.2V 10p 147 15 16 500 84k 500 LSOUT right channel output pin 16 LS OUT-L 4.2V LSOUT left channel output pin Vcc 250µ 6k 5.7k 250µ 17 CH-L 4.2V Treble filter pin (Left channel) 5.7k 17 18 147 18 CH-R 4.2V Treble filter pin (Right channel) Vcc 19 CL-L 4.2V 250µ 250µ Bass filter pin (Left channel) 10.7k 19 20 147 5.4k 12.3k 20 CL-R 4.2V 4.2V Bass filter pin (Right channel) Vcc 21 AUX-R 4.2V 36k 21 22 147 12k 4.2V 10µ Right channel external input pin 22 AUX-L 4.2V Left channel external input pin –5– CXA2013M Pin No. Symbol Pin voltage Equivalent circuit VCC 3k Description 24 TV OUT-R 4.2V 147 24 25 580 14.3k 35.7k 4.2V 580 TVOUT right channel output pin 25 TV OUT-L 4.2V TVOUT left channel output pin Vcc Vcc 147 8k 8k Vcc 26 MC IN 4.1V 27 147 26 16k 160µ DC cut capacitor connection of main signal 27 MC OUT 3.4V 4.2V 80µ GND Vcc 8k 8k Vcc 28 SC IN 4.1V 30 Vcc 147 8k 40k 147 28 320µ DC cut capacitor connection of sub signal 30 SC OUT 3.9V 16k 4.2V 4.2V 80µ GND –6– Electrical Characteristics (Ta = 25°C, VCC = 9V) No. 1 2 3 4 5 6 Item Symbol Mode Input pin — 5 — MONO MONO MONO 5 5 5 5 5 5 5 5 5 5 5 Input signal No input MONO 1kHz, 100% mod. — MONO 1kHz 100% mod. Sub: Career OFF, Cue: OFF MONO 10kHz 100% mod. 20 log ('10k'/'1k') Sub: Career OFF, Cue: OFF MONO 1kHz 100% mod. Sub: Career OFF, Cue: OFF MONO 1kHz 300% mod. Sub: Career OFF, Cue: OFF MONO 1kHz 100% mod. Sub: Career OFF, Cue: OFF SUB 1kHz 100% mod. Main 0% mod., Cue: BIL SUB 10kHz 100% mod. Main 0% mod., Cue: BIL SUB 1kHz 100% mod. Main 0% mod., Cue: BIL SUB 1kHz 100% mod. Main 0% mod., Cue: BIL ST-L 1kHz 100% mod. Cue: Stereo ST-R 1kHz 100% mod. Cue: Stereo 20 log ('100%'/'0%') 20 log ('10k'/'1k') 20 log ('100%'/'0%') Measurement conditions Filter Output pin 4 5 — 24/25 Min. 30 — –3 400 Typ. 43 110 — 500 Max. 60 — 3 Unit mA mVrms dB Current consumption Icc MPX input level MPX input level range MONO output level MONO frequency response MONO distortion MONO distortion at maximum input MONO S/N Sub output level Sub frequency response Sub distortion Sub S/N ST output level L-ch ST output level R-ch Vin Vrange Vmain Fcmain THDm 600 mVrms dB % % dB 24/25 –15.4 –13.4 –11.4 15kLPF 24/25 15kLPF 24/25 15kLPF 24/25 15kLPF 24/25 — — 65 400 0.2 0.3 73 500 1.0 2.0 — –7– 7 8 9 10 11 12 13 14 THDmmax MONO SNmain Vsub Fcsub THDsub SNsub Vstl Vstr MONO BIL BIL BIL BIL ST ST 600 mVrms dB % dB 15kLPF 24/25 –18.4 –15.9 –13.4 15kLPF 24/25 15kLPF 24/25 15kLPF 15kLPF 25 24 — 59 400 400 1.0 64 500 500 2.0 — 600 mVrms 600 mVrms CXA2013M No. 15 16 17 18 19 20 21 Item ST distortion L-ch ST distortion R-ch ST separation L→R ST separation R→L Cross talk Main → Sub Cross talk Sub → Main Symbol THDstl THDstr STLsep STRsep CTms CTsm Mode ST ST ST ST BIL BIL BIL BIL BIL BIL MONO ST ST BIL BIL — Input pin 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 Input signal ST-L 1kHz 100% mod. Cue: Stereo ST-R 1kHz 100% mod. Cue: Stereo ST-L 1kHz 100% mod. Cue: Stereo ST-R 1kHz 100% mod. Cue: Stereo Main 1kHz 100% mod. Sub: 0% mod., Cue: BIL SUB 1kHz 100% mod. Main 0% mod., Cue: BIL Main 1kHz 100% mod. Sub: 0% mod., Cue: BIL SUB 1kHz 100% mod. Main 0% mod., Cue: BIL Main 0% mod. Sub: 0% mod., Cue: BIL Main 0% mod. Sub: 0% mod., Cue: BIL MONO 1kHz 100% mod. Sub: Career OFF, Cue: OFF ST 0% mod. Cue: Stereo ST 0% mod. Cue: Stereo Change Cue level Change SUB career level Sine wave 55.069kHz, 8.8mVrms Measurement conditions Filter 15kLPF 15kLPF Output Min. pin 25 24 — — 35 35 55 60 55 60 — — — –100 –100 9 10 330 Typ. 0.2 0.2 45 45 58 70 58 70 10 12 –80 0 0 14 13 480 Max. 1.5 1.5 — — — — — — 30 20 –70 100 100 17 18 Unit % % dB dB dB dB dB dB mVrms mVrms dB mV mV dB dB CXA2013M 20 log ('Lch'/'Rch') 20 log ('Rch'/'Lch') 15kLPF 24/25 15kLPF 24/25 20 log (S0 = '0'/S0 = '1') 1kBPF 24/25 20 log (S0 = '1'/S0 = '0') 1kBPF 24/25 20 log ('Lch'/'Rch') S1 = '1' 20 log ('Rch'/'Lch') S1 = '1' 1kBPF 24/25 1kBPF 24/25 24 25 20 log (MUTE TV = '0'/ MUTE TV = '1') MUTE TV = '1' – MUTE TV = '0' MUTE TV = '1' – MUTE TV = '0' 20 log ('100%mod.'/ 'BIL-on level') 20 log ('100%mod.'/ 'BIL-on level') TEST = '1' 1kBPF 24/25 25 24 BUS RETURN BUS RETURN Cross talk CTmsb Main → Sub BOTH mode Cross talk CTsmb Sub → Main BOTH mode Sub residual carrier CLsub –8– 22 23 24 25 26 27 28 29 30 Main residual carrier CLmain TVOUT mute attenuation DC offset stereo L-ch DC offset stereo R-ch Cue detection sensitivity SUB detection sensitivity Cue BPF gain Mutv OSstl OSstr THcue THsub BPcue 25 620 mVrms No. 31 32 33 34 35 36 37 Item Symbol Mode — EXT INT EXT EXT EXT EXT EXT EXT EXT EXT EXT EXT EXT Input pin 5 21/22 21/22 5 21/22 Input signal Sine wave 66mVrms Sine wave 1kHz 500mVrms Sine wave 1kHz 500mVrms Main 1kHz 100% mod. Sub: 0% mod. , Cue: BIL Sine wave 1kHz 500mVrms Measurement conditions 20 log ('31.47kHz'/ '70.8kHz') EXT = '1' 20 log (EXT = '1'/EXT = '0') 20 log (EXT = '0'/EXT = '1') EXT = '1' MUTE LS = '0' EXT = '1' MUTE LS = '1' – MUTE LS = '0' EXT = '1' EXT = '1' EXT = '1' BASS = '1F' EXT = '1' BASS = '0' EXT = '1' TREBLE = '1F' EXT = '1' TREBLE = '0 ' EXT = '1' VOL = '0' EXT = '1', 20 log (VOL = '0'/ '500mVrms') Output Filter pin 1 15/16 1kBPF 15/16 1kBPF 15/16 1kBPF 15/16 15/16 15kLPF 15/16 15kLPF 15/16 15/16 Min. 20 400 62 70 — –50 65 — 8.5 Typ. 38 500 — — — 0 75 0.1 11.0 Max. — Unit dB 4.5fH TR45 trap attenuation level LSOUT output level LSOUT cross talk EXT → INT LSOUT cross talk INT → EXT LSOUT mute attenuation LSOUT DC offset LSOUT S/N LSOUT distortion BASS maximum boost BASS maximum attenuation TREBLE maximum boost TREBLE maximum attenuation Volume maximum attenuation Volume minimum noise Vls CTls1 CTls2 MUls OSls SNls THDls TBmax TBmin TTmax TTmin VOLmin VOLminn 630 mVrms — — –70 50 — 0.5 13.5 dB dB dB mV dB % dB dB dB dB dB dB CXA2013M 21/22 No input 21/22 21/22 21/22 21/22 21/22 21/22 21/22 Sine wave 1kHz 500mVrms Sine wave 1kHz 500mVrms Sine wave 100Hz 500mVrms Sine wave 100Hz 500mVrms Sine wave 10kHz 500mVrms Sine wave 10kHz 500mVrms Sine wave 1kHz 500mVrms –9– 38 39 40 41 42 43 44 15/16 –13.5 –11.0 –8.5 15/16 8.5 11.0 13.5 15/16 –13.5 –11.0 –8.5 1kBPF 15/16 15kLPF 15/16 — — –90 –90 –70 –80 21/22 No input Electrical Characteristics Measurement Circuit V2 C17 1µ C16 1µ V1 SW22 SW21 R4 10k C14 4.7µ 21 20 C13 0.01µ C12 0.01µ C11 C10 4700p 4700p 18 17 16 X1 C15 4.7µ 30 29 28 27 26 25 24 23 22 19 SC OUT MC OUT NC SC IN MC IN TV OUT-L TV OUT-R NC AUX-L AUX-R CL-R CL-L CH-L 1 2 3 4 5 C4 1µ 6 7 8 9 10 11 12 13 14 15 X1 LS OUT-R MPX IN DGND BASS REFL CUBI SUBI GND SDA VOL TRE SCL BAL Vcc NC LS OUT-L CH-R SW20 – 10 – C1 1µ C2 A 1µ Vcc 9V C3 47µ C5 1µ R1 220 R2 220 C6 0.1µ C7 0.1µ C8 0.1µ C9 0.1µ I2C BUS DATA SIGNAL GENERATOR DGND SW R3 10k FILTER SW 1kHz BPF 15kHz LPF 30kHz LPF MEASURES (AC VOLTMETER) CXA2013M CXA2013M Adjustment method Separation adjustment EIAJ sound multiplexing encoder Application circuit MPX IN RL Oscilloscope AC Voltmeter CH1 CH2 TV OUT-L TV OUT-R 15kHz LPF Switch Fig. 1 Procedure 1) Connect components as shown in Fig.1. (TEST = 0) 2) Set the encoder to MONO mode, and input 110mVrms (1kHz 100% modulation) to MPX IN (Pin 5). 3) Set the encoder to stereo mode, and input only left channel signal (1kHz 100% modulation) to MPX IN (Pin 5). 4) Monitor the oscilloscope and AC voltmeter and adjust ATT so that the R-ch is at a minimum. (Separation standard: more than 35dB) – 11 – CXA2013M Register Specification Slave address SLAVE RECEIVER 84H SLAVE TRANSMITTER 85H Register table SUB ADDRESS MSB LSB BIT7 TEST ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ EXT ∗ ∗ VOL (8) BAL (6) ∗: Don't care FOMO BIT6 BIT5 BIT4 ∗∗∗∗0000 ∗∗∗∗0001 ∗∗∗∗0010 ∗∗∗∗0011 ∗∗∗∗0100 ∗∗∗∗0101 DATA BIT3 ATT (7) S1 S0 BASS (5) TREBLE (5) MUTE TV MUTE LS BIT2 BIT1 BIT0 Status resigter STA1 BIT7 PON STA2 BIT6 ST STA3 BIT5 BIL STA4 BIT4 — STA5 BIT3 — STA6 BIT2 — STA7 BIT1 — STA8 BIT0 — Note) When the IC is powered on, the registers "MUTE TV", "MUTE LS" and "VOL" are set to "0". – 12 – CXA2013M Description of registers Control registers Register Number Classi- ∗ Standard fication setting of bits TEST ATT EXT FOMO S1 S0 MUTE TV MUTE LS BASS TREBLE VOL BAL 1 7 1 1 1 1 1 1 5 5 8 6 T A U U U U U U U U U U 0 34 0 0 0 0 1 1 10 10 FF 20 Contents DAC test mode for VCA, checking Cue BPF mode. Adjustment of stereo separation Selection of TV mode or external input mode for LSOUT output 1: External Selection of forced MONO mode ON/OFF Selection of TV OUT, LS OUT output signal Selection of TV OUT, LS OUT output signal Selection of TV OUT mute ON/OFF Selection of LS OUT mute ON/OFF LS OUT output bass control LS OUT output treble control LS OUT output signal level control LS OUT-L, R output signal level (balance) control 0: Mute ON, 1: Mute OFF 0: Mute ON, 1: Mute OFF 1: Forced MONO 1: TEST ∗ Classification U: User control A: Adjustment T: Test (when IC manufactured) Status Registers Register PON ST BIL Number of bits 1 1 1 POWER ON RESET detection Stereo detection of the MPXIN input signal Bilingual detection of the MPXIN input signal Contens 1: RESET 1: Stereo 1: Bilingual – 13 – CXA2013M Description of Control Registers TEST (1) : DAC test mode for VCA and checking Cue BPF mode. Use only for the electrical characteristics inspection process of IC. 0 = Normal mode 1 = Test mode, the Cue signal component through Cue BPF to TV OUT-L. Output DAC voltage for VCA to TV OUT-R. Perform the separation adjustment by varying the signal level input to MPX IN (Pin 5). Variable range of the input signal: Normal input level ±3.0dB 0 = Level Min. 34 = Center 7F = Level Max. Select TV mode or external input mode for LS OUT output 0 = TV mode 1 = External input mode Select ON/OFF forced MONO mode 0 = Forced MONO OFF 1 = Forced MONO ON Select output signal for TV OUT, LS OUT Select output signal for TV OUT, LS OUT Mute TV OUT output 0 = Mute ON 1 = Mute OFF Mute LS OUT output 0 = Mute ON 1 = Mute OFF LS OUT output bass control 0 = Bass Min. 10 = Bass Center (0dB) 1F = Bass Max. LS OUT output treble contorl 0 = Treble Min. 10 = Treble Center (0dB) 1F = Treble Max. LS OUT output signal level control 0 = Volume Min. (–90dB Typ.) FF = Volume Max. (0dB) LS OUT-L, R output signal level (balance) control 0 = Lch Min., Rch Max. 20 = Center (Lch 0dB, Rch 0dB) 3F = Lch Max., Rch Min. – 14 – ATT (7) : EXT (1) : FOMO (1) : S1 (1) : S0 (1) : MUTE TV (1) : MUTE LS (1) : BASS (5) : TREBLE (5) : VOL (8) : BAL (6) : CXA2013M Description of Mode Control TV OUT output mode control table (TEST = 0 normal mode) Input signal Mode detection ST 0 BIL 0 FOMO ∗ ∗ ∗ 1 Stereo 1 0 0 0 0 ∗ ∗ Bilingual 0 1 ∗ ∗ Mode control S1 ∗ ∗ ∗ ∗ 0 0 1 ∗ 0 0 1 S0 ∗ ∗ ∗ ∗ 0 1 0 ∗ 0 1 0 MUTE TV 0 1 0 1 1 1 1 0 1 1 1 TV OUT output L MUTE MAIN MUTE L+R L L L MUTE MAIN SUB MAIN R MUTE MAIN MUTE L+R R R R MUTE MAIN SUB SUB ∗: Don't care LS OUT output mode control table (TEST = 0 normal mode, EXT = 0 TV mode) Input signal Mode detection ST 0 BIL 0 FOMO ∗ ∗ ∗ 1 Stereo 1 0 0 0 0 ∗ ∗ Bilingual 0 1 ∗ ∗ Mode control S1 ∗ ∗ ∗ ∗ 0 0 1 ∗ 0 0 1 S0 ∗ ∗ ∗ ∗ 0 1 0 ∗ 0 1 0 MUTE LS 0 1 0 1 1 1 1 0 1 1 1 LS OUT output L MUTE MAIN MUTE L+R L L L MUTE MAIN SUB MAIN R MUTE MAIN MUTE L+R R R R MUTE MAIN SUB SUB ∗: Don't care TV OUT/LS OUT output mode control table (TEST = 0 normal mode) EXT TV mode External mode 0 1 TV OUT L TV mode Lch TV mode Lch R TV mode Rch TV mode Rch – 15 – L TV mode Lch EXT Lch LS OUT R TV mode Rch EXT Rch MONO MONO CXA2013M Description of Operation The sound mutiplexing signal input from Pin 5 is passed through IN AMP and is applied to the Cue BPF, Sub BPF, and Main de-emphasis circuit. 1. Discrimination circuits Cue BPF passes only the Cue signal component from the multiplex signal. In the AM demodulator, the signal (AM wave) is AM detected and one of two sine waves is generated, either a 922.5Hz signal for bilingual broadcasts or a 982.5Hz signal for stereo broadcasts. In the 952Hz BPF, the 3.5fH carrier component is eliminated from the Cue signal after AM wave detection. The Cue signal, from which the carrier component has been eliminated, is waveform shaped by COMP with , the resulting 922.5Hz or 982.5Hz pulse being applied to the Logic section. In the 3.5fH VCO, a 3.5fH pulse locked onto the Cue signal carrier (3.5fH) is created and sent to the Logic section. In the Logic section, the broadcast mode is identified using the countdown method. Depending on this result as well as the presence of a SUB signal from SUB detector and the MUTE ON/OFF, MODE switching, and FOMO ON/OFF instructions from CONT, the output switching control signal is created. This signal is used to control the output condition of OUTPUT SW and MAIN OUT. 2. Main circuits In MAIN DEEM, de-emphasis is applied to the Main signal component and the Sub and Cue components are removed. After passing through the MAIN DEEM, the Main signal is applied to MATRIX, OUTPUT AMP, and MAINOUT. 3. Sub circuits In SUB BPF, only the SUB signal component out of multiplex signals is passed through. In the 4.5fH trap, the digital facsimile signal component is removed. In FM Demod, the SUB signal is FM demodulated. In SUB DEEM, the FM demodulated Sub signal is de-emphasized and the carrier component is removed. After passing through SUB DEEM, the Sub signal is applied to MATRIX and OUTPUT AMP. 4. MATRIX and output circuits In MATRIX, the L and R signals are created by adding and subtracting the Main signal from MAIN DEEM and the Sub signal from SUB DEEM in stereo broadcast. In OUTPUT AMP and OUTPUT SW, the output signal is switched under the control of Logic. In addition, MAIN OUT always outputs the MAIN signal component, regardless of the broadcast mode. 5. TONE circuit Control BASS and TREBLE. Bass and TREBLE characteristics are decided by each CL and CH external capacitance. 6. BALANCE, VOLUME curcuit Control BALANCE and VOLUME. BALANCE has 64steps and VOLUME has 256 steps. 7. DAC DAC is the circuit that control BASS, TREBLE, VOLUME and BALANCE. Internal impedance is approximately 20kΩ (approximately 5kΩ for VOLUME). Connect the external capacitance for LPF to each pins. – 16 – Application Circuit TVOUT output C21 1µ C20 1µ External input C11 10µ C19 10µ 30 SC OUT C18 10µ 24 TV OUT-R C17 10µ 23 NC C16 10µ 21 AUX-R C15 0.1µ C14 0.1µ C13 C12 4700p 4700p 18 CH-R 29 NC 28 SC IN 27 MC OUT 26 MC IN 25 TV OUT-L 22 AUX-L 20 CL-R 19 CL-L 17 CH-L 16 LS OUT-L 1 2 3 4 5 C4 10µ C3 100µ 6 7 8 9 10 11 12 13 14 15 C1 10µ C2 10µ Vcc 9V C5 10µ R1 220 R2 220 C6 4.7µ C7 4.7µ C8 4.7µ C9 4.7µ LS OUT-R MPX IN DGND BASS REFL CUBI SUBI GND SDA VOL TRE SCL BAL Vcc NC – 17 – C10 10µ Composite baseband signal input µ-com DGND Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. LSOUT output CXA2013M CXA2013M I2C Bus Block Items (SDA, SCL) No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 High level input voltage Low level input voltage High level input current Low level input current Low level output voltage SDA (Pin 8) during 3mA inflow Maximum inflow current Input capacitance Maximum clock frequency Minimum waiting time for data change Minimum waiting time for start of data transfer Low level clock pulse width High level clock pulse width Minimum waiting time for start preparation Minimum data hold time Minimum data preparation time Rise time Fall time Minimum waiting time for stop preparation Item Symbol VIH VIL IIH IIL VOL IOL CI fSCL tBUF tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tR tF tSU:STO Min. 3.0 0 — — 0 3 — 0 4.7 4.0 4.7 4.0 4.7 0 250 — — 4.7 Typ. — — — — — — — — — — — — — — — — — — Max. 5.0 1.5 10 10 0.4 — 10 100 — — — — — — — 1 300 — ns µs ns µs µs Unit V µA V mA pF kHz I2C bus load conditions: Pull-up resistor 4kΩ (Connect to +5V) Load capacitor 200pF (Connect to GND) I2C Bus Control Signal SDA tBUF tR tF tHD:STA SCL P S tHD:STA tLOW tHD:DAT tHIGH tSU:DAT Sr tSU:STA tSU:STO P – 18 – CXA2013M I2C Bus Signal There are I2C signals, SDA (Serial DATA) and SCL (Serial CLOCK) signals. SDA is a bidirectional signal. • Accordingly there are 3 values outputs, H, L, and Hi-Z. H L Hi-Z L • I2C transfer begins with Start Condition and ends with STOP condition. Start Condition S Stop Condition P SDA SCL – 19 – CXA2013M • I2C data write (Write from I2C controller to the IC) L during Write MSB Hi-Z SDA MSB LSB Hi-Z SCL S MSB 1 2 3 4 5 6 7 8 9 1 8 9 Address LSB Hi-Z Hi-Z ACK Sub Address ACK 1 8 9 1 8 9 DATA (n) ACK DATA (n + 1) ACK DATA (n + 2) Hi-Z Hi-Z 8 DATA 9 ACK 1 DATA 8 9 P ACK ∗ Data can be transferred in 8-bit units to be set as required. Sub address is incremented automatically. • I2C data read (Read from the IC to I2C controller) H during Read Hi-Z SDA SCL S 1 6 7 8 9 1 7 8 9 P Address ACK DATA ACK • Read timing MSB IC output SDA LSB SCL 9 1 2 3 4 5 6 7 8 9 Read timing ACK DATA ACK ∗ Data Read is performed during SCL rise. – 20 – CXA2013M Example of Representative Characteristics De-emphasis characteristics SUB BPF frequency characteristics Output level [dB] Output level [dB] Main Sub 100 1k Frequency [Hz] 10k 0 –20 –40 –60 10 20 30 40 50 60 70 80 90 100 0 –5 –10 –15 Frequency [kHz] Cue BPF frequency characteristics 3 MAIN distortion characteristics Attenuation level [dB] 2 0 –20 –40 –60 Distortion [%] 1 3.5fH –40k 3.5fH –20k 3.5fH 3.5fH +20k 3.5fH +40k 100 200 300 400 500 MAIN modulation factor [%] Frequency [Hz] VOL CONTROL characteristics 0 –10 0 –10 BALANCE CONTROL characteristics OUT R OUT L LS OUT-L, R [dB] –20 –30 –40 –50 –60 –70 –80 40 80 C0 FF LS OUT-L, R [dB] –20 –30 –40 –50 –60 –70 –80 0 10 20 30 3F BUS data [VOL] BUS data [BALANCE] – 21 – CXA2013M TONE characteristics 20 LS OUT -L, R [dB] BASS-TREBLE MAX. 10 0 BASS-TREBLE MIN. –10 –20 100 1k 10k Frequency [Hz] – 22 – CXA2013M Package Outline Unit: mm 30PIN SOP (PLASTIC) + 0.4 2.3 – 0.15 0.1 16 + 0.4 18.8 – 0.1 30 10.3 ± 0.4 + 0.3 7.6 – 0.1 + 0.2 0.1 – 0.05 (9.3) 0.5 ± 0.2 COPPER ALLOY 0.7g A 15 1 0.45 ± 0.1 1.27 0.2 M + 0.1 0.2 – 0.05 0˚ to 10˚ DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SOP-30P-L03 SOP030-P-0375 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18µm – 23 – Sony Corporation