CXA2022S

CXA2022S I2C Bus Sound Processor for TV Description The CXA2022S is a bipolar IC designed as an I2C bus control sound processor for TV. This IC has simulate stereo, surround, tone control, balance, volume, muting, AGC and other functions. Features • Allows control by I2C bus • Employs a special surround system to prevent "vocal missing" in the surround mode • Adopts an AGC circuit to absorb the difference in sound level between input sources and improves S/N ratio of hearing characteristics Absolute Maximum Ratings • Supply voltage • Operating temperature • Storage temperature • Allowable power dissipation 30 pin SDIP (Plastic) Structure Bipolar silicon monolithic IC Applications TVs VCC 14 Topr –20 to +75 Tstg –65 to +150 PD 1.25 V °C °C W Recommended Operating Condition Supply voltage 8 to 13 V Pin Configuration MVFO LOUT PS3B PS3A PS2B PS2A MVFI VRS PS1B DET1 16 15 L IN VCC CL L CH L CC L 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 BASS GND R IN CC R PS1A CH R TRE CL R VOL HPF SCL ROUT Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– DET2 SDA E95Y17A7X BAL Block Diagram Description of internal switches MS … Monaural Surround (Simulate Stereo) SS … Stereo Surround 1,2 SS-1 … Stereo Surround 1 SS-2 … Stereo Surround 2 OFF … Surround OFF I2C BUS SOUND PROCESSOR DET2 MVFI MVFO PS3A PS3B CC L DET1 VCC 16 29 22 12 25 24 20 23 27 CH L 28 HPF VOCAL-MIX SS MIX MS/OFF SS-1 PS3 MS SS SS-2 13 AGC DET MS/OFF TONE PS2 MS PS1 SS OFF EFFECT SS LPF MS BASS TRE VOL BAL M -EFF VCA CL L TRE BASS 26 2 11 19 17 18 9 4 3 7 6 BAL 5 VOL VRS GND PS1A PS1B PS2A PS2B CC R CH R CL R SDA SCL –2– L IN 30 L OUT 21 R R SS LPF MS/OFF R IN 1 L-R TONE VCA DAC R OUT 10 BUS DEC R R SS VCC/2 8 15 14 CXA2022S CXA2022S Pin Description Pin No. Symbol Pin voltage Equivalent circuit (Ta = 25°C, VCC = 12V) Description VCC 10µ 130 10k 1 30 R IN L IN 6V 1 30 30k VCC/2 Input pins. 2 GND 0V VCC 250µ 250µ GND 3 28 CL R CL L 5.4k 6V 3 28 11k 11k 130 VCC/2 External pins for LPF capacitance (BASS). VCC 250µ 250µ 4 27 CH R CH L 6V 4 27 5.7k 130 6k 5.7k External pins for HPF capacitance (TREBLE). VCC 40k 20k 5 6 7 8 BAL TRE BASS VOL 5 7.5V 2k 4.5V 6 7 8 2k 75µ DAC output pins. Connect LPF capacitance of DAC. Internal impedance is approximetely 20kΩ. –3– CXA2022S Pin No. Symbol Pin voltage Equivalent circuit Description VCC 9 22 CC R CC L 6V 20k 9 22 1k 500 20k 500 1k DC-cut pins for L and R. Internal impedance is approximately 20kΩ. 1k VCC 500 5P 10 21 ROUT LOUT 130 6V 10 21 84k 500 Output pins. VCC 10µ 11 17 18 19 20 23 PS1A PS2A PS2B PS1B PS3A PS3B 11 17 130 18k 6V 18 19 20 23 18k External capacitance pins for surround phaseshifter. Internal impedance is approximately 18kΩ. VCC 200 200 10k 12 DET2 12 130 AGC detector output and control pin. 100k 100k –4– CXA2022S Pin No. Symbol Pin voltage Equivalent circuit Description 10µ 500 13 HPF 6V 130 13 10k HPF external capacitance pin of AGC. 500 16k 16k VCC 50µ 100µ 14 SCL 14 4k 3k 11k 56k I2C bus clock line pin. VCC 50µ 100µ 15 SDA 15 4k 3k 4.5k 56k I2C bus data line pin. VCC 40k 16 16 DET1 7.8V AGC detector output pin. Connect capacitance for setting time constant. 2k –5– CXA2022S Pin No. Symbol Pin voltage Equivalent circuit VCC 5µ 22k 10k 5µ Description 24 MVFI 6V 22k 24 130 39k 10k External pin for surround filter. 18k VCC 500 130 25 MVFO 6V 25 500 External pin for surround filter. VCC 16k 30k 16k 26 VRS 6V 26 1k VCC/2 reference voltage pin. 30k 30µ 29 VCC 12V Power supply. –6– Electrical Characteristics Measurement Circuit MVFI PS1B PS3B PS3A PS2A CC L LOUT PS2B R2 10k C10 0.1µ R3 820k C13 8200P C16 4.7µ C18 10µ S5 23 22 20 21 19 S4 S2 18 C25 0.022µ S3 17 C20 8200P C23 4700P C27 0.1µ C12 10µ R5 10k C28 10µ VCC C22 10µ L IN C2 4.7µ S7 S6 24 27 25 26 C4 0.1µ C6 4700P C8 47µ C29 4.7µ 30 29 28 16 L IN VCC CL L VRS CH L MVFI CC L PS1B PS2B PS3B MVFO CXA2022S CL R TRE CC R LOUT PS3A R IN CH R BASS ROUT HPF GND BAL VOL PS1A SCL PS2A DET2 1 4 7 8 2 3 5 6 9 10 S1 11 12 C24 10µ 13 14 15 C1 4.7µ C5 4700P C7 4.7µ C9 4.7µ C11 4.7µ C3 0.1µ C14 4.7µ C15 4.7µ C17 10µ C19 4700P R6 1MEG R4 10k C26 0.1µ R IN C21 10µ SCL SDA R1 10k CXA2022S CC R ROUT PS1A SDA DET1 –7– CXA2022S Control Register Table DATA bit 7 bit 6 bit 5 bit 4 bit 3 (SLAVE ADDRESS = 82H) (Power ON setting value) bit 2 bit 1 MUTE (0) ∗ ∗ ∗ MONO-EFFECT (00) ∗ bit 0 AGC (0) AGC : 0 = OFF/1 = ON MUTE : 0 = OFF/1 = ON VOLUME (00) BASS (00) TREBLE (00) BALANCE (00) SURR-EFFECT (00) VOCAL-MIX (00) MODE : 00 = Surround OFF : 01 = Simulate Stereo : 10 = Stereo Surround 1 : 11 = Stereo Surround 2 ∗ Undefined Description of Register • VOLUME: Common to both L and R channels 0 = Minimum 3F = Maximum • MUTE: MUTE switch 0 = Mute OFF 1 = Mute ON (muting state) • AGC: AGC switch 0 = AGC OFF 1 = AGC ON • BASS: Low frequency control 0 = Minimum 10 = Typical 1F = Maximum • MODE: Surround mode setting 00 = Surround OFF 01 = Simulate Stereo (Monaural Surround) 10 = Stereo Surround 1 11 = Stereo Surround 2 • TREBLE: High frequency control 00 = Minimum 10 = Typical 1F = Maximum MODE (00) –8– CXA2022S • BALANCE: Balance control for L and R channels 00 = L channel (Minimum), R channel (Maximum) 20 = Typical 3F = L channel (Maximum), R channel (Minimum) • SURR-EFFECT: Effect setting for Stereo Surround 1 and 2 0 = Minimum 8 = Typical F = Maximum • MONO-EFFECT: Effect setting for Simulate Stereo (Monaural Surround) 0 = Minimum F = Maximum • VOCAL-MIX: Addition amount setting of middle frequency for Stereo Surround 1 and 2 0 = Minimum 8 = Typical F = Maximum Application Circuit L IN C10 0.1µ C2 4.7µ C4 0.1µ C6 4700P C8 47µ R1 820k C13 8200P C15 4.7µ C17 10µ C19 8200P C21 4700P C23 0.022µ C24 0.1µ C25 4.7µ L OUT VCC 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 CH L L IN PS3B PS3A PS2A VRS VCC MVFO PS1B CXA2022S BASS ROUT LOUT GND PS1A CH R CL R CC R DET2 PS2B R IN VOL BAL 1 2 3 4 5 6 7 8 9 10 11 12 C20 10µ 13 14 SCL 15 C1 4.7µ C3 0.1µ C5 4700P C7 4.7µ C9 4.7µ C11 4.7µ C12 4.7µ C14 4.7µ C16 10µ C18 4700P C22 0.1µ R3 220 SDA R4 220 SDA TRE R2 1MEG R IN R OUT SCL Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. –9– HPF DET1 MVFI CC L CL L Electrical Characteristics Input conditions Remarks Min. Typ. Max. Unit BASS MODE 10 0 8 8 8 10 20 20 35 55 TRE BAL S-EFF M-EFF V-MIX (Ta = 25°C, VCC = 12V) No. Measurement item Signal VOL 0 MUTE AGC MeasureSW set Input ment Input signal to ON point point mA 1 Current consumption L-IN R-IN LOUT ROUT REF: INPUT –2.0 –17 1kHz 2.4Vrms 0 ICC 3F 0 2 FLAT L, R VF L, R 2.0 dB 3 REF, Level L, R VR L, R 20 –14 –11 dB 4 VOL MIN L, R 100Hz 2.4Vrms 10kHz 2.4Vrms 1F 1F 100Hz 2.4Vrms 10kHz 2.4Vrms 0 0 100Hz 2.4Vrms 10kHz 2.4Vrms 10 10 3F 1kHz 2.4Vrms LOUT VMIN L, R 0 — — –70 dB 5 20 REF: VR L, R –1.5 0 1.5 dB 6 FLAT f characteristics VLF L, R 100Hz FLAT f characteristics VHF L, R 10kHz –1.5 0 1.5 dB – 10 – 0 3F 20 7 BASS BOOST 100Hz VBST LF 8.5 11 13.5 dB 8 TREBLE BOOST VBST HF 10kHz 8.5 11 13.5 dB 9 BASS CUT 100Hz VCUT LF –13.5 –11 –8.5 dB 10 TREBLE CUT 10kHz VCUT HF –13.5 –11 –8.5 dB 11 BALANCE BOOST L VBAL BST L 0 1.2 2.0 dB 12 BALANCE CUT L VBAL CUT L — — –30 dB 13 BALANCE BOOST R VBAL BST R ROUT 0 1.2 2.0 dB 14 BALANCE CUT R VBAL CUT R — — –30 dB CXA2022S 15 Distortion L, R Vdist 3F LOUT ROUT — — 2.0 % Input conditions Remarks Min. Typ. Max. Unit BASS MODE 10 REF: INPUT — 0 10 20 8 8 8 L-IN R-IN LOUT ROUT — –70 ROUT REF: VFR — — –70 L-IN 1kHz 2.4Vrms TRE BAL S-EFF M-EFF V-MIX No. Measurement item Signal VOL 0 MUTE AGC MeasureSW set Input ment Input signal to ON point point dB 16 Mute L, R VMT L, R 3F 1 17 Crass-Talk L→R R-IN LOUT REF: VFL — — VCT L, R 0 dB 18 Crass-Talk R→L LOUT ROUT 0 1 0 1 0 1 0 1 0 1 1kHz 2Vrms 100Hz 1.25Vrms 500Hz 1.25Vrms 10kHz 1.25Vrms F PS1A 1kHz 350mVrms 8 L-IN 1kHz 2.5Vrms R-IN SW1 LOUT ROUT SW4 PS1B SW2 PS2B 1kHz 160mVrms 1kHz 50mVrms L-IN R-IN 1kHz 10mVrms REF: AGC-OFF (0) REF: AGC-OFF (0) REF: AGC-OFF (0) REF: AGC-OFF (0) REF: INPUT — VCT R, L –70 dB 19 NOISE LEVEL L, R VNOI L, R — –60 dBm 20 AGC BOOST L, R VGCB L, R 0.5 3 5.5 dB 21 AGC BOOST L, R VGCB2 L, R 5 7 10 dB 22 AGC NULL L, R VGCN L, R –2.5 –0.5 2 dB – 11 – 2 3 2 F PS1A 1kHz 350mVrms 23 AGC CUT L, R VGCC L, R –24 –20 –16 dB 24 MONO FIL 100HZ MFL L –11 –8.5 –6 dB 25 MONO FIL 500HZ MFL M –18 –15.5 –13 dB 26 MONO FIL 10kHz MFL H –1.5 1.0 3.5 dB 27 MS MIX LEVEL L, R MMX L, R 13 16 19 dB 28 SS DIF GAIN L SDG L –4 –2 0 dB 29 SS DIF GAIN R SDG R –4 –2 0 dB CXA2022S 30 SS MIX LEVEL L SMX L SW1 LOUT 13 16 19 dB Input conditions Remarks Min. Typ. Max. Unit BASS MODE 10 10 8 8 PS1A REF: INPUT 16 SW1 ROUT 13 20 F 3 1kHz 350mVrms 19 100Hz 2.5Vrms SW6 PS3B –7.5 –5 1kHz 2.5Vrms –3 10kHz 2.5Vrms MVFI 1kHz 500mVrms SW7 SW5 LOUT LOUT ROUT –0.5 –2.5 TRE BAL S-EFF M-EFF V-MIX No. Measurement item Signal VOL 0 MUTE AGC MeasureInput SW set ment Input signal point to ON point dB 31 SS MIX LEVEL R 2 8 F L-IN R-IN SMX R 3F 0 32 V-FIL 100HZ 3 VFIL L dB 33 V-FIL 1kHz 2 VFIL M 2 dB 34 V-FIL 10kHz VFIL H –10.5 –8 –5.5 dB 35 V-MIX L, R 3 8 PS3A 0 F 1 0 2 0 LOUT 3 3 1 2 1 0 LOUT ROUT VMX L, R 10.5 13.5 16.5 dB 36 SS2-MIX SS2MX 11 14 17 dB 37 DC OFF-Set DOOM OFF → MS-L, R LOUT ROUT REF: MODE0 –150 0 150 mV – 12 – 38 DC OFF-Set DOOSS1L, R OFF → SS1-L, R –150 0 150 mV 39 DC OFF-Set OFF → SS2-L DOOSS2 –150 0 150 mV 40 DC OFF-Set DOSS2M L, R SS2 → MS-L, R LOUT ROUT LOUT REF: MODE3 –150 0 150 mV 41 DC OFF-Set SS1 → MS-L DOSS1M REF: MODE2 –150 0 150 mV 42 VOL MIN NOISE L, R VMINNO L, R 0 30kHz LPF — –92 –85 dBm CXA2022S CXA2022S Description of Operation • AGC circuit The AGC circuit is provided at the input. When AGC is set to ON, this circuit is 0dB for small signal input, boosts for medium signal input, and achieves gain reduction for large signal input. The sound level defference between input sources can be absorbed at this circuit. • Surround circuit The surround circuit provides three modes; MONO (Simulate Stereo), STEREO-1 and STEREO-2. MONO mode L + R signals, passed through the mono filter and then through four stages of phase shifters (PS1A, PS1B, PS2A, PS2B) and 9kHz LPF, are added to L and R channels at opposite phase to each other. The surround effect can be changed by the MONO-EFFECT. STEREO-1 mode L-R signals, passed through two stages of phase shifters (PS1A, PS1B) and 9kHz LPF, are added to L and R channels at opposite phase to each other. The surround effect can be changed by the SURR-EFFECT. In addition, L + R signals passed through the middle frequency BPF (1kHz BPF) are added to L and R channels at in-phase to each other to prevent "vocal missing" in the surround mode. The addition amount of middle frequency can be changed by the VOCAL-MIX. STEREO-2 mode L-R signals, passed through two stages of phase shifters (PS1A, PS1B) and 9kHz LPF, are added to L and R channels at opposite phase to each other. The surround effect can be changed by the SURR-EFFECT. In addition, L + R signals passed through the middle frequency BPF (1kHz BPF) are added to R channel, and the middle frequency signals passed further through two stages of phase shifters (PS3A, PS3B) are added to the L channel. The addition amount of middle frequency (L and R) can be changed by the VOCAL-MIX. Phase Shifter Each of the phase shifters PS1, PS2 and PS3 consists of two stages of phase shifters (A, B). The transfer function for a stage of phase shifter is expressed by the following equation. VO = 1 – SCR Vin 1 + SCR R: Internal resistance ≈ 18kΩ, C: External capacitance • TONE circuit Provides tone controls for BASS and TREBLE. The external capacitance of CL for BASS and CH for TREBLE can determine the characteristics. The number of steps is 32. • BALANCE and VOLUME circuit Provides controls for BALANCE and VOLUME. the number of steps is 64 each. • DAC circuit Provides controls for BASS, TREBLE, VOLUME and BALANCE. The internal impedance is approximately 20kΩ and the LPF capacitance is used externally. – 13 – CXA2022S Example of Representative Characteristics TONE characteristics 20 BASS-TREBLE MAX. OUT L, R [dB] 10 0 BASS-TREBLE MIN. –10 –20 10 100 1k 10k 100k Frequency [Hz] CH. vs. TREBLE-CONTROL (MAX) 17.5 15.0 12.5 0.047µ 0.022µ 2200p 7.5 5.0 2.5 470p 0.0 –2.5 10 100 Frequency [Hz] 1k 10k 100k 4700p OUT L, R [dB] 10.0 CH. vs. BASS-CONTROL (MAX) 17.5 15.0 12.5 OUT L, R [dB] 10.0 0.01µ 7.5 1µ 5.0 0.47µ 2.5 0.0 –2.5 10 100 Frequency [Hz] 1k 10k 100k 0.1µ 0.047µ – 14 – CXA2022S VOL CONTROL characteristics BALANCE CONTROL characteristics 0 –10 –20 0 OUT R –10 OUT L OUT L, R [dB] –30 –40 –50 –60 –70 –80 10 20 30 3F OUT L, R [dB] –20 –30 –40 –50 –60 –70 –80 0 10 20 30 3F BUS Data (VOL) BUS Data (BALANCE) BASS CONTROL characteristics 12 10 8 6 Input = 100Hz 12 10 8 6 TREBLE CONTROL characteristics Input = 10kHz OUT L, R [dB] 2 0 –2 –4 –6 –8 –10 –12 0 4 8 C 10 14 18 1C 1F BUS Data (BASS) OUT L, R [dB] 4 4 2 0 –2 –4 –6 –8 –10 –12 0 4 8 C 10 14 18 1C 1F BUS Data (TREBLE) AGC characteristics 1V AGC = OFF AGC = ON 100mV OUT [rms] 10 10 100mV IN [rms] 1V – 15 – CXA2022S Package Outline Unit : mm 30PIN SDIP (PLASTIC) + 0.4 26.9 – 0.1 30 16 + 0.3 8.5 – 0.1 + 0.1 .05 0.25 – 0 1 1.778 15 0.5 MIN + 0.4 3.7 – 0.1 10.16 0° to 15° Two kinds of package surface: 1.All mat surface type. 2.All mirror surface type. 0.5 ± 0.1 0.9 ± 0.15 PACKAGE STRUCTURE MOLDING COMPOUND SONY CODE EIAJ CODE JEDEC CODE SDIP-30P-01 SDIP030-P-0400 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER/PALLADIUM PLATING COPPER ALLOY 1.8g NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). – 16 – 3.0 MIN