CXA2568M

CXA2568M RF Amplifier for CD Players Description The CXA2568M is an IC developed for compact disc players. This IC incorporates an RF amplifier, focus error amplifier, tracking error amplifier, APC circuit and RF level control circuit. (The voltageconverted optical pickup output is supported.) Features • Low power consumption (50 mW at ±2.5 V) • High-band RF amplifier • APC circuit • RF level control circuit (Hold circuit included) • Both single power supply and dual power supply operations possible. • Compatible with pickup for LC and PD Applications Compact disc players Structure Bipolar silicon monolithic IC 24 pin SOP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VCC 12 V • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 650 mW Operating Conditions Supply voltage VCC—VEE 4.5 to 5.5 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E97X12-TE CXA2568M Block Diagram and Pin Configuration APC PD AMP 1k VCC HOLD 1 VCC 10k 55k 56k 10k 24 VCC VEE AGCVTH 2 10k 23 LC/PD 56k APC LD AMP VEE VREF 1.25V LD 3 10k 22 LD_ON 13.4k 50µA VCC VC PD 4 21 HOLD_SW 670mV 24k A 100k 20 AGCCONT 15k 15k (60%/40%/OFF) 5 23.3k 24k 100k B 6 44.1k 23.3k 24k 20k VC 19 RF_BOT C 7 VC VC 23.3k 24k VEE 18 RFTC 25.4k D 8 23.3k 14k 5k RF SUMMING AMP 17 RF_I 5.7k RF_EQ_AMP VC VEE VEE 9 VC 260k 26k ERROR AMP FPCUS 16 RFO 174k 25p 13k VC 820k 820k 15 RFE 174k 25p 23.8k VC 26k 30k VCC VEE 23.8k 13 TE TRACKING ERROR AMP F 10 12p E 11 12p 158.45k 14 FE VC VC 12 VC BUFFER 13k 260k 158.45k R34 147 VC 15k R26 30k VC —2— CXA2568M Pin Description Pin No. Symbol IO Equivalent circuit Description 1 1 HOLD — 147 500µ VEE External hold timeconstant pin for RF level control. 50µ 147 2 AGCVTH — 2 13.4k 10µ Variable pin of reference level for RF level control. The reference level can be varied by the external resistor. VCC VCC 10k 1k 55.7k 3 LD O 3 Output pin of APC amplifier. VEE VCC 17µ 4 PD I 4 55k 147 10k Input pin of APC amplifier. VEE VEE VEE VEE —3— CXA2568M Pin No. Symbol IO Equivalent circuit VCC 24k 23.2k 25p VCC VCC VCC Description A5 5 6 7 8 A B C D I I I I B6 24k 23.2k 14k 174k 4.2k C7 24k 23.2k 100µ 8µ 174k 25p Input pin of RF and FE amplifiers for Pins 5, 6, 7 and 8. D8 24k 23.2k VEE VC VEE VC 9 VEE — VCC VCC VCC VCC VCC VCC VCC VCC VEE. 12p 12p 10 11 23 TE E LC/PD I I I 147 10 820k 23 820k 147 11 403k 403k 96.3k 8µ VEE VC 96.3k 8µ VEE VC Input pin of tracking error amplifier for Pins 10 and 11. An external resistor for V-I conversion should be connected because these pins are for current input. Pin 23 is a bias for LC when connected to VCC and for PD IC when left open. VCC VCC 200µ 120 12 VC O 147 12 120 15k 16k DC voltage output pin of (VCC+VEE)/2. Connect to GND when dual power supply (±2.5 V) is used; connect a smoothing capacitor when single power supply (+5 V) is used. VEE —4— CXA2568M Pin No. Symbol IO Equivalent circuit VCC Description 13 TE O 147 13 158.45k Output pin of tracking error amplifier. The F-E signal is output. 10p 400µ VEE VCC VEE 25p 14 FE O 147 14 174k Output pin of focus error amplifier. 10p 400µ VEE VEE 25.4k 5.7k 25µ 15 REF — 15 5k Equalizing pin of RF amplifier. Frequency response can be adjusted by connecting CR to this pin. VCC 147 25.4k 16 RFO O 16 60k 800µ Output pin of RF amplifier. 147 17 17 RF_I I 15k Input pin of RF amplifier output RFO with capacitance coupled. 20µ —5— CXA2568M Pin No. Symbol IO Equivalent circuit Description 18 RFTC — 147 18 50µ 50µ External time-constant pin for RF level control. 10µ 19 RF_BOT — 147 19 50µ 50µ External bottom timeconstant pin for RF level control. 20µ 15µ 15µ 20 AGCCONT I 147 20 50k 7µ RF level control ON (limit level of 60 % / 40 %)/ OFF switching pin. 60 % for VCC, 40 % for open or VC and OFF for VEE. 147 21 HOLD_SW I 21 RF level control hold ON/OFF switching pin. ON for VCC and OFF for VEE. VCC 50µ 147 22 LD ON I 22 VREF ON/OFF switching pin of APC amplifier. ON for VCC and OFF for VEE. 30k VEE VEE VEE VEE 24 VCC — —6— VCC Electrical Characteristics Measurement No. ±2.5 V power supply (VCC=2.5 V, VEE=–2.5 V, VC=GND) Measurement pin SW conditions Measurement item Symbol 1 ICC IEE V16-1 V16-2 OOOO OOOO OOOO O O 280 mV –280 mV 2 3 4 5 6 7 8 9 10 E1 E2 Bias conditions Description of I/O waveform and measurement method Input GND Input GND Input GND Output DC measurement Output AC measurement Output DC measurement Output DC measurement Input GND 6.5 10 13.5 –6.5 25 mA mA mV dB V V mV dB Min. Typ. Max. Unit E3 E4 AC1 AC2 I1 1 2 3 Current consumption Offset voltage 1 RF amplifier Voltage gain 24 9 16 1 kHz 100 mVp-p 16 16 16 14 O O 1 kHz 100 mVp-p O 1 kHz 100 mVp-p 14 –13.5 –10 –25 0 4 5 6 7 8 19.9 22.9 25.9 2.2 — — — 0 — –2 30.0 Maximum output amplitude H V16-3 Maximum output amplitude L Offset voltage Voltage gain 1 V16-4 V14-1 V14-2 Output DC measurement –30.0 Output AC measurement 20.3 23.3 26.3 FE amplifier 9 10 11 Voltage gain 2 Voltage gain difference Maximum output amplitude L V14-3 V14-4 V14-5 O O 14 14 V15-4=V15-2–V15-3 Output AC measurement 20.3 23.3 26.3 –3.0 0 — 1.9 –35 — 0 35 3.0 –1.9 dB dB V V mV dB O O O O O 310 mV 310 mV 14 14 13 Input GND Output DC measurement Output DC measurement Output DC measurement Output AC measurement TE amplifier APC —7— 12 13 14 Maximum output amplitude H V14-6 Offset voltage 1 Voltage gain 1 V13-1 V13-2 O 1 kHz 140 mVp-p O 1 kHz 140 mVp-p 13 21.9 24.9 27.9 15 16 17 18 19 20 21 22 23 Voltage gain 2 Voltage gain difference V13-3 V13-4 O 13 13 V13-4=V13-2–V13-3 Output AC measurement 21.9 24.9 27.9 –3.0 0 — — 3.0 — –1.9 dB dB V V V V V V V Maximum output amplitude H V13-5 Maximum output amplitude L Output voltage 1 Output voltage 2 Output voltage 3 Output voltage 4 Maximum output amplitude V13-6 V3-1 V3-2 V3-3 V3-4 V3-5 O OO 270 mV 270 mV 2.0 V 2.0 V 2.0 V 0.5 V O 2.0 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 230 µA 410 µA 590 µA 0 µA 0 µA 13 13 3 3 3 3 3 LD OFF I2=0.8 mA Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement 1.9 — — –1.5 0.6 2.1 — –1.7 –0.3 0 2.0 2.3 — 1.1 — — 0 ∗ O in the SW conditions represents the ON state. CXA2568M Measurement No. Measurement pin SW conditions Measurement item Symbol 1 2 3 4 5 6 7 8 9 10 E1 E2 Bias conditions Description of I/O waveform and measurement method Level control : 60 % (E4 : 4 V) –Level control OFF (E4 : 0.5 V) Level control : 40 % (E4 : 2.5 V) –Level control OFF (E4 : 0.5 V) Level control : –60 % (E4 : 4 V) –Level control OFF (E4 : 0.5 V) Level control : –40 % (E4 : 2.5 V) –Level control OFF (E4 : 0.5 V) HOLD OFF → ON (t=0 ms) Level control 60 % → OFF (t=10 ms) V (t=100 ms)–V (t=0 ms) HOLD OFF Level control 60 % Min. Typ. Max. Unit E3 E4 AC1 AC2 I1 24 60 % limit V3-6 OOOO O 50 mV 2.0 V 3.8 V/1.3 V 700 µA 3 –2950–2350–1150 mV 25 40 % limit V3-7 OOOO O 50 mV 2.0 V 3.3 V/1.3 V 100 kHz 1.6 Vp-p 100 kHz 1.6 Vp-p 700 µA 3 –1620–1120 –120 mV 26 RF level control –60 % limit V3-8 O 2.0 V 3.8 V/1.3 V 170 µA 3 1550 2350 2800 mV 27 –40 % limit V3-9 O 2.0 V 1.8 V/1.3 V 170 µA 3 598 1098 1598 mV 28 Hold characteristics V1-1 4 V/1 V 3.8 V/1.3 V 1 –10 –2 0 mV 29 Response characteristics 1 V1-2 1V 3.8 V/1.3 V 1 → OFF (t=0 ms) (V (t=1 ms)–V (t=0 ms))/(steady value–V (t=0 ms)) HOLD OFF Level control OFF → 60 % (t=0 ms) (V (t=1 ms)–V (t=0 ms))/(steady value–V (t=0 ms)) Output DC measurement 98 — 100 % 30 Response characteristics 2 Center output voltage V1-3 1V 3.8 V/1.3 V 1 98 — 100 % —8— 31 V12-1 12 –100 — 100 mV ∗ O in the SW conditions represents the ON state. CXA2568M CXA2568M C1 GND VEE C3 24 33µ HOLD VCC GND A 1 0.33µ S9 VCC 23 AGCVTH LC/PD 2 0.8mA S8 VEE 22 VCC LD LD_ON E2 3 I2 VCC VEE I1 R1 VEE 21 PD HOLD_SW E3 4 300 S1 VEE 20 GND A AGCCONT E4 5 R1 1M GND GND GND GND GND GND S2 B RF_BOT C3 0.01µ 19 6 S3 18 C RF TC R1 1M C3 0.01µ 7 S4 17 D RF_I 8 S10 AC2 Electrical Characteristics Measurement Circuit R3 16 VEE GND GND VEE RFO A 9 C4 33µ R2 10 10k S5 F 150k S6 R4 150k 15 REF S7 R8 11 14 GND E FE AC1 GND E1 GND 10k R9 12 13 GND VC TE 10k —9— CXA2568M Description of Functions RF Amplifier Each signal current from the photodiodes A, B, C and D is I-V converted, and input to Pins 5, 6, 7 and 8. These signals are added by the RF summing amplifier and equalized by the RF equalizing amplifier and then output to Pin 16. When the RF signal is equalized, an equalizing circuit is added to Pin 15. A I-V A B I-V B C I-V C D I-V D 5 24k RF SUMMING AMP 5.7k RF EQAMP 5k 25.4k 16 RFO RFOUT 15 REF 6 24k 14k 7 24k 4.2k 4.3k 8 24k VC VC GND Focus Error Amplifier The operation of (B+D)–(A+C) is performed and the signal is output to Pin 14. A I-V A B I-V B C I-V C D I-V D 5 23.3k 6 23.3k 25p 174k 23.3k 25p FOCUS ERROR AMP 174k 23.3k VC 14 FE FEOUT VCC 7 8 GND —10— CXA2568M Tracking Error Amplifier Each signal current from the photodiodes E and F is I-V converted and input to Pins 10 and 11 via an input resistor which determines the gain. The signal is amplified by the gain amplifier, operated by the tracking error amplifier and then the (F-E) signal is output to Pin 13. Pin 23 can be used as a bias for LC when connected to VCC and as a bias for PD IC when left open. 260k VC F I-V 150k E I-V 150k 10 820k 820k 11 VC 12p 260k 26k VC 13k 23.8k 158.45k 23 LC/PD 13 23.8k 26k VC 13k VC 12p TRACKING ERROR AMP 158.45k TE TEOUT GND —11— CXA2568M APC & Laser Power Control VCC R1 22 C3 100µ LD 3 R6 1k VCC R16 56k LD ON 22 MICRO COMPUTER L1 10µH R14 10k PD C1 1µ R3 100 R2 500 LD PD VEE 4 R7 55k R5 10k VEE HOLD_SW R15 10k R17 56k ×1 Vhold HOLD 21 MICRO COMPUTER GND 1 VEE 50µA VCC AGCVTH R18 V2 13.4k R10 20k 16 R11 44.1k VEE 17 R6 15k R4 15k V1 19 RF_BOT R9 1M C4 0.1µ VEE R19 1M R13 100k 670mV VREF 1.25V R20 12.5k 20 VL C6 10µ VEE 2 RFO C2 0.01µ RF_I AGCCONT MICRO COMPUTER R12 100k 18 RFTC C5 1µ VEE —12— CXA2568M • APC When the laser diode is driven by a constant current, the optical power output has extremely large negative temperature characteristics. The APC circuit is used to maintain the optical power output at a constant level. The laser diode current is controlled according to the monitor photodiode output. APC is set to ON by connecting the LD ON pin to VCC ; OFF by connecting it to VEE. • Laser Power Control (LPC) The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the RF level fluctuations. The RFO and RF_I levels are compared and the larger of the two is smoothed by the RFTC’s external CR. This signal is then compared with the reference level. The laser power is controlled by attaching an offset to VL according to the results of comparison with the reference level. Set the reference level to 670 mV. (center voltage reference) When the reference level is changed, connect the external resistor to the AGCVTH pin (Pin 2). The reference level can be lowered by connecting the resistor between Pin 2 and the center output voltage or between Pin 2 and VCC. The AGCCONT pin (Pin 20) is used to switch the level of the laser power control circuit ; OFF, ON (laser power limit of 40 %) and ON (laser power limit of 60 %). The HOLD_SW pin (Pin 21) is used to switch the hold ON and OFF for the VL signal. Set this pin to ON so as not to follow the fluctuation of the RF signal. AGCCONT L (VEE) M (VC or OPEN) H (VCC) LPC OFF ON ON LPC limit — 40 % 60 % VL variable range Approximately 1.27 V Approximately 1.27 V±350 mV Approximately 1.27 V±570 mV —13— CXA2568M The hold ON/OFF operation is approximately as follows. 1. HOLD : Operation for OFF (a) | VL–Vhold | ≥2VT VL IC (VT≈26 mV) ×1 21 HOLD C Vhold VEE VEE (typ.) Ic=500 µA (VLVhold) (b) | VL–Vhold |