CXA2570N

CXA2570N RF Matrix Amplifier Description The CXA2570N is an IC developed for the RF signal processing of compact disc players. Features • Wide band RF signal processing • RF system VCA circuit • RF system equalizer (supports CAV mode) • Supports pickups with built-in RF summing amplifier • Low power consumption mode (EQ Pass mode) • RW/ROM switching mode Functions • RFAC summing amplifier, equalizer, VCA • RFDC summing amplifier • Focus error amplifier • Tracking error amplifier • Automatic power control • VC buffer amplifier Applications CD-ROM/RW compatible systems Structure Bipolar silicon monolithic IC 24 pin SSOP (Plastic) Absolute Maximum ratings • Supply voltage Vcc • Operating temperature Topr • Storage temperature Tstg • Allowable power dissipation PD 7 V –20 to +75 °C –65 to +150 °C 620 mW Operating Conditions • Supply voltage Vcc – GND 3.0 to 5.5 V • Operating temperature Topr –20 to +75 °C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E98259A98-PS CXA2570N Connected Circuit Diagram 0.1µ VCC ACSUM EQI AC SUM RF VC A B C D A B C D DC SUM RW/ROM C VC D VC RW/ROM RW/ROM F VC E PD VC LD SW APC-OFF (Hi-Z) RW/ROM (H/L) VC APC F E 10k F E VC RW/ROM VC RW/ROM VCC 5.1k ACG AC VCA BST Rfc Vfc RFAC EQ RFDCI 5.1k RFDC RFDCO FEI 100k VC FE FE RFAC A VC B VC A B C D TE TE 10k RW/ROM VCC VC VCC VCC GND VCC VC GND VCC 0.1 ACSUM AC SUM DC SUM RW/ROM C VC D VC RW/ROM RW/ROM F VC E PD VC LD SW APC-OFF (Hi-Z) RW/ROM (H/L) VC APC RW/ROM VCC VC VCC GND F E 10k F E VC TE TE A B C D A B C D RW/ROM VC RW/ROM FEI 100k VC FE FE VCC EQI ACG AC VCA 5.1k BST Rfc Vfc RFAC EQ RFDCI 5.1k RFDC RFDCO RFAC A VC B VC 10k VCC VCC VC GND –2– CXA2570N Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol LD PD EQ_IN AC_SUM GND A B C D E F SW RFAC FE FEI TE VCC RFG BST VFC RFC VC RFDCO RFDCI I/O Out In In Out In In In In In In In In Out Out — Out In In In In In Out Out — APC amplifier output. APC amplifier input. RFAC system VCA block and EQ block input. RFAC system RF SUM output. Ground. A signal input. B signal input. C signal input. D signal input. E signal input. F signal input. Mode switching signal input. RFAC signal output. Focus error signal output. FE amplifier virtual ground. Tracking error signal output. VCC. RFAC system VCA block low-frequency gain adjustment. EQ boost amount adjustment range. EQ cut-off frequency adjustment. EQ cut-off frequency adjustment. VC voltage output. RFDC signal output. RFDC amplifier virtual ground. Description –3– CXA2570N Pin Description and Equivalent Circuit Pin No. Symbol I/O Equivalent circuit Description 10k 1 LD O 1 1k APC amplifier output. 2 PD I 55k 20k 2 20k APC amplifier input. 1.1k 1.1k 3 EQ_IN I 3 5k VC 1.2k Equalizer circuit input. 5k VC 1.6k 1.6k 4 AC_SUM O 4 RFAC summing amplifier output. 5 GND — — Ground. –4– CXA2570N Pin No. Symbol I/O Equivalent circuit Description 6 A I 15k 6 7 B I 7 100µA 100µA 30k RF summing amplifier and focus error amplifier input. 8 C I 8 100µA 9 100µA 47k VC 47k 9 D I 10 E I 27k 10 27k Tracking error amplifier input. 124 16 11 F I 11 16 TE O Tracking error amplifier output. 200k 12 SW I 200k 12 200k CD-ROM/RW switching input. RW when connected to VCC, ROM when connected to GND. 13 RFAC O 2mA 100 13 RFAC amplifier output. 14 FE O 50k VC 124 14 124 15 Focus error amplifier output. Focus error amplifier gain adjustment. The gain is adjusted by the external resistance value connected between this pin and Pin 14. 15 FEI I –5– CXA2570N Pin No. 17 Symbol VCC I/O — Equivalent circuit — Description Power supply. 20k 18 RFG I 18 VC 100µA Sets the RFAC low-frequency gain. 50µA 19 BST I 20k 19 VC Input for adjusting the equalizer circuit boost amount. 20k 20 VFC I 20 VC 100µA Input for adjusting the equalizer circuit boost frequency with the control voltage. 1.0V 124 21 RFC I 21 Input for adjusting the equalizer circuit boost frequency with external resistance. 22 VC O 150k 25 22 150k (VCC + GND)/2 voltage output. 23 RFDC O 1.5k 124 24 VC 1mA 23 124 RFDC amplifier output. This pin serves as the eye pattern check point. RFDC amplifier gain adjustment. The gain is adjusted by the external resistance value connected between this pin and Pin 23. 24 RFDCI I –6– Electrical Characteristics Switch conditions S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 V1 amplitude V1 frequency E1 E2 0V 0V 0V Pin current Pin current Pin current Pin voltage 20 log (Vout/Vin) 20 log (Vout/Vin) – Gsum Pin voltage Pin voltage Pin voltage Pin voltage 3.0 10 25 5 –1.2 –0.6 25 45 17 17 4 O O O O O O O 0V 13 13 1.6Vp-p 100kHz –1.0V 0V 1.0V –1.0V 0V 1.0V 0V –1.9V 1.9V 1.9V 0V 2V –2V 0V O O O O O O O O O O O O O O O O O O O O O O O O O O O 0.1Vp-p 100kHz 25mVp-p 100kHz 0.1Vp-p 10MHz 25mVp-p 10MHz 0.25V –0.25V 0V 0.8Vp-p 100kHz 0.3Vp-p 100kHz O 0.4Vp-p 100kHz 0.2Vp-p 100kHz 75mVp-p 100kHz 0.8Vp-p 100kHz 0.2Vp-p 10MHz 0.2Vp-p 30MHz 0.8Vp-p 30MHz O O O O 13 13 13 13 13 13 13 13 13 13 13 13 23 23 23 23 23 23 23 23 O O O O O O O O O O O O O –0.3V 4 0.3V 4 0.1Vp-p 30MHz 4 O O O O O O O O O 0.1Vp-p 100kHz 4 1.9V Hi-Z 0V 17 0V E3 E4 E5 0V Measurement pin 65 40 7.5 0 Measurement conditions Bias conditions Min. Typ. Max. Unit mA mA mA V 14.0 16.0 18.0 dB –3.0 –1.5 0.3 0.9 — –0.3 –0.3 1.25 — –0.5 –0.3 0 0 0.3 0.3 dB V V V V 20 log (Vout/Vin) – Gac_ROM2 –11.0 –8.0 –5.0 dB 20 log (Vout/Vin) 20 log (Vout/Vin) – Gac_ROM2 20 log (Vout/Vin) – Gac_RW2 20 log (Vout/Vin) – Gac_ROM2 20 log (Vout/Vin) – Gac_RW2 20 log (Vout/Vin) 20 log (Vout/Vin) – Gac_ROM2 20 log (Vout/Vin) – Gac_ROM2 20 log (Vout/Vin) – Gac_EQoff Pin voltage – AC_OfstROM Pin voltage – AC_OfstROM Pin voltage Pin voltage 20 log (Vout/Vin) 20 log (Vout/Vin) –1.0 5.0 2.0 5.0 dB 8.0 11.0 dB –11.0 –8.0 –5.0 dB 9.0 5.0 –1.0 3.5 3.5 12.0 15.0 dB 8.0 11.0 dB 2.0 6.0 6.0 5.0 8.5 8.5 dB dB dB –2.0 –1.0 –0.5 dB 0.6 — –150 –100 0.8 — –0.8 –0.6 0 0 V V 150 mV 400 mV 16.5 19.5 22.5 dB 29.0 32.0 35.0 dB 20 log (Vout/Vin) – Gdc_ROM –3.5 –1.5 –0.5 dB 20 log (Vout/Vin) – Gdc_RW Pin voltage Pin voltage –6.0 –3.0 –0.5 dB 1.3 — 1.6 — –1.0 –0.6 V V (VCC = 1.9V, VEE = –1.9V) Measurement No. 1 Function Measurement item Symbol Current consumption (Active, EQ On) Icc_Aeqon 2 Current consumption (Active, EQ Off) Icc_Aeqoff 3 Current consumption (Sleep) Icc_Slp 4 SUM offset voltage ACSUM_Ofst 5 SUM frequency gain Gsum 7 RFAC SUM 6 SUM frequency response Fsum SUM maximum output voltage H Vsum_H 8 SUM maximum output voltage L Vsum_L 9 Offset voltage ROM AC_OfstROM 10 Offset voltage RW AC_OfstRW 11 Low-frequency gain ROM_min Gac_ROM1 12 Low-frequency gain ROM_cnt Gac_ROM2 13 Low-frequency gain ROM_max Gac_ROM3 RFAC EQ RFDC –7– 14 Low-frequency gain RW_min Gac_RW1 15 Low-frequency gain RW_cnt Gac_RW2 16 Low-frequency gain RW_max Gac_RW3 17 Low-frequency gain EQ_off Gac_EQoff 18 Frequency response Min_L Fac_MinL 19 Frequency response Min_H Fac_MinH 20 Frequency response EQ_OFF Fac_ECoff 21 Maximum output voltage H Vac_H 22 Maximum output voltage L Vac_L 23 Offset voltage ROM DC_OfstROM 24 Offset voltage RW DC_OfstRW 25 Low-frequency gain ROM Gdc_ROM 26 Low-frequency gain RW Gdc_RW 27 Frequency response ROM Fdc_ROM 28 Frequency response RW Fdc_RW 29 Maximum output voltage H Vdc_H CXA2570N 30 Maximum output voltage L Vdc_L Switch conditions S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 V1 amplitude V1 frequency E1 E2 0V Pin voltage –150 –150 0 Pin voltage 20 log (Vout/Vin) 20 log (Vout/Vin) 20 log (Vout/Vin) 20 log (Vout/Vin) 14 0.1Vp-p 10kHz 14 14 14 14 14 14 14 14 0.3V –0.3V 0V O O O O O O O O O O O O O O O O O O Hi-Z O O 0.1Vp-p 200kHz 0.1Vp-p 200kHz 25mVp-p 200kHz 25mVp-p 200kHz 0.3V –0.3V 0V –30mV 30mV 0V O 25mVp-p 10kHz O 25mVp-p 10kHz 0.1Vp-p 10kHz 0.1Vp-p 10kHz 14 14 16 16 16 16 16 16 16 16 16 16 16 16 1 1 1 1 1 22 O O O O O O O O O O O O O O O 25mVp-p 50kHz O 25mVp-p 50kHz O 0.1Vp-p 100kHz 0.1Vp-p 100kHz O O 25mVp-p 10kHz O 25mVp-p 10kHz 0.1Vp-p 10kHz 0V 0V 0V 14 0 E3 E4 0V O O O O O E5 Measurement pin Min. Typ. Max. Unit 150 mV 150 mV Measurement conditions Bias conditions Measurement No. 31 Function Measurement item Symbol Offset voltage ROM FE_OfstROM 32 Offset voltage RW FE_OfstRW 33 Low-frequency gain ROM1 Gfe_ROM1 13.0 16.0 19.0 dB 13.0 16.0 19.0 dB 25.0 28.0 31.0 dB 25.0 28.0 31.0 dB dB dB –3.5 –0.5 0.3 –3.5 –0.5 0.3 dB dB 34 Low-frequency gain ROM2 Gfe_ROM2 35 Low-frequency gain RW1 Gfe_RW1 FE 36 Low-frequency gain RW2 Gfe_RW2 37 Frequency response ROM1 Ffe_ROM1 20 log (Vout/Vin) – Gfe_ROM1 –3.5 –0.5 0.3 20 log (Vout/Vin) – Gfe_ROM2 –3.5 –0.5 0.3 20 log (Vout/Vin) – Gfe_RW1 20 log (Vout/Vin) – Gfe_RW2 Pin voltage Pin voltage Pin voltage Pin voltage 20 log (Vout/Vin) 20 log (Vout/Vin) 20 log (Vout/Vin) 20 log (Vout/Vin) 38 Frequency response ROM2 Ffe_ROM2 39 Frequency response RW1 Ffe_RW1 40 Frequency response RW2 Ffe_RW2 41 Maximum output voltage H Vfe_H 1.2 — –150 –150 1.7 — –1.5 –1.1 0 0 V V 150 mV 150 mV 17.0 20.0 23.0 dB 17.0 20.0 23.0 dB 29.0 32.0 35.0 dB 29.0 32.0 35.0 dB 20 log (Vout/Vin) – Gte_ROM1 –1.5 20 log (Vout/Vin) – Gte_ROM2 –1.5 20 log (Vout/Vin) – Gte_RW1 20 log (Vout/Vin) – Gte_RW2 Pin voltage Pin voltage Input where output voltage = 0V Pin voltage Pin voltage Pin voltage Pin voltage Pin voltage 0 0 1.5 1.5 dB dB –4.5 –2.0 –0.2 dB –4.5 –2.0 –0.2 dB 1.2 — 85 0.45 1.7 — –1.5 –1.1 V V 135 185 mV 0.7 0.95 V –0.95 –0.7 –0.45 V 1.4 –0.2 –100 1.6 0 0 – 0.6 V V 100 mV 42 Maximum output voltage L Vfe_L 43 Offset voltage ROM TE_OfstROM 44 Offset voltage RW TE_OfstRW TE APC VC –8– 45 Low-frequency gain ROM1 Gte_ROM1 46 Low-frequency gain ROM2 Gte_ROM2 47 Low-frequency gain RW1 Gte_RW1 48 Low-frequency gain RW2 Gte_RW2 49 Frequency response ROM1 Fte_ROM1 50 Frequency response ROM2 Fte_ROM2 51 Frequency response RW1 Fte_RW1 52 Frequency response RW2 Fte_RW2 53 Maximum output voltage H Vte_H 54 Maximum output voltage L Vte_L 55 Output voltage 1 Vapc1 56 Output voltage 2 Vapc2 57 Output voltage 3 Vapc3 58 APC OFF voltage Vapc_off 59 Maximum output current Iapc_max CXA2570N 60 Output voltage Vvc CXA2570N Electrical Characteristics Measurement Circuit VCC 5.1k 24 RFDCI 23 RFDCO 10k 22 VC S12 21 RFC 5.1k 20 VFC E5 19 BST E4 18 RFG E3 VCC 1.9V 10k 17 VCC 16 TE 15 FEI 100k 14 FE 10k 13 RFAC 12 S11 VEE VCC SW 10k AC_SUM EQ_ IN GND PD LD C D A B E 1 S1 S2 2 S3 3 4 10k 5 6 7 8 9 10k 10 10k S10 11 E2 0.8mA 0.1µ VCC VEE V1 E1 VEE S5 –1.9V S6 S7 S8 S9 –9– F CXA2570N Application Circuits RFDC OUT 5.1k 24 RFDCI 23 RFDCO VC VCC 0.1µ 20k 5.1k VCC 20k 20k TE OUT FE OUT 100k RFAC OUT 22 VC 21 RFC 20 VFC 19 BST 18 RFG 17 VCC 16 TE 15 FEI 14 FE 13 RFAC 12 MODE Control RFAC OUT 13 RFAC 12 MODE Control SW SW AC_SUM EQ_ IN GND PD LD C D A B E 1 2 3 0.1µ 4 5 6 A 7 B 8 C 9 D 10k 10 10k E 11 LD PD IN Drive RF SUM RFDC OUT 5.1k 24 RFDCI 23 RFDCO VC VCC 0.1µ 20k 5.1k VCC 20k 20k TE OUT FE OUT 100k 22 VC 21 RFC 20 VFC 19 BST 18 RFG 17 VCC 16 TE 15 FEI 14 FE 11 10k F F AC_SUM EQ_ IN GND PD LD C D A B 1 2 3 0.1µ 4 5 6 A 7 B 8 C 9 D 10k 10 PD IN LD Drive E Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. – 10 – E F F CXA2570N Description of Functions • RFAC The RF signal input by connecting capacitance to the EQ_IN pin is equalized, arithmetically amplified and then output from the RFAC pin. A6 B7 C8 D9 AC_SUM 4 AC SUM BST VFC 19 20 21 RFC VCC 5.1k 0.1 RF EQ_IN 3 RFG 18 RW/ROM Low-frequency gain AC_SUM: 16dB (both ROM/RW) VCA to RFAC ROM: 2dB RW: 14dB EQ Amp 13 RFAC When BST = VCC The EQ can be bypassed by connecting the BST control pin (Pin 19) to VCC. In this case only the EQ block enters sleep mode and the low power consumption mode (slim mode) is activated. The low-frequency gain is the same value as for EQ ON mode. The RF_SUM input dynamic range is VC ± 300mV (typ.). If RF (summing signal) is present at the pickup output pin, input the addition output signal to the EQ_IN pin (Pin 3) coupled by capacitance. When using a pickup without a summing output function, perform addition with the AC SUM block and then input the signal to the EQ_IN pin coupled by capacitance. RW/ROM switching is done by the VCA block, so either input method can be used without problem. The RW gain is 12dB higher than the ROM gain. The VCA low-frequency gain can be adjusted by the RFG pin (Pin 18) voltage. The control voltage vs. low-frequency gain characteristics are shown in the graph to the right. Gain [dB] VCA variable range 8 0 –8 Vcut [V] VC – 1 VC VC + 1 The RFAC pin (Pin 13) is an NPN transistor emitter follower output. The maximum drive current is approximately 2mA. If the load capacitance distorts the output waveform, increase the drive current. Connect resistance between Pin 13 and GND. – 11 – CXA2570N • EQ The diagram to the left shows the EQ internal block diagram. The EQ consists of a combination of HPF and LPF. The HPF and LPF transmittance is the Bessel function. The boost gain can be adjusted by adjusting the HPF gain. The boost frequency is adjusted by the RFC external resistance value and the VFC control voltage value. RFC resistance value: The cut-off frequency fo of each filter is adjusted by the Pin 21 external resistance value. The VFC voltage can be varied using this fo as the reference. VFC voltage: fo can be changed by the voltage applied to Pin 20. In HPF Amp LPF fc Boost LPF Out EQ CNT RFC 21 VFC 20 BST 19 VCC VC VC The boost gain can be adjusted by the BST pin control voltage. The control characteristics are shown in the graph below. Boost Gain [dB] 8dB The cut-off frequency control characteristics are shown in the graph below. fc [Hz] 1.5fo fo 0dB Vcut [V] VC – 1.0 VC Pin 19 voltage VC + 1.0 0.5fo Vcut [V] VC – 1.0 VC Pin 20 voltage VC + 1.0 • APC (Automatic Power Control) When the laser diode is driven by a constant current, the optical power output has extremely large negative temperature characteristics. Therefore, the current must be controlled to maintain the monitor photodiode output at a constant level. This control is performed by the APC function VCC 56k PD 2 10k 10k 55k 10k 56k 1.25V 1 LD 1k – 12 – CXA2570N • Focus Error The signals input to the A and C pins and the B and D pins are arithmetically amplified and the focus error signal is output. This circuit has RW/ROM switching, low-frequency gain adjustment and offset adjustment (external resistance) functions. VC R (ofst) ROM 50k A6 C8 B7 D9 30k ROM 50k 200k RW VC 50k RW 200k FEI 15 14 FE 100k FE = Gain {(B + D) – (A + C)} Low-frequency gain ROM: 16dB RW: 28dB Cut-off frequency fc (typ.) ROM: 400kHz RW: 300kHz • Tracking Error The signals input to the E and F pins are arithmetically amplified and the tracking error signal is output. This circuit has RW/ROM switching, low-frequency gain adjustment and offset adjustment (external resistance) functions. 10k E 10 RW 10k F 11 RW 27k 373k VC ROM ROM 16 TE 27k 373k TE = Gain (F – E) Low-frequency gain fc (typ.) ROM: 20dB RW: 32dB ROM: 1MHz RW: 250kHz • VC Buffer This outputs the VC ((1/2) VCC) voltage. The maximum output current is approximately ±3mA. VCC VCC 25 22 40k 40k – 13 – CXA2570N • RFDC The signals input via the A, B, C and D pins are added, amplified and the RFDC signal is output. RW/ROM switching, low-frequency gain adjustment and offset adjustment are possible. 5.1k A6 B7 C8 D9 VC 15k 10k ROM RW 1.5k RFDCI 24 23 RFDCO 40k VC RFDC = Gain (A + B + C + D) Low-frequency gain ROM: 20dB RW: 32dB fc (Typ.) ROM: 12MHz RW: 5MHz The gain can be adjusted by the external resistance connected between Pins 23 and 24. • SW This controls the laser (APC) on/off, active/sleep mode, and RW/ROM mode switching. Switching is controlled by the voltage applied to the SW pin (Pin 12). 12 R (ofst) SW RW/ROM, Active/Sleep, APC_ON/OFF The VC buffer is kept active even in sleep mode. In the function block, BGR and MODE_SW are always set to active mode. Item Control voltage VCC VC or Hi-Z GND APC ON OFF ON Active/Sleep Active Sleep Active RW/ROM RW — ROM – 14 – CXA2570N Notes on Operation Stabilizing the RFAC signal The RFAC system (RFSUM + EQ) is comprised entirely of non-inverted function blocks. This is in order to support pickups with built-in RFSUM. Therefore, if the voltage gain of each block is increased, a feedback loop is formed over the entire RFAC system causing the RFAC signal to become unstable (oscillate). In these cases, it is recommended to lower the EQ frequency response and the boost gain. This has a large effect on the board (power supply, I/O signal cross talk, etc.) loop. The RFAC signal easily becomes unstable if the VCA gain is increased, the EQ boost frequency is set to a high frequency, the EQ boost amount is increased, etc. The VCA gain is low in ROM mode, so the RFAC signal is stable. Also, when not using RFSUM, the RFAC signal is stabilized because the overall gain is low. The area where the RFAC signal becomes unstable is thought to vary for each set, as this is greatly affected by the board loop as noted above. Proposed stabilization measures The board and other loop characteristics can be changed by adding external capacitance as noted below. This has a particularly large effect on the stabilization when using RFSUM. 0.1µ VCA ACSUM EQI EQ AMP RF SUM Add capacitance of 10pF to 20pF. – 15 – CXA2570N Example of Representative Characteristics EQ Rfc resistance value – Frequency response 10 Vbst = VC, Vfc = VC 9 8 7 6 Rfc = 100kΩ Rfc = 20kΩ Rfc = 5.1kΩ 12 10 8 6 14 EQ boost voltage – Frequency response Rfc = 100kΩ Vboost = 1.0V Rfc = 100kΩ Vboost = 0V Rfc = 5.1kΩ Vboost = 1.0V Rfc = 5.1kΩ Vboost = 0V Vfc = VC [dB] 5 4 3 2 1 0 0.1 1 [MHz] 10 100 [dB] 4 2 0 –2 –4 0.1 1 [MHz] 10 100 Rfc = 100kΩ Vboost = –1.0V Rfc = 5.1kΩ Vboost = –1.0V EQ Vfc frequency response 10 9 8 7 6 Rfc = 20kΩ Vfc = –1V Rfc = 20kΩ Vfc = 0V Vbst = VC Rfc = 20kΩ Vfc = 1V 17 14 11 8 20 RF AC frequency response AC SUM EQ_Pass RW mode [dB] 5 4 3 2 1 0 0.1 1 [MHz] 10 100 [dB] 5 2 –1 –4 –7 0.1 1 [MHz] 10 100 EQ_Pass ROM mode RF DC frequency response 38 35 32 29 26 RW 34 31 28 25 22 FE frequency response RW [dB] 23 20 17 14 11 8 0.1 [dB] ROM 19 16 13 10 7 ROM 1 [MHz] 10 100 4 0.01 0.1 [MHz] 1 10 – 16 – CXA2570N TE frequency response 35 32 29 26 23 RW 5.5 5.0 4.5 APC I/O characteristics VLD – Output voltage [V] 4.0 VCC = 5.5V 3.5 3.0 2.5 2.0 VCC = 3.0V 1.5 1.0 [dB] 20 17 16 13 10 0.01 0.1 [MHz] 1 10 ROM 0.5 0.05 0.1 0.15 0.2 VPD – Input voltage [V] 0.25 – 17 – CXA2570N Package Outline Unit: mm 24PIN SSOP(PLASTIC) + 0.2 1.25 – 0.1 ∗7.8 ± 0.1 0.1 13 24 A 1 + 0.1 0.22 – 0.05 12 + 0.05 0.15 – 0.02 0.65 0.1 ± 0.1 0.13 M ∗5.6 ± 0.1 0° to 10° NOTE: Dimensions “∗” does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-24P-L01 SSOP024-P-0056 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 0.1g NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). – 18 – 0.5 ± 0.2 7.6 ± 0.2