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CXA3010Q

CXA3010Q

  • 厂商:

    SONY(索尼)

  • 封装:

  • 描述:

    CXA3010Q - Read/Write Amplifier (with Built-in Filters) for FDDs - Sony Corporation

  • 数据手册
  • 价格&库存
CXA3010Q 数据手册
CXA3010Q Read/Write Amplifier (with Built-in Filters) for FDDs For the availability of this product, please contact the sales office. Description The CXA3010Q is a monolithic IC designed for use with three-mode Floppy Disk Drives, and contains a read circuit (with a four-mode filter system), a write circuit, an erase circuit, and a supply voltage detection circuit, all on a single chip. Features • Single 5V power supply • Filter system can be switched among four modes: 1M, 1.6M/2M, which are each inner track/outer track • Filter characteristics can be set to Chebyshev (1dB ripple) for 1.6M, 2M/inner track only, and to Butterworth for the other modes • A custom selection can be made between Chebyshev (1dB ripple) and Butterworth for the filter characteristics for 1.6M, 2M/inner track only • Permits customization of the fc ratio • Low preamplifier input conversion noise voltage of 2.0nV/√ Hz (typ.) keeps read data output jitter to a minimum • Preamplifier voltage gain can be switched between 39dB and 45dB • In inner track mode (OTF = Low), the voltage gain is boosted by 3dB, making it possible to minimize peak shift in inner tracks. • Time domain filter can be switched between two modes: 1M, 1.6M/2M • Write current can be switched among three modes: 1M/1.6M/2M. The inner/outer track current ratio is fixed for each mode, but can be customized. • Erase current can be set by an external resistor, and remains constant. In addition, the current rise time Tr and fall time Tf are determined according to the head inductance and current. (Refer to page 20.) • Damping resistor can be built in. Resistance can be customized between 2kΩ and 15kΩ in 1kΩ steps. A damping resistor can not be connected to this IC, however. • Supply voltage detection circuit 32 pin QFP (Plastic) Applications Three-mode FDDs Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = 25°C) 7.0 V • Supply voltage VCC • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 500 mW • Digital signal input pin Input voltage –0.5 to VCC + 0.3 V • Power ON output voltage applied VCC + 0.3 V • Erase output voltage applied VCC + 0.3 V • Write head voltage applied 15 V • Write current IW 20 mAo-p • Erase current IE 30 mA • Power on output current 7 mA Operating Conditions Supply voltage 4.4 to 6.0 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E94Y32A52-ST CXA3010Q Block Diagram and Pin Configuration PREOUTA HEAD1B 24 WCLD 25 23 22 21 20 19 18 17 16 NC WCMD 26 PREAMP WCHD 27 FILTER DIFF + LPF (BPF) PREOUTB HEAD0A HEAD0B HEAD1A X360 XHG 15 FILTER OUTA FILTER 14 OUTB IESET 28 WRITE DRIVER 13 COMP 12 A.GND D.GND 29 MMVA ERA0 30 ERASE DRIVER POWER MONITOR CONTROL LOGIC TIME DOMAIN FILTER 11 FCSET ERA1 31 10 VCC XPS 32 1 2 3 4 5 6 7 8 9 XHD XWD POWER ON XWG XEG –2– OTF RD XCI XS1 CXA3010Q Pin Description Pin No. Symbol Pin voltage Equivalent circuit VCC 100k 1 Description 1 POWER ON — Reduced voltage detection output. This is an open collector pin that outputs a low signal when VCC is below the specified value. A.GND VCC 2 XWD — 1k 2 2.3V Write data input. This pin is a Schmitt-type input that is triggered when the logical voltage goes from High to Low. A.GND VCC 140 3 RD — 3 Read data output. This pin is active when the logical voltage of the write gate signal and the erase gate signal is High. D.GND 4 XCI — Write current control. The write current increases when the logical voltage is Low. Write gate signal input. The write system becomes active when the logical voltage is Low. VCC 4 5 6 7 8 9 A.GND 2.1V 1k 100k 5 XWG — 6 XEG — Erase gate signal input. The erase system becomes active when the logical voltage is Low. Head side switching signal input. The HEAD1 system is active when the logical voltage is Low, and the HEAD0 system is active when the logical voltage is High, but only when the logical voltage for the write gate and the erase gate is High. Filter inner track/outer track mode control. Inner track mode is selected when the logical voltage is Low. Filter, time domain filter and write current 1M/2M mode control. 2M mode is selected when the logical voltage is Low. 7 XS1 — 8 OTF — 9 XHD — –3– CXA3010Q Pin No. Symbol Pin voltage Equivalent circuit VCC Description Filter, time domain filter and write current 1M/1.6M mode control. 1.6M mode is selected when the logical voltage is Low. Preamplifier voltage gain selection. Gain is boosted by 6dB when the logical voltage is Low compared to when the logical voltage is High. Power supply (5V) connection. VCC 18 X360 — 18 20 1k 100k 20 XHG — 2.1V A.GND 10 VCC — 1.2V 1k 11 147 11 FCSET 3.8V Filter cutoff frequency setting resistor connection. Connect the filter cutoff frequency setting resistor RF between this pin and VCC in order to set the cutoff frequency. A.GND VCC 12 MMVA 0.5V 1.2V 147 12 A.GND Time domain filter 1st monostable multivibrator pulse width setting. Connect the 1st monostable multivibrator pulse width setting resistor RA between this pin and A.GND. 13 A.GND FILTER OUTB — VCC 140 140 Analog system GND connection. 14 3.4V 14 15 Filter differential outputs. 15 FILTER OUTA (NC) 3.4V 300µ A.GND 300µ 16 Not connected. VCC 140 140 17 PRE OUTB 3.4V 17 19 Preamplifier differential outputs. 19 PRE OUTA 3.4V 200µ A.GND 200µ –4– CXA3010Q Pin No. 21 Symbol Pin voltage — Equivalent circuit Description HEAD 1B 24 23 22 21 22 HEAD 1A — 23 HEAD 0B — Magnetic head input/output connections. Connect the recording/playback magnetic head to these pins, and connect the center tap to VCC. When the logical voltage for Pin 7 (XS1) is Low, the HEAD1 system is active; when the logical voltage is High, the HEAD0 system is active. A.GND 24 HEAD 0A — 25 WCLD 5V when XWG = High 3.8V when XWG = Low VCC 1.2V 147 147 25 26 27 147 1M write current setting resistor connection. Connect the write current setting resistor RWLD between this pin and VCC to set the write current. 1.6M write current setting resistor connection. Connect the write current setting resistor RWMD between this pin and VCC to set the write current. 2M write current setting resistor connection. Connect the write current setting resistor RWHD between this pin and VCC to set the write current. 26 WCMD 27 WCHD A.GND 5V when XEG = High 28 IESET 3.8V when XEG = Low 29 D.GND — VCC 1.2V 147 28 Erase current setting resistor connection. Connect the erase current setting resistor RE between this pin and VCC to set the erase current. A.GND Digital system GND connection. VCC 30 ERA0 — 30 31 Erase current connection for the HEAD0 system. 31 ERA1 — A.GND Erase current connection for the HEAD1 system. –5– CXA3010Q Pin No. Symbol Pin voltage Equivalent circuit Description VCC 162k 1k 32 XPS — 32 2.1V A.GND Power saving signal input. When the logical voltage is Low, the IC is in power saving mode. In power saving mode, only the power supply on/off detector operates. –6– CXA3010Q Electrical Characteristics Current Consumption Item Symbol Conditions XWG = High Measure- MeasureMin. ment circuit ment Point — — — — — — 16 7 — (Ta = 25°C, VCC = 5V) Typ. Max. 26 13 0.95 36 19 1.9 Unit mA mA mA Current consumption ICCR in read mode XWG = Low, Current consumption ICCWE XEG = Low in write/erase mode Current consumption ICCPS in power saving mode XPS = Low Power Supply Monitoring System Item Power supply on/off detector threshold voltage Power on output saturation voltage Symbol Conditions Measure- MeasureMin. ment circuit ment Point — VCC = 3.5V I = 1mA — 3.5 (Ta = 25°C) Typ. Max. Unit VTH 3.9 4.3 V VSP — — — — 0.5 V Read System Item Symbol Conditions f = 100kHz OTF = High, XHG = High f = 100kHz OTF = Low, XHG = High f = 100kHz OTF = High, XHG = Low f = 100kHz OTF = Low, XHG = Low GV/GV (100kHz) = –3dB Band Width = 400Hz to 1MHz, VI = 0 Measure- MeasureMin. ment circuit ment Point 1 1 1 1 1 D, E D, E D, E D, E D, E 37.1 40.1 43.1 46.1 5 (Ta = 25°C, VCC = 5V) Typ. Max. 39.0 42.0 45.0 48.0 — 40.6 43.6 46.6 49.6 — Unit dB dB dB dB MHz nV/√ Hz Preamplifier voltage gain GVLO Low gain/outer track Preamplifier voltage gain GVLI Low gain/inner track Preamplifier voltage gain GVHO High gain/outer track Preamplifier voltage gain GVHI High gain/inner track Preamplifier frequency response Preamplifier input conversion noise voltage Preamplifier differential output offset voltage Filter differential output offset voltage Filter differential output voltage amplitude BW EN 1 D, E — 2.0 2.9 VOFSP VI = 0 1 D, E –500 — +500 mV VOFSF VI = 0 1 B, C –100 — +100 mV VOF 1 B, C 2.8 — — Vp-p –7– CXA3010Q Read System Item Symbol Conditions X360 = High, XHD = High (1M mode) Time domain filter monostable multivibrator pulse width T1 X360 = Low, XHD = High (1.6M mode) or X360 = X, XHD = Low (2M mode) Refer to Fig. 1 Refer to Fig. 1 IOL = 2mA IOH = –0.4mA RL = 2kΩ CL = 20pF RL = 2kΩ CL = 20pF VI = 0.25mVp-p to 3.5mVp-p XHG = Low, XHD = Low OTF = Low f = 125kHz, 2M/ inner track mode Refer to Fig. 1 Measure- MeasureMin. ment circuit ment Point 1 A, F 2.25 (Ta = 25°C, VCC = 5V) Typ. Max. 2.5 2.75 Unit µs 1 A, F 1.13 1.25 1.38 µs Read data pulse width T2 1 1 1 1 1 A A A A A 260 — 2.8 — — 400 — — — — 540 0.5 — 100 100 ns V V ns ns Read data output low VOL output voltage Read data output high output voltage Read data output∗1 rise time Read data output∗1 fall time VOH tr tf Peak shift∗2 PS 1 A — — 1 % ∗1 Read data output: 0.5V to 2.4V ∗2 Signal input level Low gain/outer track: VI = 0.5mVp-p to 10mVp-p Low gain/inner track: VI = 0.5mVp-p to 7mVp-p High gain/outer track: VI = 0.25mVp-p to 5mVp-p High gain/inner track: VI = 0.25mVp-p to 3.5mVp-p –8– CXA3010Q External Comparator Output (Measurement point F) Read data output (Measurement point A) 1.4V T1 T2 TA TB Fig. 1 1st and 2nd monostable multivibrator pulse width precision and peak shift measurement conditions • 1st monostable multivibrator pulse width precision When X360 = High and XHD = High: ETM1 = ( T1 –1) × 100 [%] 2.5µs When X360 = Low and XHD = High, or X360 = X and XHD = Low: ETM1' = ( T1 –1) × 100 [%] 1.25µs • 1st monostable multivibrator pulse width = T2 • Peak shift PS = 1 2 TA – TB TA + TB × 100 [%] –9– CXA3010Q Read System (Filters) Item Symbol Conditions X360 = High XHD = High OTF = High Refer to Fig. 2 at f01 Refer to Fig. 2 at 1/3f01 Refer to Fig. 2 at 3f01 X360 = High XHD = High OTF = Low Refer to Fig. 2 at f02 Refer to Fig. 2 at 1/3f02 Refer to Fig. 2 at 3f02 X360 = Low XHD = High OTF = High (1.6M/outer track) or X360 = X XHD = Low OTF = High (2M/outer track) Refer to Fig. 2 at f03 Refer to Fig. 2 at 1/3f03 Refer to Fig. 2 at 3f03 (Ta = 25°C, VCC = 5V) Measure- MeasureMin. ment circuit ment Point 1 B, C D, E B, C B, C B, C Typ. Max. Unit Peak frequency Peak voltage gain∗3 Frequency response (1) Frequency response (2) Peak frequency Peak voltage gain∗3 Frequency response (1) Frequency response (2) fo1 153.0 170.0 187.0 kHz 1M outer track Gp1 G11 G12 1 1 1 4.3 6.2 7.8 –6.6 dB dB –7.6 –7.1 –24.7 –22.8 –21.2 dB fo2 1 B, C D, E B, C B, C B, C 163.8 182.0 200.2 kHz 1M inner track Gp2 G21 G22 1 1 1 4.3 6.2 7.8 –6.6 dB dB –7.6 –7.1 –24.7 –22.8 –21.2 dB Peak frequency 1.6M/ 2M outer track fo3 1 B, C 288.0 320.0 352.0 kHz Peak voltage gain∗3 Frequency response (1) Frequency response (2) Gp3 G31 G32 1 1 1 D, E B, C B, C B, C 4.4 6.3 7.9 –6.6 dB dB –7.6 –7.1 –25.0 –23.1 –21.5 dB – 10 – CXA3010Q Item Symbol Conditions X360 = Low XHD = High OTF = Low (1.6M/inner track) or X360 = X XHD = Low OTF = Low (2M/inner track) Refer to Fig. 2 at f04 Refer to Fig. 2 at 1/3f04 Refer to Fig. 2 at 3f04 Measure- MeasureMin. ment circuit ment Point Typ. Max. Unit Peak frequency 1.6M/ 2M inner track fo4 1 B, C 310.5 345.0 379.5 kHz Peak voltage gain∗3 Frequency response (1) Frequency response (2) Gp4 G41 G42 1 1 1 D, E B, C B, C B, C 5.9 –8.5 7.8 9.4 dB dB –8.0 –7.5 –36.9 –35.0 –33.4 dB ∗3 Gpn = 20 log10 (VFilterout/Vpreout) VFilterout = Filter differential output voltage (n = 1 to 4) [dB] Gpn Gn1 Gn2 1/3fon (n = 1 to 4) fon 3fon f [Hz] Fig. 2. Filter frequency response measurement conditions – 11 – CXA3010Q Write/Erase System Item Damping resistor precision Write current output precision∗4 Write current output unbalance Head I/O pin leak current for writes Write head pin current at saturation Erase current output precision∗5 Erase current output pin leak current Erase current rise time∗6 Erase current fall time∗6 Symbol RD EW DW ILKW Conditions VCC = 0V SW2 = b XWG = Low RW = 1.3kΩ XWG = Low RW = 1.3kΩ XWG = Low XWG = Low RW = 1.3kΩ VSW = 1V SW1 = b XEG = Low RE = 1.3kΩ XEG = Low Defined at 10% to 90% of IE Defined at 90% to 10% of IE Measure- MeasureMin. ment circuit ment Point 2 2 2 2 J', K' L', M' J, K L, M J, K L, M J, K L, M J, K L, M –20 –7 –1 — (Ta = 25°C, VCC = 5V) Typ. Max. — — — — +20 +7 +1 10 Unit % % % µA ISW 2 2.47 2.70 2.97 mAo-p EE ILKE TRE TFE 2 2 2 2 N, O N, O N', O' N', O' –10 — 0.6 0.6 — — 1.3 1.3 +10 10 2.1 2.1 % µA µs µs ∗4 Write current output precision EW = ( ∗5 Erase current output precision EE = ( IW – 1) × 100 [%] 2.72mAo-p IE – 1) × 100 [%] 9.08mA ∗6 Erase current rise/fall times show the values when the output pin is shorted with the power supply. Logic Input Block Item Digital signal input low input voltage Digital signal input high input voltage Symbol VLD VHD Conditions Measure- MeasureMin. ment circuit ment Point 2 2 BCDE FGHIP BCDE FGHIP A — 2.0 (Ta = 25°C, VCC = 5V) Typ. Max. — — 0.8 — Unit V V Schmitt-type digital signal input low input VLSD voltage Schmitt-type digital signal input high input voltage Digital signal input low input current Digital signal input high input current VHSD 2 — — 0.8 V 2 A ABCDE FGHIP ABCDE FGHIP 2.0 — — V ILD IHD VL = 0V VH = 5V – 12 – 2 2 –20 — — — — 10 µA µA CXA3010Q Electrical Characteristics Measurement Circuit 1 D E 1/2Vi –1/2Vi SW6 b a b a b a SW5 b a SW4 ∗7 3300p 16 NC 3300p 12k HEAD0A PREOUTA HEAD1B PREOUTB 24 25 1.3k WCLD 23 22 21 20 19 18 17 XHG HEAD0B HEAD1A X360 F External Comparator 26 WCMD 1.3k 27 WCHD 1.3k 28 IESET 1.3k 29 D.GND CXA3010Q FILTER 15 OUTA FILTER OUTB 14 C B A.GND 13 MMVA 12 27k 30 ERA0 FCSET 11 3.26k 5V POWER ON 31 ERA1 XPS 32 1 VCC 10 XWD XWG XEG XCI XS1 XHD b 9 SW3 a 2 3 4 5 6 OTF 8 SW2 ba b RD 7 SW1 a A Note) Unless otherwise specified, switches are assumed to be set to “a”. ∗7 CR time constant of external comparator input stage is equivalent to the time constant of comparater with a built-in IC. – 13 – CXA3010Q Electrical Characteristics Measurement Circuit 2 SW1 a b VSW I H M M' a ba L L' ba K K' ba J J' b SW2 HEAD0A PREOUTA HEAD1B PREOUTB 24 25 1.3k WCLD 23 22 21 20 19 18 17 16 NC XHG HEAD0B HEAD1A X360 26 WCMD 1.3k 27 WCHD 1.3k 28 IESET 1.3k 29 D.GND a CXA3010Q FILTER 15 OUTA FILTER 14 OUTB A.GND 13 MMVA 12 27k N N' 200 b a b SW3 30 ERA0 FCSET 11 3.26k 5V O O' 200 XWD XWG XEG XPS 32 1 POWER ON 31 ERA1 VCC 10 XHD XCI XS1 OTF RD 9 8 G 2 3 4 5 6 7 P A B C D E F Note) Unless otherwise specified, switches are assumed to be set to "a". – 14 – CXA3010Q Description of Operation (1) Read system Preamplifier The preamplifier amplifies input signals. The voltage gain can be switched between 39dB and 45dB, using Pin 20. In addition, an additional 3dB boost in the voltage gain is possible by setting Pin 8 low. Filters The filters differentiate the signals amplified by the preamplifier. The high-band noise components are attenuated by the low-pass filter. The filters can be switched among four modes, depending on the settings of Pins 8, 9 and 18. In 1M/outer track mode, the peak frequency fO1 is set by external resistor RF. fO for the other three modes is switched by the internal settings of the IC, with fO1 used as a reference (1.00). Active filter block 19 Preamplifier output A 17 Preamplifier output B 15 Preamplifier output BPF LPF HPF Amp 14 Secondary fOB = 1.2 × fC Q = 0.577 Tertiary fc: variable Primary fCH = 5kHz Gain : 8dB Filter output A Filter output B The center frequency fOB of the BPF is fixed to 1.2 times the cutoff frequency fO of the LPF. The LPF characteristics are set to Chebyshev (1dB ripple) for 1.6M, 2M/inner track mode only, and to Butterworth for all other modes. Pin8 OTF H L H L H L Pin9 XHD H H H H L L Pin18 X360 H H L L X X LPF characteristics 1M/outer track: Butterworth 1M/inner track: Butterworth 1.6M/outer track: Butterworth 1.6M/inner track: Chebyshev 1dB ripple 2M/outer track: Butterworth 2M/inner track: Chebyshev 1dB ripple fo ratio 1.00 1.07 1.88 2.03 1.88 2.03 The formula for determining the peak frequency fO1 for 1M/outer track mode is shown below: fo1 = 534/RF + 6.2 [kHz] RF: filter setting resistance [kΩ] – 15 – CXA3010Q Comparator The comparator detects the crosspoint of the filter differential output. Time domain filter The time domain filter converts the comparator output to read data. This filter is equipped with two monostable multivibrators. 1st monostable multivibrator eliminates unnecessary pulses, and 2nd monostable multivibrator determines the pulse width of the read data. The 1st monostable multivibrator pulse width T1 is determined by the resistor RA between Pin 12 and A.GND. T1 can be switched as follows by the settings of Pins 9 and 18: When XHD = High and X360 = High T1(1M) = 88RA + 124 [ns] RA [kΩ] When XHD = High and X360 = Low or XHD = Low and X360 = X T1(1.6M/2M) = 44RA + 62 [ns] The pulse width for 2nd monostable multivibrator is fixed at 400ns. (2) Write system Write data input through Pin 2 is frequency-divided by the T flip-flop and generates the recording current for the head. The recording current can be switched by the settings of Pins 9 and 18. The write current IW is set by the resistors RW connected between Pin 25 and VCC, between Pin 26 and VCC, and between Pin 27 and VCC. IW = 3.53/RW [mAO-P] RW [kΩ] Furthermore, the inner/outer track write current IW can be changed for each mode by switching Pin 4. However, the current ratio between the inner and outer tracks is fixed. (3) Erase current The erase current IE is set by the resistor RE between Pin 28 and VCC. IE = 11.8/RE [mA] RE [kΩ] Pins 30 and 31 are constant current outputs. In addition, in order to minimize the R/W head crosstalk time constants are provided for the rise and fall of the erase current. For details, refer to page 20 and page 21. (4) Power on/off detection system The power on/off detection system detects a reduced voltage in the supply voltage. When VCC is below the specified value, the write system and erase system cease operation, disabling the write and erase functions. Notes on Operation • Select the voltage gain so that the preamplifier output amplitude is 1Vp-p or less. If the preamplifier output amplitude exceeds 1Vp-p, the filter output waveform becomes distorted. • Observe the following point when mounting this device. • The ground should be as large as possible. – 16 – CXA3010Q Application Circuit PREOUTA 24 WCLD 25 RWLD WCMD 26 RWMD WCHD 27 RWHD IESET 28 RE D.GND 29 23 22 21 20 19 18 17 16 NC PREOUTB 15 FILTER OUTA FILTER 14 OUTB A.GND VCC 13 MMVA 12 RA FCSET 11 RF VCC 10 XHD 9 8 HEAD0B HEAD1A HEAD0A HEAD1B FILTER PREAMP DIFF + LPF (BPF) WRITE DRIVER COMP ERA0 30 ERA1 31 XPS 32 1 ERASE DRIVER POWER MONITOR CONTROL LOGIC TIME DOMAIN FILTER 2 3 4 5 6 7 XWG XS1 X360 OTF XWD RD XHG XEG Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. Notes 1. If a resistor for setting the write current is not used, connect that pin to VCC. However, if connected to VCC, do not select that mode for writes, as doing so could cause a large current flow that could damage the IC. 2. When using two modes (1M and 2M), connect X360 (Pin 18) to VCC and set XHD (Pin 9) high or low to switch modes. POWER ON XCI – 17 – CXA3010Q Filter Frequency Response The LPF characteristics are set to Chebyshev (1dB ripple) for 1.6M, 2M/inner track mode only, and to Butterworth for the other modes. In addition, a custom selection can be made between Chebyshev (1dB ripple) and Butterworth for the filter characteristics for 1.6M, 2M/inner track mode only; in that case, it is not possible to change between 1.6M/inner track and 2M/inner track. As a result, the 1.6M and 2M characteristics and fc ratio are identical. B.P.F Q = 0.577 (Differential characteristics) fOB 1M/outer track, inner track 1.6M, 2M/outer track L.P.F Tertiary Butterworth 1.6M, 2M/inner track L.P.F Tertiary Chebyshev 1dBRp (High-band noise cutoff) fcn (n = 1, 2, 3) fc4 (Comprehensive characteristics) fon fo4 The BPF center frequency fOB is fixed at 1.2 times the LPF cutoff frequency. fOB = 1.2fc In the comprehensive characteristics, the relationship between the peak frequencies fo and fc is as follows, depending on the differences of the LPF type: Butterworth characteristics fcn = 1.28fon (n = 1, 2, 3) Chebyshev (1dB ripple characteristics) fc4 = 1.12fo4 – 18 – CXA3010Q Custom Selection of Filters Regarding the LPF cutoff frequency fo, assuming the LPF cutoff frequency fC1 in 1M/outer track mode as 1.00, the fc ratio can be selected for the other three modes. In addition, the LPF characteristics are set to Chebyshev (1dB ripple) for 1.6M, 2M/inner track mode only, and to Butterworth for the other modes. However, a custom selection can be made between Chebyshev (1dB ripple) and Butterworth for the filter characteristics for 1.6M, 2M/inner track mode only. (However, the 1.6M and 2M characteristics and fc ratio are identical.) Note that the BPF center frequency fOB is fixed at 1.2 times fC. In addition, the ratio between fO and fC conforms with the relationship shown on the previous page. Mode 1M/outer track 1M/inner track 1.6M, 2M/outer track 1.6M, 2M/inner track LPF type Butterworth Butterworth Butterworth Butterworth Chebyshev (1dB ripple) 1.0 1.07 , 1.14 , 1.23 , 1.33 , 1.45 , 1.60 , 2.00 1.33 , 1.39 , 1.45 , 1.52 , 1.60 , 1.68 , 1.78 , 1.88 , 2.00 , 2.13 , 2.29 , 2.46 , 2.67 1.33 , 1.39 , 1.45 , 1.52 , 1.60 , 1.68 , 1.78 , 1.88 , 2.00 , 2.13 , 2.29 , 2.46 , 2.67 fc ratio when fC1 is assumed as 1 ∗ The boxed ratio indicates the setting for the CXA3010Q. Write Current Setting Method Assuming the outer track as 1.00, the write current ratio is fixed within the IC for each mode. The write current for the outer track is set in each mode by the resistors connected to Pins 25, 26, and 27. The current ratio for the inner track in each mode can be selected according to the following table. The setting is for the outer track current when XCI is Low, and for the inner track current when XCI is High. Write current inner track setting ratios Track 1M mode 1.6M mode 2M mode Write current inner track setting ratio 1.00 , 0.92 , 0.86 , 0.80 , 0.75 , 0.71 , 0.66 , 0.63 1.00 , 0.92 , 0.86 , 0.80 , 0.75 , 0.71 , 0.66 , 0.63 1.00 , 0.92 , 0.86 , 0.80 , 0.75 , 0.71 , 0.66 , 0.63 ∗ The boxed ratio indicates the setting for the CXA3010Q. The write current setting for the outer track is determined according to the following formula: IW = 3.53/RW (mAO-P) RW: [kΩ] – 19 – CXA3010Q Erase Current Setting Method The erase circuit in this IC generates the erase current by using a constant current circuit; the current value is determined according to the following formula, based on the resistor RE connected to Pin 28. IE = 11.8/RE [mA] RE: [kΩ] Erase Current Rise and Fall Times (Refer to Fig. 3) In this IC, time constants are provided for the erase current rise and fall in order to prevent bad writes due to write head crosstalk. The current rise and fall times of the constant current circuit in the IC is 1.3µs, but the potential difference VA that develops in the head when the erase current is turned on and off is as shown below. Because the circuit clamp is generated according to this VA value, the rise and fall times differ. Therefore, refer to the explanation provided below when using this IC. VA = L × di (L: head inductance; di: erase current; dt: 1.3µs) dt 1. When erase current turns on (1) When the potential difference VA in the head is (VCC – 1.8V) or more When the current turns on, potential difference VA is generated in the head; if VA is equal to (VCC –1.8V) or more, the erase output transistor Q1 shown in the circuit in Fig. 3 becomes saturated, and the pin voltage is clamped at approximately 1.8V. Voltage driving results, and the rise time Tr is as follows: Tr = L × IE × 1 [µs] L: [µH], IE: [mA], VCC: [V] VCC – 1.8 1000 (2) When the potential difference VA in the head is (VCC – 1.8V) or less In this case, because VA does not reach clamping level, the rise time becomes the rise time of IE in the circuits within the IC. Current rise time Tr = 1.3µs – 20 – CXA3010Q 2. When erase current turns off (1) When the potential difference VA in the head is 0.7V or more When the current turns off, potential difference VA is generated in the head by counterelectromotive force; if VA is equal to approximately 0.7V or more, the positive protective diode D1 shown in the circuit in Fig. 3 turns on, and the pin voltage is clamped at approximately (VCC + 0.7V). As when the erase current is turned on, voltage driving results, and the fall time Tf is as follows: 1 Tf = L × IE × [µs] L: [µH], IE: [mA] 1000 0.7 (2) When the potential difference VA in the head is 0.7V or less In this case, because VA does not reach clamping level, the fall time becomes the fall time of IE in the circuits within the IC. Current fall time Tf = 1.3µs Circuits within IC Vcc IE L 30 ERA0 Q1 Q2 D1 (positive protective diode) For ERA1 High = approx. 2.25V Low = 0V D2 (negative protective diode) IE (rise/fall time: 1.3µs) GND Fig. 3. Erase equivalent circuit However, in the specifications, because the value indicated is with the erase head pin shorted with the power supply so that the head voltage described earlier is not generated, the rise and fall times for the constant current circuit itself are given. – 21 – CXA3010Q Normalized preamplifier voltage gain and phase vs. Frequency Normalized preamplifier voltage gain [dB] Voltage gain 0 –2 –4 –6 –8 –10 VCC = 5V, Ta = 25°C XHG = High, Low Phase 0 45 90 135 180 100k 1M f – Frequncy [Hz] 10M 1M/outer track 180 0 Phase 0 90 –20 1M/inner track 180 Phase Voltage gain 90 –20 Normalized filter voltage gain [dB] Normalized filter voltage gain [dB] Voltage gain Phase [deg] –40 0 Phase [deg] –40 0 –60 –90 –80 10k VCC = 5V, Ta = 25°C RF = 3.26kΩ 40k 100k 400k 1M 4M –180 –60 –90 –80 10k VCC = 5V, Ta = 25°C RF = 3.26kΩ 40k 100k 400k 1M 4M –180 f01 = 170 [kHz] Frequency [Hz] f02 = 182 [kHz] Frequency [Hz] 1.6M, 2M/outer track Phase 0 180 0 1.6M, 2M/inner track 180 Voltage gain 90 –20 Phase Normalized filter voltage gain [dB] 90 –20 Normalized filter voltage gain [dB] Voltage gain Phase [deg] –40 0 –40 0 –60 –90 –80 10k VCC = 5V, Ta = 25°C RF = 3.26kΩ 40k 100k 400k 1M 4M –180 –60 –90 –80 10k VCC = 5V, Ta = 25°C RF = 3.26kΩ 40k 100k 400k 1M 4M –180 f03 = 320 [kHz] Frequency [Hz] f04 = 345 [kHz] Frequency [Hz] – 22 – Phase [deg] Phase [deg] CXA3010Q NGv – Normalized preamplifier voltage gain + filter voltage gain Normalized preamplifier voltage gain + filter voltage gain NGv vs. Ambient temperature Ta 1.50 NGv – Normalized preamplifier voltage gain + filter voltage gain Normalized preamplifier voltage gain + filter voltage gain NGv vs. Supply voltage Vcc 1.50 1.00 1.00 11 VCC = 5V f = 100kHz NGV = GV/GV (Ta = 25°C) 0.50 –20 RF 3.26kΩ 11 Ta = 25°C f = 100kHz NGV = GV/GV (VCC = 5V) 0.50 RF 3.26kΩ VCC 0 20 40 60 80 VCC 4.0 5.0 Vcc – Supply voltage [V] 6.0 Ta – Ambient temperature [°C] Normarized filter peak frequency Nf0 vs. Ambient temperature Ta 1.05 1.05 Normalized filter peak frequency Nf0 vs. Supply voltage Vcc Nf0 – Normalized filter peak frequency 1.00 Nf0 – Normalized filter peak frequency 1.00 11 VCC = 5V Nf0 = f0/f0 (Ta = 25°C) RF 3.26kΩ 11 Ta = 25°C Nf0 = f0/f0 (VCC = 5V) RF 3.26kΩ VCC 0.95 –20 0 20 40 60 80 0.95 4.0 5.0 VCC 6.0 Vcc – Supply voltage [V] Ta – Ambient temperature [°C] NTA – Normalized 1st monostable multivibrator pulse width 1.05 NTA – Normalized 1st monostable multivibrator pulse width Normalized 1st monostable multivibrator pulse width NTA vs. Ambient temperature Ta Normalized 1st monostable multivibrator pulse width NTA vs. Supply voltage Vcc 1.05 1.00 1.00 12 VCC = 5V NTA = T1/T1 (Ta = 25°C) RA 27kΩ 12 Ta = 25°C NTA = T1/T1 (VCC = 5V) RA 27kΩ 0.95 –20 0.95 0 20 40 60 Ta – Ambient temperature [°C] 80 4.0 5.0 Vcc – Supply voltage [V] 6.0 – 23 – CXA3010Q Normalized read data pulse width NTB vs. Ambient temperature Ta 1.05 Normalized read data pulse width NTB vs. Supply voltage Vcc 1.05 NTB – Normalized read data pulse width 1.00 NTB – Normalized read data pulse width 1.00 VCC = 5V NTB = T2/T2 (Ta = 25°C) Ta = 25°C NTB = T2/T2 (VCC = 5V) 0.95 –20 0 20 40 60 80 0.95 4.0 5.0 Vcc – Supply voltage [V] 6.0 Ta – Ambient temperature [°C] Normalized write current NIw vs. Ambient temperature Ta 1.05 1.05 Normalized write current NIw vs. Supply voltage Vcc NIw – Normalized write current 1.00 NIw – Normalized write current 1.00 25 26 27 RW1 RW2 RW3 VCC = 5V NIW = IW/IW (Ta = 25°C) 1.3 1.3 1.3 kΩ kΩ kΩ VCC VCC VCC 0.95 –20 0 20 40 60 Ta – Ambient temperature [°C] 80 Ta = 25°C NIW = IW/IW (VCC = 5V) 25 26 27 RW1 RW2 RW3 1.3 1.3 1.3 kΩ kΩ kΩ VCC VCC VCC 6.0 0.95 4.0 5.0 Vcc – Supply voltage [V] Normalized erase current NIE vs. Ambient temperature Ta 1.05 1.05 Normalized erase current NIE vs. Supply voltage Vcc NIE – Normalized erase current 1.00 NIE – Normalized erase current 1.00 28 VCC = 5V NIE = IE/IE (Ta = 25°C) RE 1.3kΩ VCC 0.95 –20 0 20 40 60 80 28 Ta = 25°C NIE = IE/IE (VCC = 5V) RE 1.3kΩ VCC 0.95 4.0 5.0 Vcc – Supply voltage [V] 6.0 Ta – Ambient temperature [°C] – 24 – CXA3010Q 1M/outer track peak frequency f01 vs. RF 1M/outer track peak frequency f01 [kHz] 11 250 RF 1st monostable multivibrator pulse width TA vs. RA TA – 1st monostable multivibrator pulse width [µs] 10.0 12 5.0 RA VCC = 5V Ta = 25°C T1 1M = 88RA + 124 T1 2M = 44RA + 62 RA [kΩ] VCC = 5V Ta = 25°C f01 = 534/RF + 6.2 VCC 200 1.0 T1 1M T1 2M 0.5 0.3 3 5 10 RA [kΩ] 50 100 150 2.0 3.0 RF [kΩ] 4.0 Write current IW vs. RW 50 50 Erase current IE vs. RE 10 5 VCC = 5V Ta = 25°C IW = 3.53/RW RW [kΩ] 25 26 27 RW1 RW2 RW3 1 IE – Erase current [mA] IW – Write current [mA] 10 5 27 RE 1 VCC = 5V Ta = 25°C IE = 11.8/RE RE [kΩ] 0.5 0.1 VCC VCC VCC 0.5 1 5 10 VCC 0.5 1 RE [kΩ] 5 10 RW [kΩ] VTH – Power supply on/off detector threshold voltage [V] Power supply on/off detector threshold voltage VTH vs. Ambient temperature Ta 4.1 4.0 3.9 3.8 3.7 3.6 –20 0 20 40 60 Ta – Ambient temperature [°C] 80 – 25 – CXA3010Q Package Outline Unit: mm 32PIN QFP (PLASTIC) 9.0 ± 0.2 + 0.3 7.0 – 0.1 24 17 + 0.35 1.5 – 0.15 0.1 25 16 32 9 + 0.2 0.1 – 0.1 1 0.8 + 0.15 0.3 – 0.1 8 + 0.1 0.127 – 0.05 0° to 10° 0.24 M PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-32P-L01 QFP032-P-0707 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING 42 ALLOY 0.2g – 26 – 0.50 (8.0)
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