CXA3092N

CXA3092N 4ch. Read/Write Amplifier for Thin Film Head of Hard Disk Drive For the availability of this product, please contact the sales office. Description The CXA3092N is a Read/Write Amplifier for the thin film head of hard disk drive and designed to handle up to 4 channel heads. Features • Operate on single +5 V power supply • Low power consumption Read : 85 mW Write : 115 mW + IW ×5 Idle : 8 mW • Designed for two terminal thin-film or MIG heads • Read amplifier emitter follower output featuring 325 times gain (typ). • Differential input capacitance for Read : 6pF (typ) • Input noise : 0.47 nV / √ Hz (typ) • Write current range : 5 to 15 mA • Differential Head voltage swing : 6.8 Vp-p (typ) • Differential P-ECL write data input • Built-in write unsafe detection circuit. • Built-in Servo write function (2/4 ch). • Built-in IC protection circuit for short of head to GND. • Read data outputs are high impedance in write mode. • Unselected head voltage is GND potential. • Built-in supply voltage monitor circuit prohibits incorrect write during power on or abnormal voltage. • Self switching damping resistance (RD = 350 Ω). Function Read, Write and Write unsafe detection for HDD, power supply ON/OFF detection. Structure Bipolar silicon monolithic IC 20 pin SSOP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VCC 6 V • Write current IW 20 mAo-p • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –55 to +150 °C • Allowable power dissipation 800 mW PD • WUS/SE pin input current ISEH 15 mA Recommended Operating Conditions • Supply voltage VCC 5.0 V±10 % • Write current IW 5 to 15 mAo-p Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E96713-TE CXA3092N Block Diagram and Pin Configuration GND 1 MODE CONTROL 20 XCS H0X 2 DRIVER 19 R/W H0Y 3 AMP WRITE CURRENT SOURCE 18 WC H1X 4 DRIVER AMP 17 RDY H1Y 5 AMP 16 RDX H2X 6 DRIVER 15 HS0 HEAD SELECT H2Y 7 AMP 14 HS1 H3X 8 DRIVER 13 IC PROTECTOR WDX H3Y 9 AMP 12 WDY VCC 10 POWER ON/OFF DETECTOR WRITE UNSAFE DETECTOR 11 WUS/SE —2— CXA3092N Pin Description No. 1 Symbol GND 2 4 VCC Equivalent circuit Description 2 3 4 5 6 7 8 9 H0X H0Y H1X H1Y H2X H2Y H3X H3Y 6 8 2k 2k 3 5 7 9 Head. 4 channels provided. GND 10 VCC 5 V power supply. VCC 11 WUS/SE 11 Write unsafe detection output / Servo Enable signal input. GND VCC 12 13 WDY WDX 12 13 Differential P-ECL write data input. GND —3— CXA3092N No. Symbol Equivalent circuit VCC Description 14 15 HS1 HS0 14 15 2.1V GND VCC Head select signal input. Selects one of 4 heads according to Table 2. 100k 16 17 RDX RDY 16 Read Amplifier output. 17 GND VCC 18 WC 18 2V GND A setting resistor for the write current value is connected between this pin and GND. VCC 100k 19 R/W 19 Read/Write signal input At “High” : Read, at “Low” : Write. 2.1V GND VCC 20 XCS 20 Power save signal input At “High” : Power save. 100k 2.1V GND —4— Electrical Characteristics (Unless otherwise specified, VCC=5 V, Ta=25 °C, Write current IW=15 mA) Refer to Fig.1 1 a 12 17 +IW +IW 1.6 1.0 23 17 a Test point : l2 Test point : I2 a a a a a b a a b a a b a b a a a a b a a b a a b a a a a a a b a a b a a b b a Test point : l2 26 36 +IW 2.3 0.8 2.0 –100 100 2 3 4 5 SW conditions 6 7 8 9 10 11 12 13 14 Measurement conditions Min. Typ. Max. Unit mA mA mA V V µA µA V V Input voltage : 4 V 50 0.3 b a a a a a a a a a a a b b a c c b c a c a b b a a a a Output current : 1 mA Test point : V1 Test point : l3 0.5 50 µA V V µA CXA3092N No. Item Symbol 1-1 ICCR 1-2 ICCW 1-3 ICCI 2-1 Digital input : Pins 17, 18, 19, 23 VIL 2-2 a a a a a a b a a b b b b b b a a a a b a a b a a b a a VIH 2-3 IIL —5— a a a a a b a a b a a b a a 2-4 IIH “High” applied voltage : 5 V “Low” applied voltage : 0 V Test point : l6, l7, l8, I9 2-5 VWDL 2-6 VWDH VWDH –2.0 VCC –1.1 VWDH –0.25 VCC –0.4 2-7 IWD 2-8 Vunsel 3-1 VWUS 3-2 Current consumption for Read Current consumption for Write Current consumption for idle Digital input “Low” input voltage Digital input “High” input voltage Digital input “Low” input current Digital input “High” input current Write data input “Low” input voltage Write data input “High” input voltage Write data input current Unselected head voltage Write unsafe output saturation voltage Write unsafe output leak current IWUS No. 1 When VCC is lowered from 5 V in 2 3 4 Min. Typ. Max. Unit Item Symbol Measurement conditions SW conditions 5 6 7 8 9 10 11 12 13 14 4 3.4 3.9 Supply power ON/OFF detector threshold voltage b a a a a a b a a b a b a a Write mode and IW does not flow anymore, VCC voltage is set to VTHOFF. When VCC is raised from 3 V and IW starts to flow, VCC voltage is set to VTHON. 4.3 5 a IW=AW • VWC/RWC b IW=KW/RWC Servo write enabled b a a a a b b a b a a b a a Servo write enabled a a a a b a a b a a b a a a a a a b a a b a a b a a 1.8 23.4 46.8 VCC +1 0.5 2 26 52 15 2.2 VTH V 5-1 Write current setting range IW mAo-p V 28.6 mA/mA 57.2 VCC +1.2 14 V 5-2 Write current voltage VWC 5-3 Write current gain AW 5-4 Write current setting constant KW —6— b a a a c b a a b a a b b a b a a a c b a a b a a b b a 6-1 WUS/SE voltage VSEH 6-2 WUS/SE sink current ISEH mA 7 Read amplifier differential voltage gain AV 275 325 375 V/V 8 Frequency band width (–3 dB) BW Input voltage SG1 : 1 mVp-p, 300 kHz Load resistance (RDX, RDY) : 1 kΩ Test point : V4 [Vp-p] V4 AV = SG1 Frequency at which AV lowers by 3 dB 70 100 MHz CXA3092N No. 1 2 3 4 Min. Typ. Max. Unit Item Symbol Measurement conditions SW conditions 5 6 7 8 9 10 11 12 13 14 9 Input referred noise EN a a a a a b a a b a a b b a Head impedance : 0 Ω, when the read amplifier output voltage is amplified 100 times and voltage passed though a LPF (low pass filter of cutoff frequency 15 MHz) is VN [Vrms], 0.47 0.65 nV √ Hz VN 100 • AV√ 15 × 106 Test point : V5 In-phase input voltage SG2 : 100 mVp-p, 5 MHz When the Read amplifier output is VCM [mVp-p], EN = 50 10 Common mode rejection ration b a a a d b a a b a a b b a CMRR dB —7— a a a a a a a a b a a b b a 11 Power supply rejection ratio PSRR 100 CMRR = 20 log VCM +20 log AV Test point : V4 Ripple voltage SG3 : 100 mVp-p, 5 MHz When the Read amplifier output is VP [mVp-p], 100 PSRR = 20 log VP +20 log AV Test point : V4 50 dB CXA3092N No. 1 2 3 4 Measurement conditions Min. Typ. Max. Unit Item Symbol SW conditions 5 6 7 8 9 10 11 12 13 14 12 50 Channel separation a b a a c b a a b a a b b a CS dB 13 Read data output offset voltage for Read a a a a e b a a b a a a b a VOFFR Selected head input voltage : 0 mVp-p Unselected head input voltage SG1 : 100 mVp-p, 5 MHz When the Read amplifier output is VCS [mVp-p], 100 CS = 20 log VCS +20 log AV Test point : V4 VOFFR = V2–V3 Test point : V2, V3 –250 250 mV —8— CXA3092N CXA3092N Unless otherwise specified, VCC=5 V, Ta=25 °C, fWD (Write data frequency) =5 MHz, IW=15 mA, LH (Head inductance) =1 µH, RH (Head DC resistance value) =30 Ω Refer to Fig. 2 to Fig. 4 No. Item Head differential voltage amplitude Symbol Measurement conditions Differential voltage between HX pin and HY pin at switching of Write current (open Head) TRW is the time required for Write current to turn TRW to 90 % after Pin 19 changes from “High” to “Low”. TWR1 is the time required for the Read amplifier output∗ to turn to 90 % after Pin 19 changes from “Low” to “High”. TWR2 is the time required for Write current to decreases to 10 % after Pin 19 changes from “Low” to “High”. TIR is the time required for the Read amplifier output∗ to turn to 90 % after Pin 20 changes from “High” to “Low”. TSA1 is the time required for Pin 11 to turn “High” after the last transition of Write data 1.5 when Write data is stopped in Write mode. TSA2 is the time required for Pin 11 to turn “Low” after the first transition of Write data in Write mode. TH is the time required for the Read amplifier output∗ to reach 90 % when the selected head switched in Read mode. TPD is the time required for Write current to reach 90 % after the Write data falling edge. LH=0 µH, RH=0 Ω TR is the time required for Write current to reach 90 % from 10 %; TF is the same time required to reach 10 % from 90 %. LH=0 µH, RH=0 Ω 0.2 0.4 µs Min. Typ. Max. Unit 14 VSW 5.8 6.8 Vp-p Mode switching time 15-1 Read to Write TWR1 15-2 Mode switching time Write to Read TWR2 0.3 0.5 µs 0.2 0.4 µs 16 Mode switching time to Read Mode switching time safe to unsafe Mode switching time unsafe to safe TIR 1 µs 17-1 TSA1 3 5 µs 17-2 TSA2 0.6 µs 18 Head switching time Write current propagation delay time Write current rise/fall time TH 0.6 µs 19 TPD 2 7 ns 20 TR/TF 1 3 ns ∗Read amplifier output 100 mVp-p 10 MHz —9— CXA3092N Test Circuit 1 1k LPF ×100 AMP 1k 1µ VCC 5V VCC 5V A SG3 ab I2 S6 1µ V3 1µ V2 PG SG5 PG SG4 5.1k 6V V V5 to15MHz ×1 AMP V V4 V 5V ab ab S13 ba V 3V ba ab ab abc S9 4V abc S8 ab S7 V V1 S14 S12 3.3k 18 17 16 S11 S10 A I9 20 A I8 19 A I7 15 A I6 14 A I5 13 A I4 12 A I3 11 1 2 S1 ab 3 4 S2 ab 5 6 S3 ab 7 8 S4 ab 9 10 ab ab ab ab S5 abc d e abcd e 0.1µ SG2 0.1µ 33 0.1µ A I1 Fig. 1 SG1 Test Circuit 2 1k ×1 AMP 1k 1µ 1µ PG PG 3.3k 1µ PG PG PG 5.1k 20 19 18 17 16 15 14 13 12 11 1 2 LH 1µH 3 4 LH 1µH 5 6 LH 1µH 7 8 LH 1µH 9 10 5V —10— Fig. 2 CXA3092N Timing Chart 1 WDX WDY R/W 50% 50% PS 50% TRW TWR 2 90% IWX IWY 10% 90% 10% TWR1 TIR RDX RDY 90% 90% Fig. 3 Timing Chart 2 WDX WDY TPD 90% 10% TR 90% 90% 10% TF TSA1 IWX IWY WUS TSA2 50% 50% Fig. 4 —11— CXA3092N Description of Functions Read amplifier This is a low noise amplifier for amplifying the signals from the heads with an emitter follower output. The RDX and RDY are the outputs of the differential amplifier whose polarity between the RDX and X side of the head input is same. Write circuit The Write data input to WDX pin and WDY pin passes through the buffer amp. It drives the Write switch circuit which supplies the Write current to the heads. The Write current flows into the X side when WDX is “Low” and WDY is “High”. Mode control The mode are set as shown Table 1 by XCS, R/W and WUS/SE. XCS R/W WUS/SE HS0 HS1 L L X See Table 2 L H X L L ∗∗ See Table 3 H X X X X Table 1. Mode selection Head selection The heads are selected as shown in Table 2 by the HS0 and HS1 pins. HS0 HS1 Head L L 0 H L 1 L H 2 H H 3 Table 2. Head selection Servo write mode ∗∗ This mode allows for writing to multiple channels at once. To enable servo write mode follow these steps: (1) Place the device in the Read mode. (2) Set HS0 and HS1 following Table 3. (3) Set WUS/SE to VSEH, or input ISEH to WUS/SE. (4) While maintaing step (2) and (3) above make R/W low, placing the device in servo write mode. Mode Write Read Servo Write Idle —12— CXA3092N Write unsafe detection circuit This circuit detects write errors. In normal Write mode, the WUS output is low; in the conditions listed below, it is high. • Head inputs is open (under the condition which. RH=∞ and Write data frequency is ≤ 10 MHz) • Head input is shorted to GND or VCC. • Write data frequency is abnormally low. • No write current. • In read mode. • Supply voltage is abnormal (see power supply ON/OFF detection). Power supply ON/OFF detection This circuit monitors VCC to detect erroneous Writes. The error status is established when VCC falls below the threshold voltage (Vth) of the power supply ON/OFF detector, in which case the recording and playback functions are prohibited. When VCC rises above, VTH, the prohibition of these functions is released. HS0 HS1 Head L L 0, 1 H L 0, 1, 2, 3 L H 2, 3 H H 0, 1, 2, 3 Table 3. Head selection in Servo Write mode —13— CXA3092N Application Circuit PULSE DETECTOR RW 3.3k 1µ 5.1k 20 19 18 17 16 15 14 13 12 11 1 2 LH 1µH 3 4 LH 1µH 5 6 LH 1µH 7 8 LH 1µH 9 10 5V Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —14— CXA3092N Notes on operation • This device handles high frequency and high gain signals. Please note the following; ♦ Connect VCC decoupling capacitor of approximately 1000 pF near the device. ♦ Make the GND area as large as possible. • When using as 2-channel, short-circuit the X and Y sides of unused head pins or leave them open. • The WC pin is a constant voltage pin. When noise affects this pin, it creates noise in Write current. Therefore, locate RWC as close to the device as possible. • Write unsafe detection circuit This circuit uses the voltage waveforms of the head pins for detection. Wave form of write data Voltage waveform of head pins (HX, HY) VFB VTH=1.4V VTH GND ♦ VFB must be more than 2 V. When VFB < 2 V, it is possible that Write unsafe detection maximum frequency becomes more than 1 MHz. ♦ The normal operating area of write unsafe detection circuit is changed by head inductance, head DC resistance, write current and other. —15— CXA3092N Application Notes Use the following characteristics for reference. Item Differential output capacitance Differential output resistance Differential input capacitance Read mode Differential input resistance Output resistance Unselected head differential current in Write mode Write mode Write current symmetry ∗TAS=T1–T2 Symbol CO RO CI RI RRD IUS TAS∗ Conditions Between head input pins Between head input pins f=5 MHz RDX or RDY, f=5 MHz LH=1 µH, RH=30 Ω IW=15 mA LH=0 µH, RH=0 Ω IW=15 mA VCC=5V, Ta=25 °C Min. Typ. Max. 10 440 10 50 Unit pF Ω pF kΩ Ω 260 0.6 350 6 1.2 0.2 mAp-p –0.5 0.5 ns IWX+IWY 50% T1 50% T2 50% WC Setting of Write current Write current can be set with resistor RWC (kΩ) at Pin 18. IW=K/RWC (mA) Refer to Fig. 5. Fig.5 Write current vs. RWC 18 RWC 20 IW -Write current (mA) 10 5 2 5 RWC ( kΩ) 10 15 —16— CXA3092N Normalized write current vs. Supply voltage 1.04 Ta=25°C RWC=3.3kΩ 1.04 Normalized write current vs. Ambient temperature VCC=5V RWC=3.3kΩ IW/IW (Ta=25°C) IW/IW (VCC=5V) 1.02 1.02 1 1 0.98 0.98 0.96 4 5 Supply voltage VCC [V] 6 0.96 –25 0 25 50 75 Ambient temperature Ta [°C] Normalized read amplifier voltage tgain vs. Supply voltage 1.04 Ta=25°C 1.04 Normalized read amplifier voltage gain vs. Ambient temperature VCC=5V 1 AV/AV (Ta=25°C) AV/AV (VCC=5V) 1.02 1.02 1 0.98 0.98 0.96 4 5 Supply voltage VCC [V] 6 0.96 –25 0 25 50 75 Ambient temperature Ta [°C] Power supply ON/OFF detector threshold voltage vs. Ambient temperature 4.2 Power supply ON/OFF Detector Threshold Voltage [V] OFF → ON 4 ON →OFF 3.8 3.6 –25 0 25 50 75 Ambient temperature Ta [°C] —17— CXA3092N Package Outline Unit : mm 20PIN SSOP(PLASTIC) 2.0MAX 7.2 ± 0.3 20 11 0.15 5.3 ± 0.3 7.8 ± 0.4 A 1 0.83MAX 0.65 0.3 ± 0.1 10 0.13 M 0.15 ± 0.05 0.05MIN 10°MAX DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-20P-L122 SSOP020-P-0300 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.15g NOTE : PALLADIUM PLATING This product uses PdPPF (Palladium Pre-Plated Lead Frame). —18— 0.75 ± 0.2