CXA3099N

CXA3099N IF Amplifier for M-ary FSK Pagers For the availability of this product, please contact the sales office. Description The CXA3099N is a low current consumption FM IF amplifier which employs the newest bipolar process. It is suitable for M-ary FSK pagers. Features • Low current consumption: 590 µA (typ. at VCC = 1.4 V) • Low voltage operation: VCC = 1.1 to 4.0 V • Small package 16-pin SSOP • Needless of IF decoupling capacitor • Reference power supply for operational amplifier and comparator • IF input, VCC standard Applications M-ary FSK pagers Structure Bipolar silicon monolithic IC 16 pin SSOP (Plastic) Absolute Maximum Ratings • Supply voltage • Operating temperature • Storage temperature • Allowable power dissipation Operating Condition Supply voltage VCC 7.0 V Topr –20 to +75 °C Tstg –65 to +150 °C PD 312 mW VCC1 1.1 to 4.0 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E95Y24A8Z Block Diagram and Pin Configuration VCC 15 14 13 VB REG LVA REG OUT 12 NRZ COMP DEV COMP 11 10 REG CONT LVA OUT NRZ OUT CHARGE DEV OUT RSSI 16 9 78k R2 22k GND R1 RSSI —2— CHARGE QUAD DET IF LIM REG 1 GND BS FSK REF 2 3 4 5 QUAD 6 DET OUT 7 LPF IN 8 LPF OUT IF IN CXA3099N CXA3099N Pin Description Pin No. Symbol Pin voltage Equivalent circuit 20k 20k 1.5k Description VCC 1.5k 1 IF IN 1.4 V 1 IF limiter amplifier input. GND 2 GND — 72 Ground. 3 40k 3 B.S. — 140k GND Controls the battery saving. Setting this pin low suspends the operation of IC. (Applied voltage range: –0.5 V to +7.0 V) VCC 4 FSK REF 0.2 V 4 72 Connects the capacitor that determines the low cut-off frequency for the entire system. GND VCC 22k 20k 5 QUAD 1.4 V 5 20p GND Connects the phase shifter of FM detector circuit. VCC 50p 6 DET OUT 0.2V 6 72 55k FM detector output. GND —3— CXA3099N Pin No. Symbol Pin voltage Equivalent circuit VCC Description 7 LPF IN 0.2 V 7 72 Operational amplifier input. GND VCC 72 8 LPF OUT 0.2 V 8 72 GND Level comparator and NRZ comparator inputs. Output for operational amplifier is connected. VCC 7k 7k 9 RSSI 0V 9 70k RSSI circuit output. GND 72 10 10 12 13 DEV OUT NRZ OUT LVA OUT — — — 12 13 GND Level comparator, NRZ comparator and LVA comparator outputs. They are open collectors. (Applied voltage range: –0.5 V to +7.0 V) 20k 11 11 CHARGE 0V 100k GND Controls the ON/OFF operation of the quick-charge circuit. Set this pin high to execute the quick charge. (Applied voltage range: –0.5 V to +7.0 V) —4— CXA3099N Pin No. Symbol Pin voltage Equivalent circuit VCC Description 14 REG CONT — 14 72 Output for internal constantvoltage source amplifier. Connect the base of PNP transistor. (Current capacity: 100 µA) GND VCC 15 REG OUT 1.0 V 15 78k 1k 22k GND Constant-voltage source output. Controlled to maintain 1.0 V. 16 VCC Power supply. —5— CXA3099N Electrical Characteristics Item Current consumption Current consumption (VCC = 1.4 V, Ta = 25 °C, Fs =455kHz, FMOD = 1.6 kHz, FDEV = 4.8 kHz, AMMOD = 30 %) Symbol ICC ICCS AMRR IBIAS VO VSATNRZ ILNRZ VTWNRZ IOUT VSATVB VREG VLVA ILLVA VSATLVA VODET VTHBSV VTLBSV VIN (LIM) VSATLC ILLC VORSSI RINLIM ROUTMIX RINLIM Conditions Measurement circuit 1 V2 = 1.0 V Measurement circuit 1, V2 = 0 V Measurement circuit 3 30k LPF Measurement circuit 2 Measurement circuit 4 Measurement circuit 6 Vin = 0.3 V Measurement circuit 5 Vin = 0.1 V Measurement circuit 5 Vin = 0.1 to 0.3 V Measurement circuit 7 Measurement circuit 7 Output current 0 µA Measurement circuit 8 V1 = 1.4 to 1.0 V Measurement circuit 8 V1 = 1.0 V Measurement circuit 9 Measurement circuit 3 — — Measurement circuit 3 Measurement circuit 11 Measurement circuit 10 Measurement circuit 12 — — — Min. 410 — 25 — 160 — — — 100 — 0.89 1.00 — — 38 0.9 — — — — — 1.6 1.2 1.2 Typ. 590 6 — — — — — 10 — — 0.96 1.05 — — 50 — — 17 — — 135 2.0 1.5 1.5 Max. 800 20 — 100 — 0.4 5.0 20 — 0.4 1.04 1.10 5.0 0.4 68 — 0.35 24 0.4 5.0 310 2.4 1.8 1.8 Unit µA µA dB nA mVp-p V µA mV µA V V V µA V mVrms V V dBµ V µA mV kΩ kΩ kΩ AM rejection ratio Op amp. input bias current Op amp. maximum output level NRZ output saturation voltage NRZ output leak current NRZ hysteresis width VB output current VB output saturation voltage REG OUT voltage LVA operating voltage LVA output leak current LVA output saturation voltage Detector output voltage Logic input voltage high level Logic input voltage low level Limiting sensitivity Level comparator output saturation voltage Level comparator output leak current RSSI output offset Mixer input resistance Mixer output resistance IF limiter input resistance —6— Electrical Characteristics Measurement Circuit V1 V1 0.2V V3 1.4V VCC 1.4V 15 16 15 14 13 12 A VCC 10 16 14 13 12 11 10 16 15 14 13 12 11 9 9 Measurement circuit 2 11 10 9 Measurement circuit 1 Measurement circuit 3 1 1 0.01µ V2 1.0V 2 2 V2 1.0V A V3 0.2V Vin 50 3 3 4 5 6 7 8 4 5 6 7 8 1 2 3 10µ 4 5 6 7 8 V2 VCC V1 4.7k 1.4V V —7— VCC 1.4V V1 VCC 1.4V V1 V1 100k 11 10 A V V 50µA VCC 1.4V 16 15 14 13 12 9 16 15 14 13 12 11 10 9 16 15 14 13 12 11 10 9 Measurement circuit 6 Measurement circuit 4 Measurement circuit 5 1 Vin V3 0.2V 2 3 4 5 6 7 8 1 2 3 V2 4 1.0V 5 6 Vin 7 8 1 2 3 V2 4 1.0V 5 6 Vin 7 8 V2 1.0V CXA3099N VCC V1 1.4V 100µA VCC VCC V1 V1 1.4V V V V3 0.2V 11 10 50µA 11 10 100k A V V3 0.5V 16 15 14 13 12 9 16 15 14 13 12 16 15 14 13 12 Measurement circuit 8 9 11 10 9 Measurement circuit 7 Measurement circuit 9 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 V2 1.0V 5 6 7 8 V2 1.0V —8— VCC V1 1.4V VCC V1 1.4V A V V 10 100k 11 50µA 10 VCC 11 V1 1.4V V 9 16 15 14 13 12 11 10 16 15 14 13 12 9 16 15 14 13 12 9 Measurement circuit 12 Measurement circuit 10 Measurement circuit 11 1 Vin 0.2V 2 3 4 5 6 7 8 1 2 3 4 V2 1.0V 5 6 7 8 Vin 0.1V 1 2 3 4 V2 1.0V 5 6 7 8 V2 1.0V CXA3099N Application Circuit P9 NRZ P11 REC GND 220 C2 10µ C4 0.01µ 0.01µ C6 PNP GND R3 GND P10 LVR R4 R6 P8 CHARGE P7 DEV 100k 100k R10 100k C5 10µ GND 14 VB REG LVA GND 15 GND 13 NRZ COMP DEV COMP RSSI 12 11 10 16 S2 100P 9 78k 22k GND R1 R2 CHARGE GND QUAD DET IF LIM RF 1 S1 C7 10µ 2 3 4 5 6 C8 560P 7 8 C12 1200P 0.01µ P9 GND R9 39k R5 4.7k DISC 50 GND GND C10 R12 S3 R8 39k GND 39k P2 P1 VCC GND 100k R11 GND 2200P 47k GND GND C9 BS 1200P GND AUDIO P3 Use this circuit to change cut-off frequency of the filter. CXA3099N Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. FCON P4 R7 GND P5 —9— REG C11 P6 RSSI GND P12 CXA3099N Application Note 1) Power Supply The CXA3099N, with built-in regulator, is designed to permit stable operation at wide range of supply voltage from 1.1 to 4.0 V. Decouple the wiring to VCC (Pin 16) as close to the pin as possible. 2) IF Limiter Amplifier The gain of this IF limiter amplifier is approximately 100 dB. Take notice of the following points in making connection to the IF limiter amplifier input pin (Pin 1). a) Wiring to the IF limiter amplifier input (Pin 1) should be as short as possible. b) As the IF limiter amplifier output appears at QUAD (Pin 5), wiring to the ceramic discriminator connected to QUAD should be as short as possible to reduce the interference with the mixer output and IF limiter amplifier input. 1 2 3 4 5 6 VCC As short as possible Fig. 2 3) Quick Charge In order to hasten the rising time from when power is turned on, the CXA3099N features a quick charge circuit. Therefore, the quick charge circuit eliminates the need to insert a capacitor between the detector output and the LPF as is the case with conventional ICs, but capacitor should be connected to Pin 4 to determine the average signal level during steady-state reception. The capacitance value connected to Pin 4 should be chosen such that the voltage does not vary much due to discharge during battery saving. Connect a signal for controlling the quick charge circuit to Pin 11. Setting this pin high enables the quick charge mode, and setting this pin low enables the steady-state reception mode. Quick charge is used when the power supply is turned on. The battery saving must be set high at the time. Connect Pin 14 to GND when quick charge is not being used. Timing Power supply (Pin 16) Quick charge (Pin 11) Battery save (Pin 3) H L H L Active Battery saving Fig. 3 —10— CXA3099N 4) Detector The detector is of quadrature type. To perform phase shift, connect a ceramic discriminator to Pin 5. The phase shifting capacitor for the quadrature detector is incorporated. The FM (FSK) signal with the demodulated detector will be output to DET OUT (Pin 6) through the internal primary LPF. DET OUT output impedance is 200 Ω or less. The DET OUT output is the anti-phase output to NRZ OUT. The CDBM455C28 (MURATA MFG. CO., LTD.) ceramic discriminator is recommended for the CXA3099N. 4 5 6 DET OUTPUT 4.7k Ceramic discriminator CDBM455C28 VCC Fig. 4 5) Filter Buffer, Level Comparator and NRZ Comparator An operational amplifier for LPF is built in this IC. It is connected internally to the NRZ comparator, level comparator and quick charge circuit. 12 11 10 L.C. 9 8 7 0.2V 4 Fig. 5 Using the operational amplifier of Pins 7 and 8 to construct an LPF, remove noise from the demodulated signal and input the signal to the above three circuits. The level comparator and the NRZ comparator shape waveform of this input signal and output it as a square wave. The comparator output stage is for open collector. Thus, if the CPU is of CMOS type and the supply voltage is different, a direct interface as illustrated in the figure below can be implemented. VCC 1.4V VCC 16 CMOS power supply (10) 12 Comparator output CMOS IC Fig. 6 6) REG CONT Controls the base bias of the external transistors. —11— CXA3099N 7) LVA OUT This pin goes high (open) when the supply voltage becomes low. Since the output is an open collector, it can be used to directly drive CMOS device. The setting voltage of the LVA is 1.05 V (typ.), and it possesses a hysteresis with respect to the supply voltage. The hysteresis width is 50 mV (typ.). 8) B.S. Operation of the CXA3099N can be halted by setting this pin low. This pin can be connected directly to CMOS device. The current consumption for battery saving is 20 µA or less (at 1.4 V). B.S. 3 Fig. 7 9) M-ary (M = 2- or 4-level) FSK Demodulation System Polarity discrimination output and MSB comparator output are used to demodulate the 4-level waveform shown below. [4-level FSK demodulating waveform] +4.8kHz +1.6kHz 01 00 10 11 01 10 00 –1.6kHz –4.8kHz [NRZ OUT] Polarity discrimination output POS (When the input frequency is higher than the local frequency) 0 0 1 1 0 1 0 NEG The polarity can be inverted by setting the local frequency higher than the input frequency. [L.C. OUT] MSB comparator output 1.6kHz 1 4.8kHz 0 0 1 1 0 0 —12— CXA3099N The 4-level FSK demodulating data is divided into an NRZ OUT and L.C. OUT shown above. Here, the NRZ OUT corresponds to a conventional NRZ comparator output. The L.C. OUT is made comparing the demodulated waveform amplitude to the IC internal reference voltage levels. When the threshold value of L.C. OUT is not appropriate to the detector output, the resistance value on Pin 5 should be adjusted for the detector output level adjustment. For the 2-level FSK demodulation, it corresponds to a conventional NRZ comparator output. 10) Principle of Quick Charge Operation BUF in Fig. 8 is the detector buffer amplifier, and AMP is an operational amplifier to construct an LPF. COMP is the level comparator or the NRZ comparator. The CXA3099N has a feedback loop from the comparator input to the input circuit of the detector output buffer. This equalizes the average value of the comparator input voltage to the reference voltage, with the quick charge circuit of CHG being set in the feedback loop. Switching the current of the quick charge circuit enables reduction of the rise time. In this block, CHG is a comparator which compares input voltages and outputs a current based on this comparison. The current on CHG is switched between high and low at Pin 11. When the power is turned on, switch the current to high to increase the charge current at C in Fig. 8 and shorten the time constant. During steady-state reception mode, switch the current to low, lengthening the charge time constant and allowing for stable data retrieval. BU F AM P COMP CHG C Reference voltage Fig. 8 11) S Curve Characteristics Even if the IF IN input signal frequency is deviated, the feedback is applied to the DET OUT operating point so as to match it to the comparator reference voltage by the quick charge operation shown in Fig. 8. Therefore, this feedback must be halted in order to evaluate the S curve characteristics. To execute the evaluation, measure the average voltage on Pin 8 first and input this voltage to Pin 4 from the external power supply. —13— CXA3099N Example of Representative Characteristics S+N+D 0 RSSI 1000 1000 RSSI output voltage [mV] Current consumption [µA] Audio response [dB] 10 20 30 40 0dB = 50mVrms IF 455kHz -10dBm Dev: 4.8kHz AUDIO: 1.6kHz No matching circuit VCC=1.4V Data filter 2.3kHz 25°C S/N ratio 800 600 400 200 0 900 800 700 600 500 400 1.0 3.0 4.0 Supply voltage [V] Supply voltage vs. Current consumption 2.0 50 –100 –90 –80 –70 –60 –50 –40 –30 –20 –10 RF input level [dBm] Audio response and RSSI output voltage characteristics Comparator output voltage [V] 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 150 200 250 300 Comparator input voltage [mV] Comparator output voltage [V] 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 160 180 200 220 240 260 280 Comparator input voltage [mV] Deviation comparator characteristics 60 NRZ comparator characteristics O : H →L X : L →H Detector output level [mVrms] 50 40 50 30 Threshold level-214 [mV] 20 0 –20 0 25 50 75 Temperature [°C] 10 0 –25 0 25 50 75 Temperature [°C] –50 Detector output level temperature characteristics Level comparator temperature vs.Threshold level —14— CXA3099N Package Outline Unit : mm 16PIN SSOP (PLASTIC) ∗5.0 ± 0.1 + 0.2 1.25 – 0.1 0.1 16 9 A ∗4.4 ± 0.1 1 8 0.65 b B 0.13 M + 0.05 0.15 – 0.02 + 0.1 b=0.22 – 0.05 (0.22) 6.4 ± 0.2 b=0.22 ± 0.03 0.1 ± 0.1 0.5 ± 0.2 DETAIL B : SOLDER DETAIL B : PALLADIUM NOTE: Dimension “∗” does not include mold protrusion. 0° to 10° PACKAGE STRUCTURE DETAIL A PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-16P-L01 SSOP016-P-0044 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER / PALLADIUM PLATING 42/COPPER ALLOY 0.1g NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). —15— + 0.03 0.15 – 0.01 (0.15)