CXA3238TN

CXA3238TN/CXA3239TN 6/4-channel Read/Write Amplifier for GMR-Ind Head Hard Disk Drive For the availability of this product, please contact the sales office. Description The CXA3238TN/CXA3239TN is a Read/Write amplifier for GMR-Ind (Giant Magneto ResistiveInductive) heads used in hard disk drives, and is capable of supporting up to six channels. Features • +5 V and –3 V power supply. • Current bias voltage sense type. • Drives up to six heads (CXA3238TN) • Drives up to four heads (CXA3239TN) • Low power 180 mW at Read • Differential read amplifier gain ; ×140/190 (RMR=50 Ω) • Input noise of 0.77 nV/ √ Hz (typ.), RMR=50 Ω, IB=6.0 mA. • • • • • Recovery time write to read ; 300 nsec. (typ.) Write data is triggered by differential P-ECL signal. Servo bank write. (All channels) Write unsafe detection circuit. Serial port … Head selection MR bias Write current Applications Hard disk drives with GMR-Ind heads. Structure Bipolar silicon monolithic IC 38 pin TSSOP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VCC –0.3 to +6 V • Supply voltage VEE –4.5 to +0.3 V • Digital input voltage Vdi –0.3 to VCC+0.3 V • Operating temperature Topr –20 to +70 °C • Storage temperature Tstg –55 to +150 °C • Allowable power dissipation TSSOP38 PD 1000 mW Operating Conditions • Supply voltage • MR bias voltage • Bias current • Write current VCC VEE VMR IB IW +4.4 to +5.5 V –4.0 to –2.6 V –300 to +300 mV 3 to 8 mA 15 to 45 mA Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E98346C8Y CXA3238TN/CXA3239TN Block Diagram and Pin Configuration CXA3238TN RS SCLK SDATA WDX WDY VCC GND RDY RDX 1 Serial Interface 2 3 4 WD BUF Bias current source Write current source AMP 38 R5Y 37 R5X 36 W5Y 35 W5X 34 W4X DRIVER 5 DRIVER 6 7 AMP 33 W4Y 32 R4X 31 R4Y AMP 8 9 AMP 30 R3Y 29 R3X 28 W3Y FLT/SE/BHV 10 R/XW 11 DRIVER SDEN 12 CAP 13 DRIVER 27 W3X 26 W2X 25 W2Y 24 R2X DRIVER VEE 14 W0X 15 W0Y 16 R0X 17 R0Y 18 W1X 19 AMP AMP 23 R2Y 22 R1Y 21 R1X 20 W1Y AMP DRIVER —2— CXA3238TN/CXA3239TN CXA3239TN RS SCLK SDATA WDX WDY VCC GND RDY RDX 1 Serial Interface 2 3 4 WD BUF Bias current source Write current source AMP 38 R3Y 37 R3X 36 W3Y 35 W3X 34 W2X DRIVER 5 DRIVER 6 7 AMP 33 W2Y 32 R2X 31 R2Y AMP 8 9 30 W1X DRIVER FLT/SE/BHV 10 NC 11 AMP 29 W1Y 28 R1X 27 R1Y 26 R0Y 25 R0X 24 W0Y DRIVER NC 12 NC 13 NC 14 NC 15 R/XW 16 SDEN 17 CAP 18 VEE 19 AMP 23 W0X 22 NC 21 NC 20 VEE —3— CXA3238TN/CXA3239TN Pin Description Pin No. CXA3238TN Equivalent circuit Description Symbol VCC 250 1 RS 1 VBGR ≈1.3V VEE GND Bias current setting resister is connected between this pin and GND. VCC 2 3 12 SCLK SDATA SDEN 2 3 12 7.5k Serial control signal input. 14k 2Vf GND VEE VCC 4 5 WDX WDY 100 4 5 100 Differential P-ECL write data input. VEE GND 6 7 VCC GND VCC 100 5 V power supply. Ground 9 8 RDX RDY 9 8 1.8mA VEE GND Read amplifier output with coupling capacitors. High impedance in the write mode. —4— CXA3238TN/CXA3239TN Pin No. Symbol Equivalent circuit Description VCC 100 10k 10 FLT/SE/BHV 10 Head unsafe detection output. Servo Bank Write Enable input. Buffered Head Voltage output. GND VEE VCC 100k 11 R/XW 11 3Vf GND Read / Write control signal input. Read when high, Write when low. VEE VCC 13 CAP 13 Connect an external capacitor of Read amplifier between this pin and VEE. VEE 14 15 16 19 20 26 25 27 28 34 33 35 36 VEE W0X W0Y W1X W1Y W2X W2Y W3X W3Y W4X W4Y W5X W5Y –3 V power supply. VCC 15 19 26 27 34 35 16 20 25 28 33 36 GND VEE Inductive heads for Write. Six channels are provided. —5— CXA3238TN/CXA3239TN Pin No. 17 18 21 22 24 23 29 30 32 31 37 38 Symbol Equivalent circuit Description R0X R0Y R1X R1Y R2X R2Y R3X R3Y R4X R4Y R5X R5Y VCC 17 21 24 29 32 37 18 22 23 30 31 38 VEE MR heads for Read. Six channels are provided. —6— CXA3238TN/CXA3239TN Pin Description Pin No. CXA3239TN Equivalent circuit Description Symbol VCC 250 1 RS 1 VBGR ≈1.3V VEE GND Bias current setting resister is connected between this pin and GND. VCC 2 3 17 SCLK SDATA SDEN 2 3 17 7.5k Serial control signal input. 14k 2Vf GND VEE VCC 100 4 5 WDX WDY 4 5 100 Differential P-ECL write data input. VEE GND 6 7 VCC GND VCC 100 5 V power supply. Ground 9 8 RDX RDY 9 8 1.8mA VEE GND Read amplifier output with coupling capacitors. High impedance in the write mode. —7— CXA3238TN/CXA3239TN Pin No. Symbol Equivalent circuit Description VCC 100 10k 10 FLT/SE/BHV 10 Head unsafe detection output. Servo Bank Write Enable input. Buffered Head Voltage output. GND VEE 11 12 13 14 15 21 22 Non Connection NC VCC 100k 16 R/XW 16 3Vf GND Read / Write control signal input. Read when high, Write when low. VEE VCC 18 CAP 18 Connect an external capacitor of Read amplifier between this pin and VEE. VEE 19, 20 VEE –3 V power supply. —8— —8— CXA3238TN/CXA3239TN Pin No. 23 24 29 30 33 34 35 36 25 26 27 28 31 32 37 38 Symbol Equivalent circuit Description W0X W0Y W1Y W1X W2Y W2X W3X W3Y R0X R0Y R1Y R1X R2Y R2X R3X R3Y VCC 23 24 29 30 33 34 35 36 Inductive heads for Write. Four channels are provided. GND VEE VCC 25 26 27 28 31 32 37 38 VEE MR heads for Read. Four channels are provided. —9— CXA3238TN/CXA3239TN Electrical Characteristics (Unless otherwise specified; VCC=5 V, VEE=–3 V, Ta=25 °C, CAP=0.1 µF, RS=7.5 kΩ) No. Item Power Dissipation 1-1 1-2 1-3 1-4 1-6 1-7 1-8 1-9 Bank write mode VEE power supply current Symbol Measurement conditions IW=31 mA, IB=6.0 mA ISP1 IID1 IRE1 IWR1 IID2 IRE2 IWR2 ICCBW SLEEP mode IDLE mode Read mode Write mode IDLE mode Read mode Write mode ICCBW=17+17×N+IW×N, IW=31 mA Min. Typ. Max. Unit VCC power supply current 2.1 22 36 80 10 10 10 300 2.8 29 47 100 13 13 13 mA mA mA mA mA mA mA mA Digital Inputs TTL input 2-1 low input voltage TTL input 2-2 high input voltage TTL input 2-3 input current Serial interface input 2-4 low input voltage Serial interface input 2-5 high input voltage Serial interface input 2-6 input current P ECL input 3-1 Voltage range P ECL input 3-2 Input amplitude 3-3 3-4 3-5 3-6 P ECL input current P ECL input high input voltage 2 P ECL input low input voltage 2 P ECL input differential voltage 2 VIL VIH ITTL VSIL VSIH IST VWDV VWDA IWD VPIH TTL input; R/XW Pull-up resister : 100 kΩ High voltage : 5 V Low voltage : 0 V Serial input; SDATA, SCLK, SDEN 0 2.0 –100 0.8 VCC+ 0.3 100 1 V V µA V V 4 1000 VCC +0.3 1.5 20 High voltage : 5 V, Low voltage : 0 V –1000 Pull-down resister : 14 kΩ VCC –2.5 Write data input 0.3 Input voltage : 4 V –20 VDD–0.2 VDD VDD=3.3 V 2.0 (VPIH–VPIL) × 2 —10— 400 µA V V µA V V mV VPIL Vdiff VDD–0.5 VDD–0.3 800 1300 CXA3238TN/CXA3239TN No. 4-1 4-2 5-1 5-2 6 Item Bank Write Enable voltage Bank Write Enable current FLT output low voltage FLT output high voltage BHV gain accuracy Symbol VSEH ISEH VFLTL VFLTH EBHV Measurement conditions Min. VCC +1.2 6 Typ. Max. VCC +1.4 14 0.8 Unit V mA V V External resistance=2.4 kΩ External resistance=2.4 kΩ 4.5 –8 Read Characteristics R1 R2 R3 R4 R5 R6 R7 R8 R9-1 Low Gain High Gain Low frequency cut-off (–3 dB) High frequency cut-off (–3 dB) Input reflected noise MR bias current range 1 MR bias accuracy MR bias resolution VBHV=VCC–4×IB×(RMR+5.5 Ω) IB=“1,1,1” RMR=50 Ω RMR=50 Ω, IB=6.0 mA [GAIN]=0 AVL RMR=50 Ω, IB=6.0 mA AVH FCL FCH ENI IBR1 EIB RIB PSRR1 3 bit DAC Exclusive of Head noise RMR=50 Ω, IB=6.0 mA [GAIN]=1 RMR=50 Ω, IB=6.0 mA 8 % 115 155 140 190 350 165 225 550 V/V V/V kHz MHz 140 200 0.77 0.95 nV/ √ Hz 8 +7 mA % mA dB dB dB dB dB 50 mV Ω 3 –7 0.714 38 45 37 27 40 VCC power supply rejection ratio VEE power supply R9-2 rejection ratio Common mode R10-1 rejection ratio 1 Common mode R10-2 rejection ratio 2 Control line input noise R11 rejection RDX/RDY offset difference R12 magnitude RDX/RDY output R13 impedance Ripple voltage : 100 mVp-p 100 kHz to 50 MHz Ripple voltage : 100 mVp-p PSRR2 100 kHz to 10 MHz Ripple voltage : 100 mVp-p CMRR1 100 kHz to 50 MHz Ripple voltage : 100 mVp-p CMRR2 51 MHz to 80 MHz Ripple voltage : 100 mVp-p CLRR 4 MHz to 80 MHz VOFF1 RDro Write to Read Differential, read mode 30 100 —11— CXA3238TN/CXA3239TN No. Item Read Safety Characteristics P1 P2 MR head open threshold MR head short threshold Symbol Measurement conditions Min. Typ. Max. Unit MRop MRsh Head X - Head Y Head X - Head Y IB= ‘000’ to ‘011’ 600 15 750 50 900 90 mV mV Write Characteristics W1 W2 W3 W4 W6 W7 W8 W9 Write current range Write current accuracy Write current resolution Leakage current Damping register Write current propagation delay time Write current rise/fall time Erase current accuracy IWR EIW RIW ILEAK RD Tpd TR/TF EIE LH=0, RH=0 Write DATA to 50 % of Write current RH=15 Ω, LH=150 nH, IW=31 mA VCC=3.5 V DAC code=× ‘0101’ –18 2.5 –9 0 DAC code=× ‘0000’ to × ‘1111’ RH=0 Ω 4 bit DAC Unselected head 320 420 15 –7 2 200 520 10 45 +7 mA % mA µA Ω ns ns % Write Safety Characteristics U1 U2 U3 U4 U5 U6 U7 Write head open threshold Head voltage when short to GND WD frequency too low Write safety detect time Low VCC threshold Low VCC threshold Low VCC threshold hysteresis ROP VG fWDL TWS T1 : 2 transitions on WDX/WDY 3.7 3.9 3.9 4.1 200 Detect open head Detect short to GND 0.5 1.2 1.4 0.1 1.8 300 +T1 4.1 4.3 V V MHz ns V V mV VWthL Fault detected VWthH Fault removed Vhys —12— CXA3238TN/CXA3239TN No. Item Switching Characteristics S1 S2 S3 Write to Read Read to Write Idle to Read Symbol Measurement conditions IW=31 mA, IB=6 mA Signal on WDX/WDY TWR 90 % RD signal or 10 % IW TRW TIR TSR1 90 % IW 90 % RD signal Min. Typ. Max. Unit 300 50 500 70 1.0 ns ns µs µs µs 90 % RD signal ,90 % IB(*1) IB="0,1,1" 90 % RD signal ,90 % IB(*1) S4-2 Sleep to Read(A3239) TSR2 IB="0,1,1" Bank Write Characteristics IW=31 mA, IB=6 mA S4-1 Sleep to Read(A3238) S5 S6 S7 Read to Bank Write Bank Write to Read TRB TBR TIW 90 % IW 10 % IW 90 % IW 600 600 1000 2000 100 100 300 ns ns us Idle to Bank Write Idle to Write Serial port timing Set up time Hold time SCLK frequency SCLK pulse width SCLK-SDATA set up time SCLK-SDATA hold time SDEN low time B1 B2 B4 B5 B6 B7 B8 Tsu SDEN to first SCLK (sden) Th Last SCLK to deassert SDEN (sden) f (sclk) Tw (sclk) Tsu (d) Th (d) TSL 10 10 30 10 10 10 100 ns ns MHz ns ns ns ns (∗1) TSR is proportional to IB and external CAP value —13— CXA3238TN/CXA3239TN Serial port characteristics ADR1 0 0 1 ADR0 0 1 0 DATA5 DATA4 XSLP XIDL GAIN BHV MROPN MRSHT DATA3 N/A N/A IW3 DATA2 HS2 IB2 IW2 DATA1 HS1 IB1 IW1 DATA0 HS0 IB0 IW0 ∗IB bits are initialized by ‘0’ at power on Code Description Bit XSLP XIDL HS GAIN BHV IB MROPN MRSHT IW Function “0” = Set the pre-amp into low power “sleep” mode “0” = Set preamplifier to idle mode Head select bit Set the pre-amp to high or low gain mode. “1” = Set preamplifier to high gain mode Activate the BHV test point pin. “1” active. MR bias current set “1” = Set MR head open detector active. “1” = Set MR head short detector active. Set write current —14— CXA3238TN/CXA3239TN Mode Control SLEEP XSLP=0 READ XSLP=1 XIDL=1 R/XW=H IDLE XSLP=1 XIDL=0 R/XW=X WRITE XSLP=1 XIDL=1 R/XW=L Serial Port Timing Detail TSL f (sclk) SDEN Tw (sclk) Tsu (sden) Th (sden) SCLK Th (d) Tsu (d) SDATA A1 A0 D5 D4 D3 D2 D1 D0 Serial Port Timing After the SDEN goes high, the last eight bits are transferred into the register. The SCLK will shift the data presented at the SDATA into an internal shift register on the rising edge of each clock. As SCLK initial condition, both of Low and High signal is acceptable. —15— CXA3238TN/CXA3239TN ♦ Unsafe condition 1. Write fault condition FLT is a high level in write fault condition. • Open write head leads. fWD < 15 MHz • Write head leads shorted to ground. • WD frequency is too low. • Power supply is out of tolerance. 2. Read fault condition FLT is a low level in read fault condition. • Open and short MR head. (This function is set by serial register) ♦ Bank write control (refer to ‘Bank write current vs Current accuracy’ characteristic curve) 1. Set the Read mode. 2. Force a certain voltage(min.VCC+1.2V) to FLT/SE pin by using the pull-up resister(Rse=820Ω) #This operation disables all Fault detection. 3. Set VCC at 3.5 V (in case of Erase mode only) 4. Start the write operation by setting R/XW = “L”. 5. Terminate the write operation by setting R/XW = “H”. i) Allow 50 % write duty or less. ii) Low voltage detector is disabled in Bank Write mode and Erase mode. iii) Don’t change the serial register data bits in following conditions : ∗) VCC=3.5 V ∗∗) On entering Write data ♦ BHV (Buffered Head Voltage) 1. Applicable within VCC=5 V±5 % 2. Turn BHV on,but turn off MROPN and MRSHT 3. VBHV is determined by basis of VCC. VBHV =VCC–4 × IB × (RMR+5.5 Ω) ♦ Head select table 6ch Head select, Normal operation 0 1 2 3 4 5 none none HS2 0 0 0 0 1 1 1 1 HS1 0 0 1 1 0 0 1 1 HS0 0 1 0 1 0 1 0 1 —16— CXA3238TN/CXA3239TN ♦ Head select table 4ch HS2 0 0 0 0 1 1 1 1 HS1 0 0 1 1 0 0 1 1 HS0 0 1 0 1 0 1 0 1 Head select, Normal operation 0 1 2 3 none none none none ♦ MR Bias IB2 0 0 0 0 1 1 1 1 IB1 0 0 1 1 0 0 1 1 IB0 0 1 0 1 0 1 0 1 IB (mA) 3.0 3.714 4.429 5.143 5.857 6.571 7.286 8.0 —17— CXA3238TN/CXA3239TN ♦ Write current IW3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 IW2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 IW1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 IW0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Write current (mA 0-P) 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 (*1) Actual head current is defined by the following equation: Ihead=Iw/ (I+Rh/Rd) Rh : Head Resistance Rd : Damping Resistance (*2) Short X-Y terminal on un-used head —18— CXA3238TN/CXA3239TN ♦ 6ch CXA3238TN 1 2 3 4 5 6 7 8 9 RS SCLK SDATA WDX WDY VCC GND RDY RDX R5Y 38 R5X 37 W5Y 36 W5X 35 W4X 34 W4Y 33 R4X 32 R4Y 31 R3Y 30 R3X 29 W3Y 28 W3X 27 W2X 26 W2Y 25 R2X 24 R2Y 23 R1Y 22 R1X 21 W1Y 20 10 FLT/SE/BHV 11 R/XW 12 SDEN 13 CAP 14 VEE 15 W0X 16 W0Y 17 R0X 18 R0Y 19 W1X TSSOP 38Pin 0.5 mm pitch Package dimension including leads 6.4 × 9.7 mm —19— CXA3238TN/CXA3239TN ♦ 4ch CXA3239TN 1 2 3 4 5 6 7 8 9 RS SCLK SDATA WDX WDY VCC GND RDY RDX R3Y 38 R3X 37 W3Y 36 W3X 35 W2X 34 W2Y 33 R2X 32 R2Y 31 W1X 30 W1Y 29 R1X 28 R1Y 27 R0Y 26 R0X 25 W0Y 24 W0X 23 NC 22 NC 21 VEE 20 10 FLT/SE/BHV 11 NC 12 NC 13 NC 14 NC 15 NC 16 R/XW 17 SDEN 18 CAP 19 VEE TSSOP 38Pin 0.5 mm pitch Package dimension including leads 6.4 × 9.7 mm —20— CXA3238TN/CXA3239TN Application Circuit CXA3238TN 7.5kΩ 1 2 3 4 5 RS SCLK SDATA WDX WDY VCC GND RDY RDX R5Y 38 R5X 37 W5Y 36 W5X 35 W4X 34 W4Y 33 R4X 32 R4Y 31 R3Y 30 R3X 29 W3Y 28 W3X 27 W2X 26 W2Y 25 R2X 24 R2Y 23 R1Y 22 R1X 21 W1Y 20 5V 0.1µF 6 7 8 9 10 FLT/SE/BHV 11 R/XW 12 SDEN 13 CAP 14 VEE 15 W0X 16 W0Y 17 R0X 18 R0Y 19 W1X 0.1µF –3V 0.1µF —21— CXA3238TN/CXA3239TN CXA3239TN 7.5kΩ 1 2 3 4 5 RS SCLK SDATA WDX WDY VCC GND RDY RDX R3Y 38 R3X 37 W3Y 36 W3X 35 W2X 34 W2Y 33 R2X 32 R2Y 31 W1X 30 W1Y 29 R1X 28 R1Y 27 R0Y 26 R0X 25 W0Y 24 W0X 23 NC 22 NC 21 VEE 20 5V 0.1µF 6 7 8 9 10 FLT/SE/BHV 11 NC 12 NC 13 NC 14 NC 15 NC 16 R/XW 17 SDEN 18 CAP 0.1µF –3V 19 VEE 0.1µF —22— CXA3238TN/CXA3239TN Measurement Spec.Circuit 7.5kΩ 25Ω 1 2 3 RS SCLK SDATA WDX WDY VCC GND RDY RDX CXA3238TN R5Y 38 R5X 37 W5Y 36 180nH W5X 35 W4X 34 180nH W4Y 33 25Ω R4X 32 25Ω R4Y 31 25Ω R3Y 30 R3X 29 25Ω W3Y 28 180nH W3X 27 W2X 26 180nH W2Y 25 25Ω R2X 24 25Ω R2Y 23 25Ω R1Y 22 R1X 21 25Ω W1Y 20 180nH 25Ω VCC V1 3300µH 4 V WDX 5 1µF S7 S6 R13 1k 10µF 0.1µF V WDY 6 VPSRR Amp1 Gain=×1 1000pF 7 8 9 V VM1 R14 1k 0.1µF V VSE VCC 2.4k 10 FLT/SE/BHV 11 R/XW Amp2 Gain=×100 V R/XW 3300µH 12 SDEN 10µF 13 CAP 14 VEE 15 W0X BPF 100kHz to 50MHz V VM2 1kΩ S/I VPSRR’ 1µF VEE S7’ S6’ 0.1µF 180nH 16 W0Y 25Ω 17 R0X 18 R0Y 25Ω 19 W1X —23— CXA3238TN/CXA3239TN 7.5kΩ 25Ω 1 2 3 RS SCLK SDATA WDX WDY VCC GND RDY RDX CXA3239TN R3Y 38 R3X 37 W3Y 36 180nH W3X 35 W2X 34 180nH W2Y 33 25Ω R2X 32 25Ω R2Y 31 W1X 30 180nH W1Y 29 25Ω R1X 28 25Ω R1Y 27 R0Y 26 R0X 25 W0Y 24 180nH W0X 23 NC 22 NC 21 VEE 20 25Ω 25Ω 25Ω VCC V1 3300µH 4 V WDX 5 1µF S7 S6 R13 1k 10µF 0.1µF V WDY 6 VPSRR Amp1 Gain=×1 1000pF 7 8 9 V VM1 R14 1k 0.1µF V VSE VCC 2.4k 10 FLT/SE/BHV 11 NC 12 NC Amp2 Gain=×100 BPF 100kHz to 50MHz V VM2 1kΩ S/I 13 NC 14 NC 15 NC 16 R/XW V R/XW 3300µH 17 SDEN 10µF 18 CAP 19 VEE VPSRR’ 1µF VEE S7’ S6’ 0.1µF —24— CXA3238TN/CXA3239TN Normalized bias current vs Ambient temperature 1.04 VCC=5V VEE=–3V RMR=50Ω IBn=“100” Low gain Normalized bias current vs Power supply voltage 1.04 VEE=–3V RMR=50Ω IBn=“100” Low gain Ta=25°C 1.02 IB/IB (Ta=25°C) 1.02 IB/IB (VCC=5V) 1 1 0.98 0.98 0.96 –25.0 0.0 25.0 50.0 75.0 Ambient temperature Ta (°C) 0.96 3.5 4 4.5 5 VCC (V) 5.5 6 6.5 Normalized read amplifier voltage gain vs Ambient temperature 1.04 1.04 Normalized read amplifier voltage gain vs Power supply voltage VEE=–3V RMR=50Ω IBn=“100” Low gain Ta=25°C 1.02 AV/AV (Ta=25°C) AV/AV (VCC=5V) 1.02 1 VCC=5V VEE=–3V RMR=50Ω IBn=“100” Low gain 1 0.98 0.98 0.96 –25.0 0.0 25.0 50.0 75.0 Ambient temperature Ta (°C) 0.96 3.5 4 4.5 5 VCC (V) 5.5 6 6.5 Bank write current vs Current accuracy 8 Bank write current accuracy (%) 6 4 2 0 –2 –4 –6 –8 10 15 20 25 30 35 40 45 50 Deviation of Bank write current is within ±7% at basis of the chart Bank write current (mA) Bank Write (A3238) Bank Write (A3239) VCC=5V Ta=25°C RH=0Ω Read 170µs Write 30µs —25— CXA3238TN/CXA3239TN Input refered noise voltage vs Ambient temperature 0.82 VCC=5V VEE=–3V RMR=50Ω IBn=“100” Normalized write current vs Ambient temperature 1.04 VCC=5V VEE=–3V IWn=“1000” 0.8 1.02 IW/IW (Ta=25°C) 0.78 EN [nV/ √Hz] 1 0.76 0.98 0.74 0.96 –25.0 0.0 25.0 50.0 75.0 Ambient temperature Ta (°C) 0.7 –25.0 0.0 25.0 50.0 75.0 Ambient temperature Ta (°C) 0.72 Normalized write current vs Power supply voltage 1.04 Power supply ON/OFF detector threshold voltage (V) 4.15 Power supply ON/OFF detector threshold voltage vs Ambient temperature 1.02 IW/IW (VCC=5V) VEE=–3V IWn=“1000” Ta=25°C 4.1 ON→OFF OFF→ON 4.05 1 4 0.98 3.95 0.96 3.5 4 4.5 5 VCC (V) 5.5 6 6.5 3.9 3.85 –25.0 0.0 25.0 50.0 75.0 Ambient temperature Ta (°C) —26— CXA3238TN/CXA3239TN Package Outline Unit : mm 38PIN TSSOP(PLASTIC) 1.2MAX 9.8 ± 0.2 20 0.1 38 6.4 ± 0.3 1 0.5 0.225 ± 0.075 19 4.5 ± 0.2 A 0.15 0.1 M 0.25 0.05MIN 0° to 10° DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE TSSOP-38P-L121 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.1g —27— 0.5 ± 0.1