CXA3556N

CXA3556N IF Down Converter for Digital Broadcast Description The CXA3556N is a one-chip integrated IC that processes IF signals of a digital broadcast tuner and includes an AGC amplifier circuit, a mixer circuit, a local oscillator circuit and an output amplifier circuit. The package utilizes a 24-pin SSOP suitable for surface mounting. Features • AGC control width that has a 56dB variable range • Low noise characteristics • Low distortion characteristics (in particular, during AGC gain reduction) • Includes switching function between down converter mode and linear amplifier mode • Variable output amplifier gain by changing external resistance • Includes RF AGC output pin • Variable RF AGC settings • AGC control curve characteristics with excellent linearity Applications Digital broadcast tuners Structure Bipolar silicon monolithic IC 24 pin SSOP (Plastic) Absolute Maximum Rating (Ta = 25°C) • Supply voltage Vcc –0.3 to +12 • Operating temperature Topr –55 to +150 Operating Conditions • Supply voltage Vcc • Operating temperature Topr V °C 4.75 to 5.25 –25 to +75 V °C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E02426-PS CXA3556N Block Diagram and Pin Configuration IFIN1 1 24 AGCIN IFIN2 2 23 MODESEL RFAGC 3 Comparator 22 AGCGND IREG 4 REG 21 AO2 VREG 5 AGC Amp. Output Amp. 20 AO1 LOB1 6 19 GND LOC1 7 18 AGCREF LOC2 8 OSC Mixer 17 E2 LOB2 9 16 E1 VCC1 10 15 AIN2 MO1 11 14 AIN1 MO2 12 13 VCC2 –2– CXA3556N Pin Description and Equivalent Circuit Pin No. Symbol Pin voltage Equivalent circuit Pin description 1 IFIN1 1.4V 10 VCC1 1 2 5k 5k IF inputs. 2 IFIN2 1.4V 22 AGCGND 3 3 RFAGC — 22 AGCGND RF AGC voltage output. Comparator output. Low level: 0.4V or less High level: 8V or more VCC1 10 4 IREG 2.6V 4 Connects external resistance 27kΩ. 22 AGCGND 10 VCC1 5 VREG 3.3V 5 Connects external capacitance 1µF. 22 AGCGND 6 LOB1 2.9V 10 6 8 7 9 VCC1 7 LOC1 3.7V Connects external capacitance and crystal oscillator. 8 LOC2 3.7V 19 GND 9 LOB2 2.9V –3– CXA3556N Pin No. 10 Symbol VCC1 Pin voltage 5V 10 Equivalent circuit Pin description Power supply. VCC1 11 MO1 2.3V 11 12 Mixer output pin. 12 MO2 2.3V 19 GND 13 14 VCC2 AIN1 5V 1.3V 10 200 VCC1 Power supply. 15 AIN2 1.3V 14 200 15 16 E1 0.6V 19 10k 10k Output amplifier circuit inputs. Gain of output amplifier circuit can be changed by connecting external resistance between Pins 16 and 17. GND 17 E2 0.6V 17 16 10 VCC1 90µA 18 18 AGCREF — RF AGC setting voltage adjustment pin. Connect external resistance between Pin 18 and GND and change the value to change RF AGC output voltage. 22 AGCGND 19 GND 0V VCC1 GND 20 AO1 2.7V 10 20 21 Output amplifier output. 21 AO2 2.7V 19 GND –4– CXA3556N Pin No. 22 Symbol AGCGND Pin voltage 0V Equivalent circuit Pin description AGC circuit GND. Selects either IF down converter mode or linear amplifier mode. When the voltage applied to this pin is 0.3V or less, the mode is down converter mode. When the voltage is 4.75 to 5.25V, the mode is linear amplifier mode. 20k 23 MODESEL — 23 22 GND 10 VCC1 24 AGCIN — 24 22 AGC control. Input voltage range is 0 to 2.2V. AGCGND –5– CXA3556N Electrical Characteristics (VCC = 5V, Ta = 25°C) (1) IF down converter mode (fvco = 49.38MHz) Item Symbol Measurement conditions Input signal = no signal AGC_IN voltage = 0V Input signal = 1 wave (43.5MHz), AGC_IN voltage = 2.2V Output signal = 1Vp-p Input signal = 1 wave (43.5MHz), AGC_IN voltage = 0V Output signal = 1Vp-p G3 = G1 – G2 Input signal = 2 waves (43.5MHz, 43.6MHz)/–26dBm Output signal = 1Vp-p Input signal = 2 waves (43.5MHz, 43.6MHz)/–21dBm Output signal = 1Vp-p Input signal = –60dBm (43.5MHz) Output signal = 1Vp-p Input signal = –20dBm (43.5MHz) Output signal = 1Vp-p Min. 44 65 10 54 –44 –42 — — Typ. Max. Unit 63 68.5 12.2 56 –51 –51 77 73 15 58 — — mA dB dB dB dBc dBc Current ICCA consumption A Gain 1 Gain 2 Gain width IM3_1 IM3_2 G1 G2 G3 DIS1 DIS2 Output noise 1 NF1 Output noise 2 NF2 –100 –96 dBc/Hz –120 –111 dBc/Hz (2) Linear amplifier mode Item Symbol Measurement conditions Input signal = no signal AGC_IN voltage = 0V Input signal = 1 wave (43.5MHz), AGC_IN voltage = 2.2V Output signal = 1Vp-p Input signal = 1 wave (43.5MHz), AGC_IN voltage = 0V Output signal = 1Vp-p G6 = G4 – G5 Input signal = 2 waves (43.5MHz, 43.6MHz)/–26dBm Output signal = 1Vp-p Input signal = 2 waves (43.5MHz, 43.6MHz)/–21dBm Output signal = 1Vp-p Input signal = –60dBm (43.5MHz) Output signal = 1Vp-p Input signal = –20dBm (43.5MHz) Output signal = 1Vp-p Min. 44 65 10 54 –44 –42 — — Typ. Max. Unit 63 68.5 12.7 56 –51 –51 77 73 15 58 — — mA dB dB dB dBc dBc Current ICCB consumption B Gain 4 Gain 5 Gain width IM3_3 IM3_4 G4 G5 G6 DIS3 DIS4 Output noise 3 NF3 Output noise 4 NF4 –100 –96 dBc/Hz –120 –111 dBc/Hz (3) Output amplifier characteristics Item F characteristics Symbol F Measurement conditions Input signal = 60MHz Short between Pins 16 and 17 Min. –3 Typ. Max. Unit –1.5 0 dB –6– CXA3556N Measurement circuit 1 IF down converter mode AGCIN 0 to 2.2V ∗3 5V (ICC2) Output 1µ 51 51 470 470 R 1n 10n 10n 1k 680 51p 24 AGCIN 51p 23 MODESEL 22 AGCGND 21 AO2 20 AO1 19 GND 18 AGCREF 17 E2 16 E1 15 AIN2 14 AIN1 13 VCC2 6.8µH 51p 51p 6.8µH RFAGC VREG LOC1 LOC2 LOB1 LOB2 IFIN1 IFIN2 IREG VCC1 MO1 MO2 1 1n 200 2 1n 1n 3 4 27k 1n 5 6 7 8 9 10 11 100p 12 300 300 1µ 2p 10p 2p 10n 10n 47k 1µH 49.38MHz ∗2 100p 27p ∗1 Toko 617DB-1018 ∗2 3rd overtone crystal oscillator (49.381MHz) ∗3 ICCA = ICC1 + ICC2 ∗1 1µ 27p SG input 9V 5V (ICC1) ∗3 –7– CXA3556N Measurement circuit 2 Linear mode AGCIN 0 to 2.2V 5V (ICC1) ∗4 5V (ICC2) Output 1µ 51 51 470 470 R 1n 1n 1n 680 24 AGCIN 23 MODESEL 22 AGCGND 21 AO2 20 AO1 19 GND 18 AGCREF 17 E2 16 E1 15 AIN2 14 AIN1 MO1 13 VCC2 MO2 RFAGC VREG LOC1 LOC2 LOB1 LOB2 IFIN1 IFIN2 IREG VCC1 1 1n 200 2 1n 1n 3 4 27k 1n 5 6 7 8 9 10 11 100p 12 300 300 1µ 1k 2k 2k 1n 1n 47k 5V 1µ 100p ∗4 ICCB = ICC1 + ICC2 SG input 9V 5V (ICC1) ∗4 –8– CXA3556N Measurement circuit 3 Output amplifier F characteristics AGCIN 0 to 2.2V 5V (ICC2) Output IF input 5V (ICC2) 1µ 51 51 ∗1 470 470 50k 200 1n 1n 15 AIN2 1n 1n 1n 24 AGCIN 23 MODESEL 22 AGCGND 21 AO2 20 AO1 19 GND 18 AGCREF 17 E2 16 E1 14 AIN1 MO1 13 VCC2 RFAGC VREG LOC1 LOC2 LOB1 LOB2 IFIN1 IFIN2 IREG VCC1 1 2 3 4 27k 5 6 7 8 9 10 11 100p 12 1n 1n 1n 1n 47k 1µ 1k 2k 2k 5V 1µ 100p 9V 5V (ICC1) –9– MO2 CXA3556N Application circuit IF down converter mode AGCIN 0 to 2.2V Output 1µ 27k 1k VCC 10k 10n 10n 1k 1µ 680 47p 24 AGCIN 23 MODESEL 22 AGCGND 21 AO2 20 AO1 19 GND 18 AGCREF 17 E2 16 E1 15 AIN2 14 AIN1 13 VCC2 6.8µH 47p LOC2 47p 6.8µH 47p RFAGC VREG LOC1 LOB1 LOB2 IREG IFIN1 IFIN2 VCC1 MO1 MO2 1 2 3 4 27k 5 6 7 8 9 10 11 12 330 330 1n 1n 1n 1n 1µ 2p 10p 2p 10n 10n 1µH IF input 47k 1µ 27p 49.38MHz ∗2 1µ 27p RFAGC 9V VCC Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. – 10 – CXA3556N Description of Functions The CXA3556N is an IF down converter IC for digital broadcasts. This IC contains a mixer circuit, a local oscillator circuit and an AGC circuit that standardizes IF signals in response to levels of input signals. It can also operate in a mode other than down converter (linear amplifier mode) and making possible use in a wide variety of digital broadcast tuners. (Control using Pin 23 bias voltage.) 1. AGC Circuit This is a variable gain amplifier circuit that standardizes output in response to levels of input signals. This circuit has especially excellent low distortion and noise characteristics even when the input level is large. It also has a variable width of 56dB as the gain control range with excellent linearity of the gain control curve. 2. Local Oscillator Circuit This circuit has a structure that uses a crystal oscillator and oscillates at 3rd overtone frequency. The circuit sets the parallel frequency of the parallel LC resonator between Pins 7 and 8 close to a tertiary overtone frequency (FVCO). This oscillator circuit can also use an LC resonance circuit in place of the crystal oscillator to form an oscillator circuit. 3. Output Amplifier Circuit Adding a resistor between Pins 16 and 17 allows the gain to be changed in proportion to that resistance. (Refer to characteristic graph Fig. 5 Gain vs. resistance between E1 and E2.) The output stage of this amplifier is also designed to be 500Ω load/1Vp-p. 4. Mixer Circuit This circuit outputs the frequency difference between the signal input to IF IN and the local oscillator signal. 5. RF AGC Circuit This circuit has high image quality in both strong and weak electric fields. In particular, it controls the RF IC gain existing in the first stage of the CXA3556N to delay the characteristics related to S/N to the maximum limits. The circuit controls the RF IC gain using RF AGC voltage (Pin 3) in order that signals input to IF IN (Pins 1, 2) grow larger in weak electric fields. The RF AGC voltage at Pin 3 is obtained from results of a comparison between the AGC control voltage (Pin 24 input voltage) that detects output signals and the voltage at Pin 18 that can be freely set using the resistance value. When the control voltage is low, the RF IC gain decreases and when the control voltage is high, the RF IC gain increases. – 11 – CXA3556N IF down converter mode characteristics Fig. 1. Gain vs. AGCIN voltage 80 70 60 50 Gain [dB] Fig. 2. Output noise vs. input level –60 –70 Output noise [dBc/Hz] –80 –90 –100 –110 –120 –130 –70 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 AGCIN voltage [V] –60 –50 –40 –30 –20 –10 0 Input level [dBm] Fig. 3. IM3 vs. input level 0 –10 –20 IM3 [dBc] Fig. 4. REFAGC voltage vs. AGCIN voltage 10 9 8 REFAGC voltage [V] 7 6 5 4 3 2 R = 30kΩ –30 –40 –50 –60 1 –70 –70 0 –60 –50 –40 –30 –20 –10 0 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 AGCIN voltage [V] Input level [dBm] Fig. 5. Gain vs. resistance between E1 and E2 16 14 12 10 Gain [dB] Fig. 6. Input characteristics 70MHz 109Ω –625Ω 3.6pF 30MHz 488.44Ω –1.3237kΩ 4.0079pF j50 j25 j100 8 6 4 2 0 –2 –4 1 10 100 1000 10000 100000 1E+06 –j25 Start 30MHz –j50 Resistance between E1 and E2 [Ω] –j100 Stop 70MHz 0 50 70MHz 30MHz ∗ Gain when 1kΩ is connected between E1 and E2 is 0dB. – 12 – CXA3556N Package Outline Unit: mm 24PIN SSOP (PLASTIC) + 0.2 1.25 – 0.1 ∗7.8 ± 0.1 0.1 13 24 A ∗5.6 ± 0.1 7.6 ± 0.2 1 b 12 0.13 M B 0.65 b=0.22 ± 0.03 0.1 ± 0.1 0.5 ± 0.2 DETAIL B : PALLADIUM 0˚ to 10˚ NOTE: Dimension " ∗" does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.1g LEAD TREATMENT LEAD MATERIAL PACKAGE MASS SONY CODE EIAJ CODE JEDEC CODE SSOP-24P-L01 P-SSOP24-7.8x5.6-0.65 + 0.03 0.15 – 0.01 – 13 – Sony Corporation