CXA3691AEN

High-speed Buffer Amplifier for CCD Image Sensor CXA3691AEN Description The CXA3691AEN is a high-speed buffer amplifier IC. (Applications: CCD image sensor output buffers, Digital still cameras, Camcorders, Other general buffers) Features Power consumption: 24mW (typ.) (IDRV = 50μA (220kΩ when VCC = 15V), ISF pin connected to GND, during no signal) Push-pull output High-speed response: 500V/μs (IDRV = 50μA (220kΩ when VCC = 15V), CL = 20pF) Internal sink current mode for CCD with open source output (Settable by external resistance RISF) Enables to set the responsibility by changing the drive current by an external resistor Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = 25°C) Supply voltage Supply voltage Storage temperature Allowable power dissipation VCC IN Tstg PD 16 GND – 0.3 to VCC + 0.3 –65 to +150 0.28 V V °C W (when mounted on a two-layer board; 50mm × 50mm, t = 1.6mm) Recommended Operating Conditions Supply voltage Operating temperature VCC Ta 9.0 to 15.5 –20 to +75 V °C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E07712A82 CXA3691AEN Block Diagram and Pin Configuration (Top View) ISF 6 VCC 5 IDRV 4 1 IN 2 GND 3 OUT Pin Description and I/O Pin Equivalent Circuit Pin No. 2 5 Symbol GND VCC I/O — — Standard voltage level 0V 15V Equivalent circuit — — VCC 2k 10 × IDRV Description GND. Supply voltage input. 1 IN I CCD output voltage 1 Input. 58 × IISF 10 × IDRV 2k GND VCC 6 ISF I — 6 30k 20k GND External resistor connection for setting the sink current for CCD with open source output. Connect an external resistor between this pin and VCC (Pin 5). Connect this pin to GND (Pin 2) when not using this function. * The minimum value of the external resistance should be 100kΩ (when VCC = 15V). VCC 50 3 OUT O ≈IN 50 3 Output. GND VCC 4 IDRV I — 4 30k 20k GND External resistor connection for setting the drive current. Connect an external resistor between this pin and VCC (Pin5). * The minimum value of the external resistance should be 100kΩ (when VCC = 15V). -2- CXA3691AEN Electrical Characteristics (Ta = 25°C, VCC = 15V, RIDRV = 220kΩ, ISF pin: connected to GND) DC Characteristics Item Supply current Voltage gain I/O offset voltage Symbol ICC VGAIN VOFFSET Measurement conditions IN = 10V, RIDRV = 220kΩ *1 Min. 1.4 — –100 3.3 2.9 2.5 2.1 –15 2.6 Typ. 1.6 0.999 — — — — — –5 2.9 Max. 1.8 — 100 VCC – 2.0 VCC – 1.85 VCC – 1.8 VCC – 1.7 6 3.2 Unit mA V/V mV IN: 10Vdc ΔV = 1V GAIN = ΔOUT/ΔV IN = 10V VOFFSET = OUT-IN RIDRV = 100kΩ RIDRV = 150kΩ RIDRV = 220kΩ RIDRV = 330kΩ IN = 10V, ISF = 0V IN = 10V, RISF = 220kΩ I/O voltage range Input bias current Sync current *1 VRANGE IBIAS ISINK V μA mA Voltage gain 10.5V IN ΔV = 1V 9.5V OUT ΔOUT -3- CXA3691AEN AC Characteristics (Ta = 25°C, VCC = 15V, IDRV = 50μA (220kΩ when VCC = 15V), ISF pin: connected to GND, RL = 15Ω, CL = 20pF) Item Bandwidth Rise time Symbol GBW TRISE Measurement conditions IN = 50mVp-p *1 Min. — — Typ. 220 2.5 Max. — 3.5 Unit MHz ns IN = 9.5 to 10.5V 10 to 90% *1 Fall time TFALL IN = 10.5 to 9.5V 10 to 90% *1 — 3.0 4.0 ns I/O delay time TDELAY IN = 9.5 to 10.5V @50% 0.9 1.0 2.0 ns *1 Rise time, fall time and I/O delay time 10.5V 50% 9.5V IN 90% OUT 10% 10% 90% 50% TFALL TRISE TDELAY -4- CXA3691AEN Evaluation Circuit 220kΩ ISF 6 VCC 5 220kΩ 1000pF 47µF IDRV 4 1 IN 2 GND 15Ω 20pF 3 OUT A 15V GND -5- CXA3691AEN Description of Operation Current Settings 1. Output Drive Current The small signal output impedance of the OUT pin (Pin 3) can be set by connecting the IDRV pin (Pin 4) to VCC through a resistor. The inflow current to the IDRV pin is multiplied by 10 times inside the IC, and flows as the output stage idling current. The IDRV pin has an internal 50kΩ resistor, so the inflow current to the IDRV pin can be calculated as follows. IIDRV = (VCC – VBE × 2)/(RIDRV + 50kΩ) = (15 – 1.46)/270kΩ = 50.1μA Here, VCC = 15V, VBE = 0.73V (typ.), and RIDRV = 220kΩ. The small signal output impedance at this time can be calculated as follows. ROUT = (26mV/(10 × IIDRV))/2 = (26mV/501μA)/2 = 26Ω 2. Sink Current for CCD with open source output The sink current of the IN pin (Pin 6) can be set by connecting the ISF pin (Pin 1) to VCC through a resistor. This sink current can be used as the CCD output stage source follower drive current. The inflow current to the ISF pin is multiplied by 58 times inside the IC, and flows as the sink current. The ISF pin has an internal 50kΩ resistor, so the inflow current to the ISF pin can be calculated as follows. IISF = (VCC – VBE × 2)/(RISF + 50kΩ) = (15 – 1.46)/270kΩ = 50.1μA Here, VCC = 15V, VBE = 0.73V (typ.), and RISF = 220kΩ. The sink current at this time can be calculated as follows. Isink = 58 × IISF = 2.9mA Note) This IC operation depends on IDRV and ISF. This specification is described based on IDRV of 220kΩ when VCC = 15V. However , set it to 180kΩ to occur the same current when using under the condition that VCC = 13V. [IDRV and ISF vs external resistor] Current (μA) When VCC = 15V When VCC = 13V 90 100 78 68 150 120 50 220 180 35 330 270 26 470 390 Unit kΩ kΩ -6- CXA3691AEN Example of Representative Characteristics (Upper side) I/O voltage range vs. IDRV pin setting resistance VCC – 0 Ta = 25˚C 0.5 1.0 I/O voltage [V] 1.5 2.0 2.5 3.0 3.5 4.0 0 50 100 150 200 250 300 350 I/O voltage [V] VCC = 13V VCC = 15V 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 50 100 150 200 250 300 350 VCC = 13V VCC = 15V Ta = 25˚C (Lower side) I/O voltage range vs. IDRV pin setting resistance IDRV pin setting resistance [kΩ] IDRV pin setting resistance [kΩ] Current consumption vs. IDRV pin setting resistance 4.0 Ta = 25˚C, VIN = VCC – 5V Current consumption [mA] 3.5 Sync current [mA] 3.0 2.5 2.0 VCC = 13V 1.5 1.0 0.5 0 0 50 100 150 200 250 300 350 VCC = 15V Sink current vs. ISF pin setting resistance 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 50 100 150 200 250 300 350 VCC = 13V VCC = 15V Ta = 25˚C, RIDRV = 220kΩ, VIN = VCC – 5V IDRV pin setting resistance [kΩ] ISF pin setting resistance [kΩ] Current consumption vs. Supply voltage 2.0 Ta = 25˚C, RIDRV = 220kΩ, VIN = VCC – 5V 1.8 Current consumption [mA] Current consumption [mA] Current consumption vs. Operating temperature 2.0 VCC = 15V, RIDRV = 220kΩ, VIN = VCC – 5V 1.8 1.6 1.6 1.4 1.4 1.2 1.0 10.0 11.0 12.0 13.0 14.0 15.0 16.0 1.2 –50 –25 0 25 50 75 100 Supply voltage [V] Operating temperature [˚C] -7- CXA3691AEN I/O offset voltage vs. Supply voltage 20.0 Ta = 25˚C, RIDRV = 220kΩ, VIN = VCC – 5V I/O offset voltage vs. Operating temperature 20.0 VCC = 15V, RIDRV = 220kΩ, VIN = VCC – 5V I/O offset voltage [mV] 10.0 I/O offset voltage [mV] 10.0 0 0 –10.0 –10.0 –20.0 10.0 11.0 12.0 13.0 14.0 15.0 16.0 –20.0 –50 –25 0 25 50 75 100 Supply voltage [V] Operating temperature [˚C] Input bias current vs. Supply voltage 5.0 Ta = 25˚C, RIDRV = 220kΩ, VIN = VCC – 5V Input bias current vs. Operating temperature 5.0 VCC = 15V, RIDRV = 220kΩ, VIN = VCC – 5V 0 Input bias current [µA] Input bias current [µA] 0 –5.0 –5.0 –10.0 –10.0 –15.0 10.0 11.0 12.0 13.0 14.0 15.0 16.0 –15.0 –50 –25 0 25 50 75 100 Supply voltage [V] Operating temperature [˚C] Sink current vs. Supply voltage 3.5 Ta = 25˚C, RIDRV, RISF = 220kΩ, VIN = VCC – 5V 3.2 3.0 Sync current [mA] Sync current [mA] Sink current vs. Operating temperature 3.4 VCC = 15V, RIDRV, RISF = 220kΩ, VIN = VCC – 5V 3.0 2.5 2.8 2.0 2.6 1.5 10.0 2.4 11.0 12.0 13.0 14.0 15.0 16.0 –50 –25 0 25 50 75 100 Supply voltage [V] Operating temperature [˚C] -8- CXA3691AEN Tr and Tf vs. Supply voltage 6.0 4.0 3.5 3.0 4.0 Tr and Tf [ns] Tr and Tf [ns] Tr and Tf vs. Operating temperature 5.0 Tf Tr Tf Tr 3.0 2.5 2.0 1.5 1.0 0.5 0 –50 VCC = 15V, RIDRV = 220kΩ, CL = 20pF, RL = 15Ω, Input DC offset = VCC – 5V, Input amplitude = 1.0V, Input rise, fall time = 2.0ns –25 0 25 50 75 100 2.0 1.0 Ta = 25˚C, RIDRV = 220kΩ, CL = 20pF, RL = 15Ω, Input DC offset = VCC – 5V, Input amplitude = 1.0V, Input rise, fall time = 2.0ns 11.0 12.0 13.0 14.0 15.0 16.0 0 10.0 Supply voltage [V] Operating temperature [˚C] I/O delay time vs. Supply voltage 2.00 1.75 1.50 I/O delay time [ns] I/O delay time vs. Operating temperature 2.00 1.75 1.50 I/O delay time [ns] VCC = 15V, RIDRV = 220kΩ, CL = 20pF, RL = 15Ω, Input DC offset = VCC – 5V, Input amplitude = 1.0V, Input rise, fall time = 2.0ns 1.25 1.00 0.75 0.50 0.25 0 10.0 Ta = 25˚C, RIDRV = 220kΩ, CL = 20pF, RL = 15Ω, Input DC offset = VCC – 5V, Input amplitude = 1.0V, Input rise, fall time = 2.0ns 11.0 12.0 13.0 14.0 15.0 16.0 1.25 1.00 0.75 0.50 0.25 0 –50 –25 0 25 50 75 100 Supply voltage [V] Operating temperature [˚C] Positive pulse response 0.2V/div 0.2V/div Negative pulse response VCC = 15V, RIDRV = 220kΩ, CL = 20pF, RL = 15Ω Input rise, fall time = 2.0ns T Input T 10.0V T Output 10.0V Output T Input VCC = 15V, RIDRV = 220kΩ, CL = 20pF, RL = 15Ω Input rise, fall time = 2.0ns Ch1 200mVΩ Ch2 200mVΩ M 1.00ns Ch1 10.0V Ch1 200mVΩ Ch2 200mVΩ M 1.00ns Ch1 10.0V 1.0ns/div 1.0ns/div -9- CXA3691AEN Application Circuit 1 (when using CCD with open source output ) 220kΩ ISF 6 VCC 5 220kΩ 1000pF 0.1µF IDRV 4 1 IN 2 GND 3 OUT 15V GND CCD CDS/ADC Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. - 10 - CXA3691AEN Application Circuit 2 (when using CCD with internal current source) 220kΩ 1000pF ISF 6 VCC 5 0.1µF IDRV 4 1 IN 2 GND 3 OUT 15V GND CCD CDS/ADC Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. - 11 - CXA3691AEN Notes on Operation Provide the widest GND pattern possible on the board. Use a 1000pF (recommended) and a 0.1μF (recommended) ceramic capacitors in parallel for the bypass capacitor connected between the power supply and GND, and connect them as close to the IC pins as possible. Load capacitance causes the input/output wiring response to worsen and results in noise. Use the shortest wiring layout possible, and shield it with GND. When the output pin (Pin 3) is shorted to either the power supply or GND, an overcurrent may flow to the output stage elements and damage them. When the input pin (Pin 1) is shorted to GND, an overcurrent may flow to the internal parasitic elements and damage them. - 12 - CXA3691AEN Package Outline (Unit: mm) 4x 0.1 S A B 2.0 1.3 ± 0.1 0.65 0.65 6 5 A 4 0.75 ± 0.05 0.2 ± 0.1 6PIN WSON + 0.10 0.13 − 0.03 PIN 1 INDEX 1.7 0.1 S B 2.1 B 2x φ0.07 M S A B 1 2 X 3 0.2 ± 0.1 S 0.3 ± 0.1 0.08 S + 0.1 0.2 − 0.05 (0.2) (0.11) 5-18µm DETAIL X 0.1 ± 0.03 0.1 ± 0.03 + 0.1 6 - 0.20 − 0.05 0.3 ± 0.1 PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN TERMINAL TREATMENT Sn-Bi TERMINAL MATERIAL PACKAGE MASS COPPER 0.008g SONY CODE EIAJ CODE JEDEC CODE WSON-6P-051 LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% - 13 - Sony Corporation + 0.1 0.13 − 0.03