CXD1250N

CXD1250M/N Vertical Clock Driver for CCD Image sensor Description CXD1250M/N is a clock driver developed for the vertical register drive of CCD Image sensor. Features 4-channel vertical clock driver and 1 channel substrate driver are built-in. Application CCD camera Structure CMOS Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VDD VM VH VHH • Input volltage VI • Output voltage MVφ (pins 13, 17) • Output voltage HVφ (pins 14, 16) • Output voltage HHVφ (pin 19) • Operating temperature Topr • Storage temperature Tstg Recommended Operating Conditions • Supply voltage VDD VM VH VHH VL • Operating temperature Topr CXD1250M 20 pin SOP (Plastic) CXD1250N 20 pin SSOP (Plastic) VL – 0.3 to VL + 35.0 VL – 0.3 to VL + 35.0 VL – 0.3 to VL + 35.0 VL – 0.3 to VL + 35.0 VL – 0.3 to VDD + 0.3 VL – 0.3 to VM + 0.3 VL – 0.3 to VH + 0.3 VL – 0.3 to VHH + 0.3 –25 to +85 –40 to +125 V V V V V V V V °C °C 5.0 ± 0.5 VL + 10.0 VL + 25.0 VL + 30.0 –10.0 –20 to +75 V V V V V °C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– 80639C43-PK CXD1250M/N Block Diagram and Pin Configuration (Top View) VHH (20V) VL (–10V) VH (15V) VM (0V) Vsub Vφ1 Vφ2 Vφ3 20 19 18 Vφ4 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 XSG1 Xsub XV2 XSG2 GND XV1 XV3 Pin Description No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol GND Xsub XV2 XV1 XSG1 XV3 XSG2 XV4 VDD NC NC VH Vφ4 Vφ3 VM Vφ1 Vφ2 VL Vsub VHH I/O — I I I I I I I — — — — O O — O O — O — Power supply (15V) Output (2 level : VM, VL) Output (3 level : VH, VM, VL) Power supply (0V) Output (3 level : VH, VM, VL) Output (2 level : VM, VL) Power supply (–10V) Output (2 level : VHH, VL) Power supply (20V) –2– GND Output control (Vsub) Output control (Vφ2) Output control (Vφ1) Output control (Vφ1) Output control (Vφ3) Output control (Vφ3) Output control (Vφ4) Power supply (5V) Description VDD (5V) XV4 N.C N.C CXD1250M/N Truth Table Input XV1 · 3 L H X X X X L H XSG1 · 2 H H X X X X L L XV2 · 4 X X L H X X X X Xsub X X X X L H X X Vφ1 · 3 VM VL X X X X VH Z Output Vφ2 · 4 X X VM VL X X X X Vsub X X X X VHH VL X X X : Don't care Z : High impedance DC Characteristics (Ta = 25°C) Item "H" level input voltage "L" level input voltage "L" level output voltage "M" level output voltage "M" level output voltage "H" level output voltage "HH" level output voltage Input current Power supply current ∗ Power supply current ∗ Power supply current ∗ Power supply current ∗ Symbol VIH VIL VφL VφM VφM VφH VφHH Ii IM IDD IH IHH IφL = 20µA IφM = –20µA IφM = 20µA IφH = –20µA IφHH = –20µA VDD = 5V VL = –10V VM = 0V VH = 15V VHH = 20V Test condition Power supply Min. 3.5 — — — –0.1 14.9 19.9 — — — — — Typ. — — –10 0.0 0.0 15 20 1.0 4.5 0.3 0.1 0.05 Max. — 1.5 –9.9 0.1 — — — — 5.0 0.5 0.2 0.1 Unit V V V V V V V µA mA mA mA mA ∗ Suuply current at operation (See the Test Circuit) –3– CXD1250M/N Switching Characteristics (See the Test Circuit Ta = 25°C, VHH = 20V, VH = 15V, VM = 0V, VL = –10V, VDD = 5V) Item Output current Output current Output current Output current Output current Output current Rise time VL → VM Fall time VM → VL Rise time VM → VH Fall time VH → VM Rise time VL → VHH Fall time VHH → VL Coupling amplitude (middle level) Coupling amplitude (low level) Symbol IL IM1 IM2 IH ISL ISH TTLM TTML TTMH TTHM TTLHH TTHHL VCOM VCOL Conditions Vφ1 to 4 = –9.5V Vφ1 to 4 = –0.5V Vφ1, 3 = 0.5V Vφ1, 3 = 14.5V Vsub = –9.5V Vsub = –19.5V Vφ1 to 4 = –0.5V Vφ1 to 4 = –9.5V Vφ1, 3 = 14V Vφ1, 3 = 1V Vsub = 17V Vsub = –7V Vφ1 to 4 Vφ1 to 4 After input transient After input transient After input transient After input transient After input transient After input transient 1000 500 1000 1000 200 200 0.5 0.5 –12 7 –9 12 Max. –25 10 Min. Unit mA mA mA mA mA mA ns ns ns ns ns ns V V Input Waveform (Repeat Cycle 15.7kHz) XV1 XV2 XV3 XV4 5 0 5 0 5 0 5 0 600ns TTML TTLM Output Waveform Vφ1 0 –10 0 Vφ2 –10 0 Vφ3 –10 0 Vφ4 –10 VCOL VCOM –4– CXD1250M/N Switching Waveform Input Waveform 16.6ms 5 XV1 0 5 XV3 0 5 XSG1 0 5 XSG2 0 TTMH TTHM Output Waveform 15 Vφ1 0 –10 5 15 Vφ3 0 –10 Xsub 0 TTLHH 20 Vsub –10 TTHHL 0 Vφ2 –10 Test Circuit R1 C1 C2 R1 R1; 27Ω R2; 5Ω C1; 1500pF C2; 3300pF C1 C2 C2 C2 C1 R2 C1 500pF R1 R1 20V 20 19 –10V 18 17 16 0V 15 14 13 12 11 15V 1 2 3 4 5 6 7 8 9 10 5V Timing generator (CXD1156Q) –5– CXD1250M/N Application Circuit ICX026/027 +15V 11 12 Vφ4 Vφ3 1 2 13 14 15 Vφ1 6 Vφ2 3 –10V 1µ/35 sub 4 +20V 4.7µ/ 37 270k Refer to the Caution : Rise in power supply 56k 15k 1M 47k 15k 39k 27k 0.1µ 19 20 0.1µ Vsub VHH Vsub GND 2 1 21 Xsub 16 17 18 NC VH Vφ4 Vφ3 VM Vφ1 Vφ2 VL NC 10 VDD XV4 XSG2 XV3 XSG1 XV1 XV2 9 8 7 6 5 4 3 +5V 4 XV4 CXD1250M/N CXD1156Q 10 VSG2 8 XV3 11 VSG1 9 5 XV1 XV2 Note: The capacitor more than 0.1µF should be connected between the ground and each pin of VDD, VH, VHH and VL . Caution : Rise in Power Supply When the substrate driver is in use, be careful not to let the CCD imagesensors Sub (pin 4) turn into negative voltage. To this end, raise VL and VHH at the application circuit under the following conditions. VHH (20V) t1 20% 0V 20% VL (–10V) t2 t2 ≥ t1 ≥ 10msec –6– CXD1250M/N Package Outline CXD1250M Unit: mm 20PIN SOP (PLASTIC) 300mil + 0.4 12.45 – 0.1 20 11 + 0.4 1.85 – 0.15 0.15 + 0.3 5.3 – 0.1 7.9 ± 0.4 + 0.2 0.1 – 0.05 0.45 ± 0.1 1.27 + 0.1 0.2 – 0.05 ± 0.12 M PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SOP-20P-L01 ∗SOP020-P-0300-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY / PHENOL RESIN SOLDER PLATING COPPER ALLOY 0.3g CXD1250N 20PIN SSOP (PLASTIC) ∗6.5 ± 0.1 + 0.2 1.25 – 0.1 0.1 20 11 A ∗4.4 ± 0.1 1 + 0.1 0.22 – 0.05 10 0.65 ± 0.12 + 0.05 0.15 – 0.02 0.1 ± 0.1 0° to 10° DETAIL A NOTE: Dimension “∗” does not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-20P-L01 SSOP020-P-0044 LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER / PALLADIUM PLATING COPPER / 42 ALLOY 0.1g –7– 0.5 ± 0.2 6.4 ± 0.2 0.5 ± 0.2 1 10 6.9