CXD2304R

CXD2304R 8-bit 20 MSPS RGB 3-Channel D/A Converter Description The CXD2304R is an 8-bit high-speed D/A converter for video band use. It has an input/output equivalent to 3 channels of R, G and B. It is suitable for use of digital TV, graphic display, and others. Features • Resolution 8-bit • Maximum conversion speed 20 MSPS • RGB 3-channel input/output • Differential linearity error ±0.5 LSB • Low power consumption 50 mW (330 Ω load at 1.2 Vp-p output) • Single 3.3 V power supply • Low glitch noise • Stand-by function Structure Silicon gate CMOS IC 48 pin LQFP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage AVDD, DVDD 7 V • Input voltage (All pins) VIN VDD+0.5 to VSS–0.5 V • Output current (Every each channel) IOUT 0 to 15 mA • Storage temperature Tstg –55 to +150 °C Recommended Operating Conditions • Supply voltage AVDD, AVSS 3.0 to 3.6 V DVDD, DVSS 3.0 to 3.6 V • Reference input voltage VREF 1.2 V • Clock pulse width TPW1, TPW0 22.5 ns (min.) to 1.1 µs (max.) • Operating temperature Topr –40 to +85 °C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E94307B01 CXD2304R Block Diagram (LSB) R0 R1 R2 R3 R4 R5 R6 (MSB) R7 (LSB) G0 1 2 3 4 5 6 7 8 9 DECODER DECODER 2LSB’S CURRENT CELLS 47 DVDD 48 DVDD 36 RO LATCHES 6MSB’S CURRENT CELLS 37 RO 27 RCK CLOCK GENERATOR 2LSB’S CURRENT CELLS 43 AVDD 44 AVDD 45 AVDD 46 AVDD 38 GO G1 10 G2 11 G3 12 G4 13 G5 14 G6 15 (MSB) G7 16 (LSB) B0 17 B1 18 B2 19 DECODER DECODER LATCHES 6MSB’S CURRENT CELLS 39 GO 28 GCK CLOCK GENERATOR 2LSB’S CURRENT CELLS 33 AVSS 30 DVSS 31 DVSS 40 BO B3 20 B4 21 B5 22 B6 23 (MSB) B7 24 DECODER CLOCK GENERATOR DECODER LATCHES 6MSB’S CURRENT CELLS 41 BO 29 BCK 42 VG 34 VREF BLK 25 CE 26 CURRENT CELLS (FOR FULL SCALE) BIAS VOLTAGE GENERATOR 35 IREF 32 VB —2— CXD2304R DVSS AVSS DVSS VREF GCK Pin Configuration RO IREF BCK RCK 36 RO 37 GO 38 GO 39 BO BO VG AVDD AVDD AVDD AVDD DVDD DVDD 40 41 42 43 44 45 46 47 48 35 34 33 32 31 30 29 28 27 26 25 24 B7 23 B6 22 B5 21 B4 20 B3 19 B2 18 B1 17 B0 16 G7 15 G6 14 G5 13 G4 1 R0 2 R1 3 R2 4 R3 5 R4 6 R5 7 R6 8 R7 9 G0 10 11 12 G1 G2 Pin Description and I/O Pins Equivalent Circuit Pin No. 1 to 8 Symbol R0 to R7 1 I/O Equivalent circuit G3 BLK VB CE Description DVDD 9 to 16 G0 to G7 I to 24 DVSS Digital input R0 (LSB) to R7 (MSB) G0 (LSB) to G7 (MSB) B0 (LSB) to B7 (MSB) 17 to 24 B0 to B7 DVDD 25 BLK I 25 DVSS Blanking input. This is synchronized with the clock input signal for each channel. No signal at “H” (Output 0 V). Output condition at “L”. DVDD DVDD 32 VB O 32 Connect a capacitor of about 0.1 µF. DVSS —3— CXD2304R Pin No. 27 Symbol RCK I/O Equivalent circuit Description DVDD 27 28 GCK I 28 29 DVSS Clock input. 29 30, 31 33 BCK DVSS AVSS — — Digital GND Analog GND DVDD 26 CE I 26 DVSS Chip enable input. This is not synchronized with the clock input signal. No signal (Output 0 V) at “H” and minimizes power consumption. 35 IREF O Reference current output. Connect a resistance 16 times “RIR” that of output resistance value “ROUT”. AVDD AVDD 35 AVDD AVSS 34 VREF I 34 AVDD Reference voltage output. Set full scale output value. AVSS 42 AVSS 42 VG O Connect a capacitor of about 0.1 µF. 43 to 46 AVDD — —4— Analog VDD CXD2304R Pin No. 37 Symbol RO I/O Equivalent circuit Description AVDD 39 GO 37 39 Current output. Voltage output can be obtained by connecting a resistance. 41 BO O 41 AVSS AVDD 36 38 40 36 RO 38 GO AVSS Inverted current output. Normally dropped to analog GND. 40 47, 48 BO DVDD — Digital VDD —5— CXD2304R Electrical Characteristics Item Resolution Conversion speed Integral non-linearity error Differential non-linearity error Output full-scale voltage Output full-scale ratio ∗1 Output full-scale current Output offset voltage Glitch energy Crosstalk Supply current Analog input resistance Input capacitance Digital input voltage Digital input current Setup time Hold time Propagation delay time CE enable time ∗2 CE disable time ∗2 (FCLK=20 MHz, AVDD=DVDD=3.3 V, ROUT=330 Ω, VREF=1.2 V, RIR=5.1 kΩ, Ta=25 °C) Symbol n FCLK EL ED VFS FSR IFS VOS GE CT IDD ISTB RIN CI VIH VIL IIH IIL ts th tPD tE tD Measurement conditions AVDD=DVDD=3.0 to 3.6 V Ta=–40 to 85 °C Endpoint Min. Typ. 8 Max. Unit bit MSPS LSB LSB V % mA mV pV•s dB mA MΩ pF V µA ns ns ns ms ms 0.5 –2.5 –0.5 1.12 0 20 2.5 0.5 1.36 3.0 1 150 53 15 1.24 1.5 3.8 When “00000000” data input When 1 kHz sine wave input When 14.3 MHz color CE= “L” bar data input CE= “H” VREF AVDD=DVDD=3.0 to 3.6 V Ta=–20 to +75 °C AVDD=DVDD=3.0 to 3.6 V Ta=–20 to +75 °C 18 1.2 9 1 2.5 0.5 –5 7 3 5 CE=H→L CE=L→H 20 4 4 8 8 ∗1 ∗2 Full-scale voltage of channel –1 Average of the full-scale voltage of the channels When the external capacitors for the VG pins are 0.1 µF. Full-scale output ratio = × 100 (%) —6— CXD2304R Electrical Characteristics Measurement Circuit Analog Input Resistance Measurement Circuit Digital Input Current } +3.6V AVDD, DVDD A CXD2304R V AVSS, DVSS Maximum Conversion Velocity Measurement Circuit R0 to R7 1 to 8 8bit COUNTER with LATCH G0 to G7 17 to 24 B0 to B7 17 to 24 25 BLK 0.1µ 26 CE 32 VB RO 37 330 GO 39 330 BO 41 330 AVSS AVDD VG 42 VREF 34 IREF 35 5.1k AVSS 0.1µ 1k AVSS AVSS OSCILLOSCOPE DVSS CLK 20MHz SQUARE WAVE 27 RCK 28 GCK 29 BCK —7— CXD2304R Setup Time Hold Time Glitch Energy } Measurement Circuit R0 to R7 1 to 8 8bit COUNTER with LATCH G0 to G7 9 to 16 B0 to B7 17 to 24 25 BLK DELAY CONTROLLER CLK 1MHz SQUARE WAVE 0.1µ 26 CE 32 VB RO 37 330 AVSS 330 AVSS 330 AVSS AVDD VG 42 VREF 34 IREF 35 5.1k AVSS 0.1µ 1k GO 39 BO 41 OSCILLOSCOPE DVSS 27 RCK DELAY CONTROLLER 28 GCK 29 BCK Crosstalk Measurement Circuit R0 to R7 1 to 8 DIGITAL WAVEFORM GENERATOR ALL “1” G0 to G7 9 to 16 B0 to B7 17 to 24 25 BLK 0.1µ 26 CE 32 VB RO 37 330 GO 39 330 BO 41 330 AVSS AVDD VG 42 VREF 34 IREF 35 5.1k AVSS 0.1µ 1k AVSS AVSS SPECTRUM ANALYZER DVSS CLK 20MHz SQUARE WAVE 27 RCK 28 GCK 29 BCK —8— CXD2304R DC Characteristics Measurement Circuit R0 to R7 1 to 8 CONTROLLER G0 to G7 9 to 16 B0 to B7 17 to 24 25 BLK 0.1µ 26 CE 32 VB VG 42 DVSS CLK 20MHz SQUARE WAVE 27 RCK 28 GCK 29 BCK VREF 34 IREF 35 5.1k AVSS 0.1µ 1k AVDD RO 37 330 GO 39 330 BO 41 330 AVSS AVSS AVSS DVM Propagation Delay Time Measurement Circuit R0 to R7 1 to 8 FREQUENCY DEMULTIPLIER G0 to G7 9 to 16 B0 to B7 17 to 24 25 BLK 0.1µ 26 CE 32 VB VG 42 DVSS CLK 1MHz SQUARE WAVE 27 RCK 28 GCK 29 BCK VREF 34 IREF 35 5.1k AVSS 0.1µ 1k AVDD RO 37 330 GO 39 330 BO 41 330 AVSS AVSS AVSS OSCILLOSCOPE SNR Measurement Circuit ALL “1” R0 to R7 1 to 8 DIGITAL WAVEFORM GENERATOR G0 to G7 9 to 16 ALL “1” B0 to B7 17 to 24 25 BLK 0.1µ 26 CE 32 VB VG 42 DVSS CLK 20MHz SQUARE WAVE 27 RCK 28 GCK 29 BCK VREF 34 IREF 35 5.1k AVSS 0.1µ 1k AVDD RO 37 330 GO 39 330 BO 41 330 AVSS AVSS AVSS SPECTRUM ANALYZER SNR : Different between primary —9— component and secondary distortion CXD2304R Description of Operation Timing Chart CLK tPW1 tPW0 1.5V ts th ts th ts th DATA tPD 100% D/A OUT tPD tPD 50% 0% I/O Chart (when full scale output voltage at 1.2 V) Input code MSB LSB 11111111 : 10000000 : 00000000 Application Circuit Output voltage 1.2 V 0.6 V 0V B (Blue) OUT 330 AVSS G (Green) OUT 330 DVDD AVDD 0.1µ 330 48 47 46 45 44 43 42 41 40 39 38 37 AVSS (LSB) • • R (Red) IN • • • (MSB) (LSB) • • AVSS R (Red) OUT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 • • 36 35 34 33 32 31 30 (BCK) 29 (GCK) 28 (RCK) 27 26 25 DVSS DVSS CLOCK IN 1.2V AVDD 1k AVSS AVSS 0.1µF 5.1k (MSB) • • • • • • G (Green) IN B (Blue) IN Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —10— (MSB) (LSB) CXD2304R Notes on Operation • How to select the output resistance The CXD2304R is a D/A converter of the current output type. To obtain the output voltage connect the resistance to the current output pins R0, G0 and B0. For specifications we have; Output full scale voltage VFS=1.12 to 1.36 [V] Output full scale current IFS=3.8 [mA] (typ.) Calculate the output resistance value from the relation of VFS=IFS × ROUT. Also, 16 times resistance of the output resistance ROUT is connected to reference current pin IREF. In some cases, however, this turns out to be a value that does not actually exist. In such a case a value close to it can be used as a substitute. Here please note that VFS becomes VFS=VREF × 16ROUT/RIR. VREF is the voltage set at the reference voltage pin VREF and ROUT is the resistance connected to the current output pins RO, GO and BO while RIR is connected to IREF pin. Increasing the resistance value can curb power consumption. On the other hand glitch energy and data settling time will inversely increase. Set the most suitable value according to the desired application. • Phase relation between data and clock To obtain the expected performance as a D/A converter, it is necessary to set properly the phase relation between data and clock applied from the exterior. Be sure to satisfy the provisions of the setup time (tS) and hold time (tH) as stipulated in the Electrical Characteristics. • Power supply and ground To reduce noise effects separate analog and digital systems in the device periphery. For power supply pins, both digital and analog, bypass respective grounds by using a ceramic capacitor of about 0.1 µF, as close as possible to the pin. • Latch up Digital power supply and analog power supply have to be common at the PCB power supply source. This is to prevent latch up due to voltage difference between AVDD and DVDD pins when power supply is turned ON. • RO, GO and BO pins The RO, GO and BO pins are the inverted current output pins described in the Pin Description. The sums shown below become the constant value for any input data. a) The sum of the currents output form RO and RO b) The sum of the currents output form GO and GO c) The sum of the currents output form BO and BO However, the performances such as the linearity error of the inverted current output pin output current is not guaranteed. • Output full-scale voltage For the applications using the RGB signal, the color balance may be broken up when the no-adjusted output full-scale voltage is used. —11— CXD2304R Latch Up Prevention The CXD2304R is a CMOS IC which required latch up precautions. Latch up is mainly generated by the lag in the voltage rising time of AVDD (Pins 43 to 46) and DVDD (Pins 47 and 48), when power supply is ON. 1. Correct usage a. When analog and digital supplies are from different sources DVDD AVDD 43 44 45 AVDD +5V +5V C CXD2304R C DIGITAL IC 46 47 48 DVDD AVSS 33 AVSS DVSS DVSS 30 31 b. When analog and digital supplies are from a common source (i) DVDD 43 44 45 AVDD 46 47 48 DVDD +5V C CXD2304R C DIGITAL IC AVSS 33 AVSS DVSS DVSS 30 31 (ii) DVDD 43 44 45 AVDD 46 47 48 DVDD +5V C CXD2304R C DIGITAL IC AVSS 33 AVSS DVSS DVSS 30 31 —12— CXD2304R 2. Example when latch up easily occurs a. When analog and digital supplies are from different sources DVDD AVDD 43 44 45 AVDD +5V +5V C CXD2304R C DIGITAL IC 46 47 48 DVDD AVSS 33 AVSS DVSS DVSS 30 31 b. When analog and digital supplies are from common source (i) DVDD AVDD 43 44 45 AVDD +5V C CXD2304R C DIGITAL IC 46 47 48 DVDD AVSS 33 AVSS DVSS DVSS 30 31 (ii) DVDD AVDD 43 44 45 AVDD +5V CXD2304R C DIGITAL IC 46 47 48 DVDD AVSS 33 AVSS DVSS DVSS 30 31 —13— CXD2304R Example of Representative Characteristics SNR (Difference between primary and secondary) (dB) 80 80 Crosstalk CT (dB) 60 60 40 40 20 20 0 0.1M 1M Output frequency FO (Hz) Fig. 1. Crosstalk 10M 0 1M 10M Output frequency FO (Hz) Fig. 2. SNR (Difference between primary component and secondary distortion) 0.1M Output fullscale voltage VFS (V) Power supply current IDD (mA) 1.27 20 10 1.26 0 0 –25 25 75 0 50 Ambient temperature Ta (°C) Fig. 3. Ambient temperature vs. Output full scale voltage 10k 1M 100k 10M Output frequency FO (Hz) Fig. 4. Output frequency vs. Power supply current 400 200 0 600 200 400 Output resistance ROUT (Ω) Fig. 5. Output resistance vs. Glitch energy Reference measurement condition and description • AVDD=3.3 V • DVDD=3.3 V • VREF=1.2 V • RIR=5.1 kΩ (≈16 ROUT in Fig. 5 only) • Ta=25 °C (Except Fig. 3) • Fig. 1, 2 Refer to the measurement circuit. • Fig. 3 is input data=all 1 • Fig. 4 is input data=output of incremental counter. Glitch energy GE (pV•s) —14— CXD2304R Package Outline Unit : mm 48PIN LQFP (PLASTIC) 9.0 ± 0.2 ∗ 36 37 7.0 ± 0.1 25 24 S (8.0) A 48 1 0.5 + 0.08 0.18 – 0.03 + 0.2 1.5 – 0.1 12 13 B (0.22) + 0.05 0.127 – 0.02 0.13 M 0.1 0.1 ± 0.1 0.5 ± 0.2 S (0.127) +0.05 0.127 – 0.02 (0.18) 0.18 ± 0.03 0° to 10° 0.5 ± 0.2 DETAIL B:SOLDER DETAIL A DETAIL B:PALLADIUM NOTE: Dimension “∗” does not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE LQFP-48P-L01 LQFP048-P-0707 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 0.2g —15— 0.127 ± 0.04 + 0.08 0.18 – 0.03