CXD2309AQ

CXD2309AQ 10-bit 85MSPS 3-Channel D/A Converter Description The CXD2309AQ is a 10-bit high-speed D/A converter for video band, featuring RGB 3-channel input/ output. This is ideal for use in high-definition TVs and high-resolution displays. Features • Resolution 10-bit • Maximum conversion speed 85MSPS • RGB 3-channel input/output • Differential linearity error ±0.5LSB • Low power consumption 275mW (200Ω load for 2Vp-p output) • Single +5V power supply • Low glitch • 48-pin QFP package Structure Silicon gate CMOS IC 48 pin QFP (Plastic) Absolute Maximum Ratings (Ta = 25°C) 7 V • Supply voltage AVDD, DVDD • Input voltage (All pins) VIN VDD + 0.5 to VSS – 0.5 V • Output current IOUT 0 to 15 mA • Storage temperature Tstg –55 to +150 °C Recommended Operating Conditions • Supply voltage AVDD, AVSS 4.75 to 5.25 DVDD, DVSS • Reference input voltage VREF • Clock pulse width TPW1, TPW0 • Operating temperature Topr 4.75 to 5.25 1.8 to 2.0 5.2 (min.) –20 to +85 V V V ns °C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E00739B21-PS CXD2309AQ Block Diagram (LSB) R0 R1 R2 R3 R4 R5 R6 R7 R8 1 2 3 4 5 6 7 8 9 DECODER DECODER LATCHES 4LSB'S CURRENT CELLS 43 AVSS 42 RO 6LSB'S CURRENT CELLS (MSB) R9 10 RCK 31 (LSB) G0 11 G1 12 G2 13 G3 14 G4 15 G5 16 G6 17 G7 18 G8 19 (MSB) G9 20 GCK 32 (LSB) B0 21 B1 22 B2 23 B3 24 B4 25 B5 26 B6 27 B7 28 B8 29 (MSB) B9 30 BCK 33 DVDD 48 BIAS VOLTAGE GENERATOR DECODER DECODER LATCHES DECODER DECODER LATCHES CLOCK GENERATOR 4LSB'S CURRENT CELLS 45 AVSS 44 GO 6LSB'S CURRENT CELLS CLOCK GENERATOR 4LSB'S CURRENT CELLS 47 AVSS 46 BO 6LSB'S CURRENT CELLS 41 AVDD 40 AVDD 39 AVDD CLOCK GENERATOR 38 VG CURRENT CELLS (FOR FULL SCALE) 37 VREF 36 IREF VB 35 DVSS 34 –2– CXD2309AQ DVSS IREF VB B9 (MSB) Pin Configuration GCK RCK BCK B8 B7 B6 B5 36 35 34 33 32 31 30 29 28 27 26 25 VREF 37 VG 38 AVDD 39 AVDD 40 AVDD 41 RO 42 AVSS 43 GO 44 AVSS 45 BO 46 AVSS 47 DVDD 48 1 (LSB) R0 2 R1 3 R2 4 R3 5 R4 6 R5 7 R6 8 R7 9 R8 10 11 12 R9 (MSB) G0 (LSB) G1 1 to 35 , 48 Digital system 36 to 47 Analog system 24 B3 23 B2 22 B1 21 B0 (LSB) 20 G9 (MSB) 19 G8 18 G7 17 G6 16 G5 15 G4 14 G3 13 G2 Pin Description and Equivalent Circuit Pin No. Symbol I/O Equivalent circuit Description 1 to 10 R0 to R9 11 to 20 G0 to G9 DVDD B4 Digital input. Pin 1 R0 (LSB) to Pin 10 R9 (MSB) Pin 11 G0 (LSB) to Pin 20 G9 (MSB) Pin 21 B0 (LSB) to Pin 30 B9 (MSB) 21 to 30 B0 to B9 I 31 32 33 34 RCLK GCLK BCLK DVSS — DVDD DVSS 1 to 33 Clock input. Digital ground. DVDD 35 VB O 35 Connect an approximately 0.1µF capacitor. DVSS –3– CXD2309AQ Pin No. Symbol I/O Equivalent circuit Description 36 IREF O AVDD AVDD Reference current output. Connect an "RIR" resistor which are 16 times the output resistance "ROUT". 36 AVDD AVDD AVSS 37 38 AVSS AVSS 37 VREF I Reference voltage input. Sets an output full-scale value. 38 VG O Connect an approximately 0.1µF capacitor. 39 to 41 AVDD 42 RO — AVDD 42 44 Analog power supply. 44 GO O 46 AVSS Current output. Output can be obtained by connecting a resistor (200Ω typ.). 46 BO AVSS 43, 45, 47 AVSS 48 DVDD — — Analog ground. Digital power supply. –4– CXD2309AQ Electrical Characteristics (fCLK = 85MHz, AVDD = DVDD = 5V, ROUT = 200Ω, VREF = 2.0V, RIR = 3.3kΩ, Ta = 25°C) Item Resolution Conversion speed Integral non-linearity error Differential non-linearity error Symbol n fCLK AVDD = DVDD = 4.75 to 5.25V Ta = –20 to +85°C Endpoint 0 –2.0 –0.5 1.8 1.92 1.8 1.92 0 9.0 9.6 36 49 49 63 61 48 55 1 9 15 AVDD = DVDD = 4.75 to 5.25V Ta = –20 to +75°C AVDD = DVDD = 4.75 to 5.25V Ta = –20 to +75°C 2.15 0.85 –5 4 1 6 7 12 –1 × 100 [%] 5 58 Measurement conditions Min. Typ. Max. 10 85 2.0 0.5 2.0 2.0 3 10 1 Unit bit MSPS LSB LSB V V % mA mV pV·s dB dB mA MΩ pF pF V µA ns ns ns ns ns EL ED Precision guaranteed output voltage range VOC Output full-scale voltage VFS Output full-scale ratio ∗1 FSR Output full-scale current IFS Output offset voltage VOS Glitch energy GE Crosstalk S/N ratio Supply current Analog input resistance Input capacitance Output capacitance Digital input voltage Digital input current Setup time Hold time Propagation delay time Rise time Fall time ∗1 Full-scale ratio = CT SNR IDD RIN CI CO VIH VIL IIH IIL ts th tPD tr tf When "0000000000" data input ROUT = 100Ω, 1Vp-p output FCLK = 50MHz When 10MHz sin wave input FCLK = 85MHz FCLK = 50MHz When 1MHz sin wave input FCLK = 85MHz FCLK = 50MHz When 10MHz sin wave output FCLK = 85MHz VREF 40 50 Full-scale voltage of channel Average of the full-scale voltage of the channels Electrical Characteristics Measurement Circuit Analog Input Resistance Measurement Circuit Digital Input Current +5.25V AVDD, DVDD A CXD2309AQ V AVSS, DVSS –5– CXD2309AQ Conversion Rate Measurement Circuit 10bit COUNTER with LATCH R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 0.1µ DVSS CLK 50MHz SQUARE WAVE 31 RCK 32 GCK 33 BCK AVSS 47 VG 38 VREF 37 2V IREF 36 3.3k 0.1µ AVSS AVDD 35 VB AVSS 45 AVSS BO 46 200 200 AVSS OSCILLOSCOPE 200 Setup Time Hold Time Glitch Energy AVSS Measurement Circuit 10bit COUNTER with LATCH R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 0.1µ 35 VB AVSS 45 200 AVSS OSCILLOSCOPE 200 AVSS DELAY CONTROLLER CLK 50MHz SQUARE WAVE BO 46 DVSS 31 RCK 32 GCK AVSS 47 VG 38 VREF 37 2V IREF 36 3.3k AVSS 0.1µ AVSS AVDD 200 DELAY CONTROLLER 33 BCK Crosstalk Measurement Circuit DVDD DIGITAL WAVEFORM GENERATOR R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 0.1µ DVSS 31 RCK CLK 50MHz SQUARE WAVE 32 GCK 33 BCK AVSS 47 VG 38 VREF 37 2V IREF 36 3.3k AVSS 0.1µ AVSS AVDD 35 VB AVSS 45 AVSS BO 46 200 200 AVSS 200 SPECTRUM ANALYZER –6– CXD2309AQ DC Characteristics Measurement Circuit R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 0.1µ DVSS CLK 50MHz SQUARE WAVE 31 RCK 32 GCK 33 BCK AVSS 47 VG 38 VREF 37 2V IREF 36 3.3k AVSS 0.1µ AVSS AVDD 35 VB AVSS 45 AVSS BO 46 200 CONTROLLER 200 AVSS DVM 200 Propagation Delay Time Measurement Circuit 10bit COUNTER with LATCH R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 0.1µ DELAY CONTROLLER CLK 50MHz SQUARE WAVE DVSS 31 RCK 32 GCK DELAY CONTROLLER 33 BCK AVSS 47 VG 38 VREF 37 2V IREF 36 3.3k AVSS 0.1µ AVSS AVDD 35 VB AVSS 45 AVSS BO 46 200 200 AVSS OSCILLOSCOPE 200 SNR Measurement Circuit DIGITAL WAVEFORM GENERATOR ALL "1" ALL "1" 0.1µ DVSS R0 to R9 RO 42 1 to 10 G0 to G9 11 to 20 AVSS 43 B0 to B9 GO 44 21 to 30 35 VB AVSS 45 200 AVSS 200 AVSS SPECTRUM ANALYZER BO 46 200 31 RCK CLK 50MHz SQUARE WAVE 32 GCK 33 BCK AVSS 47 VG 38 VREF 37 2V IREF 36 3.3k AVSS 0.1µ AVSS AVDD –7– CXD2309AQ Description of Operation Timing Chart tPW1 tPW0 ; ;;; ;;; ; ;; ; CLK 1.5V tS th tS th tS th DATA 1.5V 100% 90% D/A OUT 50% 10% 0% tPD tr tf I/O Correspondence Table (output full-scale voltage: 2.00V) Input code MSB LSB 1111111111 : 1000000000 : 0000000000 Output voltage 2.0V 1.0V 0V –8– CXD2309AQ Notes on Operation • Selecting the Output Resistance CXD2309AQ is a current output type D/A converter. The output voltage can be obtained by connecting the reslstor ROUT to the current output pins RO, GO and BO. Specifications: Output full-scale voltage VFS = 18 to 2.0 [V] Output full-scale current IFS = 9.0 to 10.0 [mA] Calculate the output resistance from VFS = IFS × ROUT. Connect a resistance sixteen times the output resistance to the reference current output pin IREF. In some cases, as this value may not exist, a similar value can be used instead. Note that the VFS Will be the following. VFS = VREF × 16ROUT/RIR VREF is the voltage set at the reference voltage input pin VREF, ROUT is the resistor to be connected to the current output pins RO, GO, BO and RIR is the resistor to be connected to the IREF. Power consumption can be reduced by increasing the resistance, but this will on the contrary increase the glitch energy and data setting time. Set the best values according to the purpose of use. • Power supply, ground Separate the power supply and ground of the analog and digital signals around the device to reduce noise effects. Bypass the power supply pin to each ground with a 0.1µF ceramics capacitor as near as possible to the pin for both the digital and analog signals. • Latch up Analog and digital power supplies must be able to share the same power supply of the board. This is to prevent latch up caused by potential difference between the two pins when the power is turned on. See "Latch Up Prevention" on Page 11. • IREF The IREF pin is very sensitive to improve the AC characteristics. Pay attention for capacitance component not to attach to this pin because its output may become unstable. • Output full-scale voltage For the applications using the RGB signal, the color balance may be broken up when the RO, GO and BO output full-scale voltages are used with not adjustment. –9– CXD2309AQ Application Circuit C C R2 Clock input MSB 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 Gch input LSB MSB Bch input R3 37 R4 C C C 38 39 40 41 42 R1 43 44 R1 45 46 R1 47 48 1 LSB 2 3 4 5 6 7 8 9 10 MSB 11 LSB 12 Rch input AVDD AVSS DVDD DVSS • • • • • • When the power supply (AVDD and DVDD) is 5.0V. R1 = 200Ω R2 = 3.3kΩ R3 = 3.0kΩ R4 = 2.0kΩ C = 1µF Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. – 10 – CXD2309AQ Latch Up Prevention The CXD2309AQ is a CMOS IC which requires latch up precausions. Latch up is mainly generated by the lag in the voltage rising time of AVDD (Pin 39, 40 and 41) and DVDD (Pin 48), when power supply is ON. 1. Correct usage a. When analog and digital supplies are from different sources DVDD AVDD 39 40 AVDD +5V +5V C CXD2309AQ C DIGITAL IC 41 48 DVDD AVSS AVSS 43 45 47 DVSS 34 b. When analog and digital supplies are from a common source (i) DVDD 39 40 AVDD 41 48 DVDD +5V C CXD2309AQ C DIGITAL IC AVSS AVSS 43 45 47 DVSS 34 (ii) DVDD 39 40 AVDD 41 48 DVDD +5V C CXD2309AQ C DIGITAL IC AVSS AVSS 43 45 47 DVSS 34 – 11 – CXD2309AQ 2. Example when latch up easily occurs a. When analog and digital supplies are from different sources DVDD AVDD 39 40 AVDD +5V +5V C CXD2309AQ C DIGITAL IC 41 48 DVDD AVSS AVSS 43 45 47 DVSS 34 b. When analog and digital supplies are from common source (i) DVDD AVDD 39 40 AVDD +5V C CXD2309AQ C DIGITAL IC 41 48 DVDD AVSS AVSS 43 45 47 DVSS 34 (ii) DVDD AVDD 39 40 AVDD +5V CXD2309AQ C DIGITAL IC 41 48 DVDD AVSS AVSS 43 45 47 DVSS 34 – 12 – CXD2309AQ Example of Representative Characteristics 2.0 VFS – Output full-scale voltage [V] GE – Glitch energy [pV·s] 2.0 100 1.0 50 0 1.0 0 100 200 VREF – Reference voltage [V] ROUT – Output resistance [Ω] Fig. 1. Reference voltage vs. Output full-scale voltage Fig. 2. Output resistance vs. Glitch energy VFS – Output full-scale voltage [V] 1.95 IDD – Supply current [mA] 70 60 sin wave output 1.90 50 ∆V = 0.02mV/°C 40 0 –25 0 25 50 75 12 5 10 20 30 40 42 Ta – Ambient temperature [°C] Fo – Output frequency [MHz] Fig. 3. Ambient temperature vs. Output full-scale voltage Fig. 4. Output frequency vs. Supply current Standard Measurement Conditions • AVDD = DVDD = 5.0V • VREF = 2.0V • FCLK = 85MHz • ROUT = 200Ω • RIR = 3.3kΩ • Ta = 25°C – 13 – CXD2309AQ 60 50 IDD – Supply current [mA] fOUT = 1MHz sin wave 60 50 40 fOUT = 10MHz sin wave IDD 40 IA [Analog] 30 20 10 ID [Digital] IDD – Supply current [mA] IDD IA [Analog] 30 20 10 ID [Digital] 20 50 85 20 50 85 FCLK – Clock frequency [MHz] FCLK – Clock frequency [MHz] Fig. 5. Clock frequency vs. Supply current 70 Fig. 6. Clock frequency vs. Supply current 0 CT – Cross talk [dB] Output level [dBm] 42 40 sin wave output –10 20 –20 10 0 1 2 5 10 20 1 2 5 10 20 50 Fo – Output frequency [MHz] Fo – Output frequency [MHz] Fig. 7. Output frequency vs. Cross talk Fig. 8. Output frequency vs. Output level (Including primary hold characteristics sinx/x) 70 SNR [dB] 40 10 0 0.1 1 10 40 42 Fo – Output frequency [MHz] Fig. 9. Output frequency vs. SNR – 14 – Standard Measurement Conditions • AVDD = DVDD = 5.0V • VREF = 2.0V • FCLK = 85MHz • ROUT = 200Ω • RIR = 3.3kΩ • Ta = 25°C CXD2309AQ Package Outline Unit: mm 48PIN QFP (PLASTIC) 15.3 ± 0.4 + 0.4 12.0 – 0.1 36 25 + 0.1 0.15 – 0.05 0.15 37 24 48 13 + 0.2 0.1 – 0.1 0.8 + 0.15 0.3 – 0.1 0.24 M + 0.35 2.2 – 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-48P-L04 QFP048-P-1212 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.7g – 15 – 0.9 ± 0.2 1 12 13.5 Sony Corporation