CXG1082EN

CXG1082EN Receive Dual Low Noise Amplifier/Mixer For the availability of this product, please contact the sales office. Description The CXG1082EN is a receive dual low noise amplifier/ mixer MMIC. This IC is designed using the Sony’s GaAs J-FET process. Features • High conversion gain: Gp = 17dB (LNA Typ.) Gc = 11 to 12dB (MIX Typ.) • Low noise figure: NF = 1.5dB (LNA Typ.) NF = 4.2dB (MIX Typ.) • Single 3V power supply operation • Low LO input power operation PLO = –15dBm • Single CTL pin achieved by the built-in inverter circuit • 16-pin VSON package Applications 800MHz Japan digital cellular telephones (PDC) Structure GaAs J-FET MMIC 16 pin VSON (Plastic) Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VDD 4.5 V • Input power PIN +13 dBm • Current consumption IDD 15 mA • Operating temperature Topr –35 to +85 °C • Storage temperature Tstg –65 to +150 °C Recommended Operating Voltages • Supply voltage VDD 2.7 to 3.3 • Control voltage VCTL (H) 2.4 to 3.3 VCTL (L) 0 to 0.3 V V V Block Diagram Pin Configuration LNA RFIN1 9 8 LNA RFIN2 LNA RFIN1 9 8 7 6 5 4 3 2 1 LNA RFIN2 CAP LNA RFOUT/VDD1 (LNA) GND OPT MIX RFIN GND LO IN CAP 10 6 LNA RFOUT GND 11 CTL 12 GND 13 3 MIX RFIN GND 14 VDD2 (LO AMP) 15 IFOUT 16 1 LO IN IFOUT/VDD3 (MIX) 16 GaAs MMICs are ESD sensitive devices. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E00408-PS CXG1082EN Electrical Characteristics Conditions: VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF1 = 870MHz, fRF2 = 820MHz, fLO = fRF – 130MHz, PLO = –15dBm, Ta = 25°C, unless otherwise specified Low Noise Amplifier Block Item Current consumption Control current Symbol IDD Path — RF frequency VCTL — — — — fRF1 H L H L H L H L H L H L H L Min. — — — –1 15 — — 15 — — –13 –13 17 18 Typ. 1.9 1.9 55 0 17 –20 –25 17 1.5 1.5 –9 –9 22 23 Max. 2.5 2.5 80 — 19 –15 –20 19 2.0 2.0 — — — — dB ∗1 When a small signal dB When a small signal Unit mA When no signal µA Measurement condition ICTL — RFIN1 → RFOUT Power gain Gp RFIN2 → RFOUT RFIN1 → RFOUT RFIN2 → RFOUT RFIN1 → RFOUT RFIN2 → RFOUT RFOUT → RFIN1 RFOUT → RFIN2 fRF2 fRF1 fRF2 fRF1 fRF2 fRF1 fRF2 Noise figure NF Input IP3 IIP3 dBm Isolation Iso dBm Mixer Block Item Current consumption Power gain Symbol IDD Gc RF frequency — fRF1 fRF2 fRF1 fRF2 fRF1 fRF2 fRF1 fRF2 Min. — 10 9 — — –4.0 –3.5 — — Typ. 4.5 12 11 4.2 4.2 –1.0 –0.5 –31 –31 Max. 6.0 14 13 6.0 6.0 — — –26 –26 Unit mA dB When a small signal dB ∗1 fLO = 740MHz fLO = 690MHz Measurement condition When no signal Noise figure NF Input IP3 IIP3 dBm LO to RF leak level Plk dBm The values shown above are the specified values on the Sony’s recommended evaluation board. (When no option pin resistor is added.) ∗1 Conversion from the IM3 suppression ratio for two-wave input: PRF = –30dBm (low noise amplifier block)/ –25dBm (mixer block) at fRFoffset = 100kHz. –2– CXG1082EN Recommended Evaluation Circuit LNA RFIN1 50Ω L5 L6 L4 9 C6 10 11 7 C9 6 5 8 L13 L14 L15 LNA RFIN2 50Ω LNA RFOUT 50Ω L11 C8 L12 CTL 12 13 L3 4 R1 3 L8 2 1 L7 L10 C7 L9 VDD1 (LNA) MIX RFIN 50Ω LOIN 50Ω VDD2 (LO AMP) C5 IFOUT 50Ω VDD3 (MIX) C3 C4 14 15 C2 L2 L1 C1 16 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 150nH 120nH 33nH 18nH 6.8nH 27nH 33nH 27nH 5.6nH 12nH L11 L12 L13 L14 L15 C1 C2 C3 C4 C5 18nH 10nH 22nH 5.6nH 22nH 6pF 1000pF 1000pF 100pF 1000pF C6 C7 C8 C9 R1 18pF 1000pF 100pF 56pF –3– CXG1082EN Example of Representative Characteristics (Ta = 25°C) Low Noise Amplifier Block Path RFIN1 → RFOUT Gp, NF vs. fRF 18 17.5 17 Gp – Power gain [dB] 16.5 16 15.5 15 NF 14.5 14 800 1 900 14.5 14 800 1.5 2 VDD = 3V VCTL = 3V Gp 3 18 17.5 2.5 17 Gp – Power gain [dB] Path RFIN2 → RFOUT Gp, NF vs. fRF 3 VDD = 3V VCTL = 0V 2.5 Gp 16.5 16 15.5 15 NF 1 900 1.5 2 NF – Noise figure [dB] 820 840 860 880 820 840 860 880 fRF – RF frequency [MHz] fRF – RF frequency [MHz] Path RFIN1 → RFOUT POUT, IM3 vs. PIN 20 10 0 POUT – RF output power [dBm] –10 –20 –30 –40 –50 IM3 –60 –70 –80 –90 –40 –30 –20 –10 0 10 VDD = 3V VCTL = 3V fRF1 = 870MHz fRF2 = 870.1MHz POUT POUT – RF output power [dBm] 20 10 0 –10 –20 –30 –40 –50 Path RFIN2 → RFOUT POUT, IM3 vs. PIN POUT IM3 –60 –70 –80 –90 –40 –30 –20 –10 0 10 VDD = 3V VCTL = 0V fRF1 = 820MHz fRF2 = 820.1MHz PIN – RF input power[dBm] PIN – RF input power[dBm] –4– NF – Noise figure [dB] CXG1082EN Mixer Block Gc, NF vs. fRF 15 14 Gc – Conversion gain [dB] 13 12 11 10 NF 9 8 7 6 5 800 820 840 860 880 4 3.5 3 2.5 2 900 Gc VDD = 3V fLO = fRF – 130MHz PLO = –15dBm 7 6.5 6 5.5 5 4.5 NF – Noise figure [dB] fRF – RF frequency [MHz] Gc, NF vs. PLO 15 14 Gc – Conversion gain [dB] 13 12 11 10 9 8 7 6 5 –25 –20 –15 –10 –5 0 NF VDD = 3V fRF1 = 870MHz fRF2 = 870.1MHz fLO = 740MHz Gc 5.5 5.3 Gc – Conversion gain [dB] 5.1 NF – Noise figure [dB] 4.9 4.7 4.5 4.3 4.1 3.9 3.7 3.5 PLO – LO input power [dBm] 15 14 13 12 11 10 9 8 Gc, NF vs. PLO 5.5 VDD = 3V fRF1 = 820MHz fRF2 = 820.1MHz fLO = 690MHz Gc 5.3 5.1 4.9 4.7 4.5 4.3 4.1 NF 7 6 5 –25 –20 –15 –10 –5 0 3.9 3.7 3.5 PLO – LO input power [dBm] NF – Noise figure [dB] –5– CXG1082EN IIP3, PLK vs. PLO 1 0.5 0 IIP3 – Input IP3 [dBm] –0.5 –1 –1.5 PLK –2 –2.5 –3 –3.5 –4 –25 –20 –15 VDD = 3V fRF1 = 870MHz fRF2 = 870.1MHz fLO = 740MHz –10 –5 0 –31 –32 –33 –34 –35 IIP3 –25 –26 PLK – LO leak power [dBm] –27 –28 –29 –30 1 0.5 0 IIP3 – Input IP3 [dBm] IIP3, PLK vs. PLO –25 –26 IIP3 –0.5 –1 –1.5 –2 –2.5 –3 –3.5 –4 –25 –20 –15 PLK VDD = 3V fRF1 = 820MHz fRF2 = 820.1MHz fLO = 690MHz –10 –5 0 –28 –29 –30 –31 –32 –33 –34 –35 PLO – LO input power [dBm] PLK – LO leak power [dBm] –27 PLO – LO input power [dBm] POUT, IM3 vs. PIN 20 10 0 POUT – IF output power [dBm] –10 –20 –30 –40 IM3 –50 –60 –70 –80 –40 –30 –20 –10 0 10 VDD = 3V fRF1 = 870MHz fRF2 = 870.1MHz fLO = 740MHz PLO = –15dBm PIN – RF input power [dBm] POUT POUT – IF output power, IM3 [dBm] 20 10 0 POUT, IM3 vs. PIN POUT –10 –20 –30 –40 –50 –60 –70 –80 –40 –30 –20 –10 0 10 VDD = 3V fRF1 = 820MHz fRF2 = 820.1MHz fLO = 690MHz PLO = –15dBm PIN – RF input power [dBm] IM3 –6– CXG1082EN Example of Characteristics for Option Resistance R1 Changed (Ta = 25°C) Mixer Block IDD3 (MIX) vs. R1 10 VDD = 3V IDD3 – Mixer block current consumption (MIX) [mA] 8 6 4 2 OPEN 1200 680 470 390 330 270 220 R1 – Option resistance [Ω] Gc, NF vs. R1 14 Gc – Conversion gain, NR-Noise figure [dB] GC 12 Gc – Conversion gain, NF-Noise figure [dB] 14 Gc, NF vs. R1 12 GC 10 VDD = 3V fRF = 870MHz fLO = 740MHz PLO = –15dBm 10 VDD = 3V fRF = 820MHz fLO = 690MHz PLO = –15dBm 8 8 6 NF 4 2 OPEN 1200 6 NF 4 2 OPEN 1200 680 470 390 330 270 220 680 470 390 330 270 220 R1 – Option resistance [Ω] R1 – Option resistance [Ω] IIP3, PLK vs. R1 3 VDD = 3V fRF = 870MHz fLO = 740MHz PLO = –15dBm –27 3 IIP3, PLK vs. R1 –27 VDD = 3V fRF = 820MHz fLO = 690MHz PLO = –15dBm IIP3 PLK – LO leak power [dBm] –28 IIP3 PLK – LO leak power [dBm] 2 IIP3 – Input IP3 [dBm] –28 2 IIP3 – Input IP3 [dBm] 1 PLK 0 –29 1 –29 –30 0 –30 PLK –31 –1 –31 –1 –2 OPEN 1200 680 470 390 330 270 –32 220 –2 OPEN 1200 680 470 390 330 270 –32 220 R1 – Option resistance [Ω] –7– R1 – Option resistance [Ω] CXG1082EN Recommended Evaluation Board Front 50mm LNA RFIN1 LNA RFIN2 50mm IFOUT LNA RFOUT LO IN MIX RFIN CTL VDD2 GND VDD3 VDD1 Glass fabric-base 4-layer epoxy board (thickness: 0.2mm × 2) GND for the whole 2nd and 3rd layers Enlarged Diagram of Center Part L5 L15 L6 L4 C6 L14 L13 C9 C8 L12 L11 C5 C4 L3 C7 L8 C1 L1 L7 L10 L9 L2 C2 C3 –8– CXG1082EN Package Outline Unit: mm 16PIN VSON(PLASTIC) 0.9 MAX 0.6 3.5 A S 0.05 S 0.35 ± 0.1 2.5 B 0.4 1.4 4x 0.2 S A B 2x 0.2 S B 0.35 ± 0.1 Soldrer Plating 0.13 ± 0.025 + 0.09 0.14 – 0.03 NOTE: 1) The dimensions of the terminal section apply to the ranges of 0.1mm and 0.25mm from the end of a terminal. TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE VSON-16P-01 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.02 g –9– 0.03 ± 0.03 0.2 ± 0.01 0.23 ± 0.02 0.05 M S A-B 0.5 ± 0.2 2.7 Sony Corporation