CXG1192UR

CXG1192UR SP3T × 2 Antenna Switch for GSM Quad-Band Description The CXG1192UR is a high power SP3T × 2 antenna switch for GSM/GPRS Quad-band applications. The low insertion loss on transmit means increased talk time as the Tx power amplifier can be operated at a lower output level. On chip logic reduces component count and simplifies PCB layout by allowing direct connection of the switch to digital baseband control lines with CMOS logic levels. This switch is SP3T × 2, each antenna can be routed to either of the 1Tx or 2Rx ports. It requires 3 CMOS control lines. The Sony GaAs JPHEMT MMIC Process is used for low insertion loss. Features • Insertion loss (Tx) 0.25dB typical at 34dBm (GSM900) 0.35dB typical at 32dBm (GSM1800) • 3 CMOS compatible control lines • Small package size: 18-pin UQFN (2.5mm × 3.5mm × 0.6mm (Max.)) Applications Quad-band handsets using combinations of GSM850/900/1800/1900 Structure GaAs JPHEMT MMIC Absolute Maximum Ratings • Bias voltage VDD • Control voltage Vctl • Input power max. (Tx1) • Input power max. (Tx2) • Input power max. (all_Rx) • Operating temperature Topr • Storage temperature Tstg 18 pin UQFN (Plastic) 7V (Ta = 25°C) 5V (Ta = 25°C) 37dBm (Ta = 25°C) 35dBm (Ta = 25°C) 13dBm (Ta = 25°C) –30 to +85 °C –65 to +150 °C GaAs MMICs are ESD sensitive devices. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E04322-PS CXG1192UR Block Diagram Ant1 F2 F4 Rx1 Tx1 F1 F3 F5 Rx2 Ant2 F7 F9 Rx3 Tx2 F6 F8 F10 Rx4 Pin Configuration CTLC CTLB CTLA 9 VDD 10 GND 11 Ant2 12 NC 13 Tx2 14 NC 15 16 Tx1 8 7 6 GND 5 Rx4 4 Rx3 3 Rx2 2 Rx1 1 NC 17 GND 18 Ant1 Truth Table Path ANT1 – Tx1 ANT2 – Tx2 ANT1 – Rx1 ANT1 – Rx2 ANT2 – Rx3 ANT2 – Rx4 CTLA H H L L L L CTLB L H H L L H CTLC — — L H L H F1 ON OFF F2 F3 F4 ON ON ON ON ON F5 ON ON ON ON ON F6 ON F7 F8 ON F9 ON ON ON ON ON F10 ON ON ON ON ON OFF OFF OFF ON OFF OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF OFF OFF –2– CXG1192UR Electrical Characteristics Item Symbol Path ANT1 – Tx1 ANT2 – Tx2 Insertion loss IL ANT1 – Rx1 ANT1 – Rx2 ANT2 – Rx3 ANT2 – Rx4 Tx1 – Rx1 Tx1 – Rx2 Tx2 – Rx3 Isolation ISO. Tx2 – Rx4 Rx1 – Tx1 Rx2 – Tx1 Rx3 – Tx2 Rx4 – Tx2 VSWR Harmonics∗ VSWR 2fo 3fo 2fo 3fo 1dB compression input power Control current Supply current Switching speed P1dB Ictl IDD Swt Tx1 – Ant1 Tx2 – Ant2 Tx1 – Ant1 Tx2 – Ant2 ∗1 ∗2 ∗1 ∗2 Vctl = 2.8V VDD = 2.8V 36 34 20 8 Conditions ∗1 ∗2 ∗3 , ∗4 ∗3 , ∗4 ∗5 , ∗6 ∗5 , ∗6 ∗1 ∗1 ∗2 ∗2 ∗3 , ∗4 ∗3 , ∗4 ∗5 , ∗6 ∗5 , ∗6 25 25 25 25 19 19 14 14 (Ta = 25°C) Min. Typ. Max. Unit 0.25 0.40 0.35 0.50 0.50 0.65 0.50 0.65 0.70 0.85 0.70 0.85 30 30 30 30 23 23 17 17 1.2 –36 –37 –32 –40 dB dB dB dB dB dB dB dB dB dB dB dB dB dB — –30 dBm –32 dBm –29 dBm –37 dBm dBm dBm 45 15 µA mA µs 0.15 0.23 Electrical Characteristics are measured with all RF ports terminated in 50Ω. ∗ Harmonics measured with Tx inputs harmonically matched. We recommend the use of harmonic matching to ensure optimum performance. ∗1 ∗2 ∗3 ∗4 ∗5 ∗6 Power incident on Tx1, Pin = 34dBm, 824 to 915MHz, VDD = 2.4V, Tx1 enabled Power incident on Tx2, Pin = 32dBm, 1710 to 1910MHz, VDD = 2.4V, Tx2 enabled Power incident on Ant, Pin = 10dBm, 869 to 894MHz, VDD = 2.4V, Rx1 or Rx2 enabled Power incident on Ant, Pin = 10dBm, 925 to 960MHz, VDD = 2.4V, Rx1 or Rx2 enabled Power incident on Ant, Pin = 10dBm, 1805 to 1880MHz, VDD = 2.4V, Rx3 or Rx4 enabled Power incident on Ant, Pin = 10dBm, 1930 to 1990MHz, VDD = 2.4V, Rx3 or Rx4 enabled (Ta = 25°C) Min. 2.0 0 2.4 Typ. 2.8 — 2.8 Max. 3.6 0.4 3.6 Unit V V V –3– DC Bias Condition Item Vctl (H) Vctl (L) VDD CXG1192UR Recommended Circuit CTLC CTLB CTLA Cbypass Cbypass 9 VDD Cbypass GND Ant2 CRF NC Tx2 CRF NC 15 16 13 14 11 12 10 8 7 6 CRF 5 CRF 4 CRF 3 CRF 2 1 Rx1 NC Rx2 Rx3 Rx4 GND 17 18 CRF CRF Tx1 GND Ant1 When using this IC, the following external components should be used: CRF: This capacitor is used for RF decoupling and must be used all applications. Cbypass: This capacitor is used for DC line filtering. 100pF is recommended. –4– Cbypass CXG1192UR Package Outline Unit: mm 18PIN UQFN (PLASTIC) x4 0.1 3.5 0.4 ± 0.1 0.55 ± 0.05 2.1 4-R0.2 15 16 10 9 A C B S A-B C 18 1 PIN 1 INDEX 6 7 8-C0.1 0.5 0.05 M S A-B C 2.5 0.24 1.1 0.05 S Solder Plating + 0.09 0.24 – 0.03 S MAX0.02 S TERMINAL SECTION Note:Cutting burr of lead are 0.05mm MAX. PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE UQFN-18P-01 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.02g LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18µm –5– Sony Corporation