CXK5B18120TM-

CXK5B18120TM -12 65536-word × 18-bit High Speed Bi-CMOS Static RAM For the availability of this product, please contact the sales office. Description CXK5B18120TM is a high speed 1M bit BiCMOS static RAM organized as 65536 words by 18 bits. Operating on a single 3.3V supply this asynchronous IC is suitable for use in high speed and low power applications. Features • Single 3.3V Supply 3.3V±0.3V • Fast access time 12ns (Max.) • Low stand-by current: 10mA (Max.) • Low power operation 1116mW (Max.) • Package line-up Dual Vcc/Vss CXK5B18120TM 400mil 44pin TSOP Package 44 pin TSOP (Plastic) Function 65536-word × 18-bit static RAM Structure Silicon gate Bi-CMOS IC Block Diagram A14 A15 A9 A8 A12 A13 A11 A10 Buffer Row Decoder Memory Vcc Matrix 256 × 4608 Pin configuration (Top View) A4 1 A3 2 A2 3 A1 4 A0 5 CE 6 GND I/O1 7 I/O2 8 I/O3 9 I/O4 1 Vcc 11 I/O Gate Column Decoder GND 12 I/O5 13 I/O6 14 I/O7 15 I/O8 16 I/O9 17 WE 18 A15 19 I/O Buffer A14 20 A13 21 A12 22 0 44 A5 43 A6 42 A7 41 OE 40 UB 39 LB 38 I/O18 37 I/O17 36 I/O16 35 I/O15 34 GND 33 Vcc 32 I/O14 31 I/O13 30 I/O12 29 I/O11 28 I/O10 27 NC 26 A8 25 A9 24 A10 23 A11 Pin Description Symbol Description A0 to A15 Address input I/O1 to I/O9 Data input output (lower byte I/O) I/O10 Data input output to I/O18 (upper byte I/O) CE WE OE LB UB Vcc GND NC Chip enable input Write enable input Output enable input Lower byte select input Upper byte select input +3.3V Power supply Ground No connection A5 A4 A3 A0 A2 A1 A6 A7 UB LB WE OE CE I/O1 I/O18 Buffer Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E93585A57-PK CXK5B18120TM Absolute Maximum Ratings Item Supply voltage Input voltage Input and output voltage Allowable power dissipation Operating temperature Storage temperature Soldering temperature • time Symbol VCC VIN VI/O PD Topr Tstg Tsolder (Ta = 25°C, GND = 0V) Rating –0.5∗1 to +4.6 –0.5∗1 to VCC + 0.5 –0.5∗1 to VCC + 0.5 1.5∗2 0 to +70 –55 to +150 235 • 10 Unit V V V W °C °C °C • sec ∗1 Vcc, VIN, VI/O = –2.0V Min. for pulse width less than 5ns ∗2 Air Flow ≥ 1m/s Truth Table CE H OE × WE × LB × L L L H L H H L L × L L H L L H × H × × H UB × L H L H L H L × H Mode Not selected Read Read Read Not selected Write Write Write Output disable Not selected I/O1 to I/O9 High Z Data Out Data Out High Z High Z Data in Data in High Z High Z High Z I/O10 to I/O18 High Z Data out High Z Data out High Z Data in High Z Data in High Z High Z Current ISB1, ISB2 ICC ICC ICC ICC ICC ICC ICC ICC ICC ×: “H” or “L” Recommended Operating Conditions Item Supply voltage Input high voltage Input low voltage Symbol VCC VIH VIL Min. 3.0 2.0 –0.3∗ (Ta = 0 to +70°C, GND = 0V) Typ. 3.3 — — Max. 3.6 VCC + 0.3 0.8 Unit V V V ∗ VIL = –2.0V Min. for pulse width less than 5ns –2– CXK5B18120TM Electrical Characteristics DC Characteristics Item Input leakage current Output leakage current Symbol ILI ILO (Vcc = 3.3V±0.3V, GND = 0V, Ta = 0 to +70°C) Typ.∗ Conditions Min. Max. Unit VIN = GND to Vcc CE = VIH or OE = VIH or WE = VIL or UB = VIH or LB = VIH VI/O = GND to Vcc Min. Cycle Duty =100% IOUT = 0mA, CE = VIL, VIN = VIH or VIL CE ≥ Vcc – 0.2V VIN ≥ Vcc – 0.2V or VIN ≤ 0.2V Min. Cycle Duty =100% CE = VIH, VIN = VIH or VIL IOH = –2.0mA IOL = 2.0mA –10 –10 — — +10 +10 µA µA Average operating current ICC — — 310 mA ISB1 Standby current ISB2 Output high voltage Output low voltage * Vcc = 3.3V, Ta = 25°C VOH VOL — — 10 mA — 2.4 — — — — 100 — 0.4 mA V V I/O Capacitance Item Input capacitance I/O capacitance Symbol CIN CI/O Conditions VIN = 0V VI/O = 0V Min. — — (Ta = 25°C, f = 1MHz) Typ. — — Max. 5 7 Unit pF pF Note) This parameter is sampled and is not 100% tested. AC Characteristics • AC test condition Item Input pulse high level Input pulse low level Input rise time Input fall time (Vcc = 3.3V±0.3V, Ta = 0 to +70°C) Condition VIH = 3.0V VIL = 0.0V I/O Output load (1) Zo=50Ω RL=50Ω VL=1.4V Output load (2)*1 3.3V 1179Ω tr = 2ns tf = 2ns 1.4V Fig. 1 Input and output reference level Output load conditions I/O 5pF*2 868Ω *1. For tLZ, tOLZ, tLBLZ, tUBLZ, tHZ, tOHZ, tLBHZ, tUBHZ, tOW, tWHZ *2. Including scope and jig capacitances. Fig. 1 –3– CXK5B18120TM • Read cycle Item Read cycle time Address access time Chip enable access time Output enable to output valid Byte select to output valid Output data hold time Chip enable to output in low Z (CE) Output enable to output in low Z (OE) Byte select to output in low Z (LB, UB) Chip disable to output in high Z (CE) Output disable to output in high Z (OE) Byte select to output in high Z (LB, UB) Symbol -12 Min. 12 — — — — 3 3 0 0 0 0 0 Max. — 12 12 6 6 — — — — 6 6 6 Unit ns ns ns ns ns ns ns ns ns ns ns ns tRC tAA tCO tOE tLBC tUB tOH tLZ∗ tOLZ∗ tLBLZ, tUBLZ∗ tHZ∗ tOHZ∗ tLBHZ, tUBHZ∗ ∗ Transition is measured ±200mV from steady voltage with specified loading in Fig. 1-(2). This parameter is sampled and is not 100% tested. • Write cycle Item Write cycle time Address valid to end of write Chip enable to end of write Byte select to end of write Data valid to end to write Data hold from end of write Write pulse width Address set up time Write recovery time Output active from end of write Write to output in high Z Symbol -12 Min. 12 10 10 10 8 0 10 0 0 4 0 Max. — — — — — — — — — — 6 Unit ns ns ns ns ns ns ns ns ns ns ns tWC tAW tCW tLBW, tUBW tDW tDH tWP tAS tWR tOW∗ tWHZ∗ ∗ Transition is measured ±200mV from steady voltage with specified loading in Fig. 1-(2). This parameter is sampled and is not 100% tested. –4– CXK5B18120TM Timing Waveform • Read cycle (1) : CE = OE = VIL, WE = VIH tRC Address tAA tOH Data out Previous data valid Data valid • Read cycle (2) : WE = VIH tRC Address tAA CE tLZ tCO tHZ OE tO E tOLZ tOHZ LB, UB tLB tU tLBL tUBL Z Z B tLBH tUBH Z Z Data out High impedance Data valid –5– CXK5B18120TM • Write cycle (1) : WE control tWC Address tA CE W tCW tWR LB, UB tLBW, tUBW tAS WE tWP tDW Data in tWHZ Data valid tDH tOW Data out High impedance • Write cycle (2) : CE control tWC Address tA tAS CE W tWR tCW tLBW, tUBW LB, UB tWP WE tD W tD H Data in Data valid tLZ Data out tWHZ High impedance * Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition. –6– CXK5B18120TM • Write cycle (3) : LB, UB control tWC Address tA W tCW CE tAS tLBW, tUBW LB, UB tWR tWP WE tD W tD H Data in tLBLZ tUBLZ Data out Data valid tWHZ High impedance ∗ Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition. –7– CXK5B18120TM Example of Representative Characteristics Supply current vs. Supply voltage 1.4 1.4 Supply current vs. Ambient temperature ICC – Supply current [Normalized] 1.2 ICC– Supply current [Normalized] 1.2 1.0 1.0 0.8 Ta = 25°C 0.8 VCC = 3.3V 0.6 3.0 0.6 3.15 3.3 3.45 VCC– Supply voltage [V] 3.6 0 20 40 60 Ta– Ambient temperature [°C] 80 Supply current vs. Frequency 12ns 1.0 1.8 Access time vs. Load capacitance tOE tAA, tCO, tOE– Access time [Normalized] ICC– Supply current [Normalized] 0.75 1.6 0.5 1.4 tCO, tAA 0.25 1.2 Ta = 25°C VCC = 3.3V 0 0 25 50 75 Frequency (1 / tRC, 1 / tWC) [MHz] 100 1.0 0 40 80 120 CL– Load capacitance [pF] 160 Access time vs. Supply voltage 1.4 1.4 Access time vs. Load capacitance tAA, tCO, tOE– Access time [Normalized] tAA, tCO, tOE– Access time [Normalized] 1.2 1.2 tCO tAA tOE 1.0 1.0 tAA tCO tOE 0.8 Ta = 25°C 0.8 VCC = 3.3V 0.6 3.0 0.6 3.15 3.3 3.45 VCC– Supply voltage [V] 3.6 0 20 40 60 80 Ta– Ambient temperaturem n –8– CXK5B18120TM Standby current vs. Supply voltage 1.4 ISB2 1.4 Standby current vs. Ambient temperature ISB1, ISB2 – Standby current [Normalized] 1.2 ISB1 ISB1 – Standby current [Normalized] 1.2 1.0 1.0 0.8 Ta = 25°C 0.8 VCC = 3.3V 0.6 3.0 0.6 3.15 3.3 3.45 VCC – Supply voltage [V] 3.6 0 20 40 60 Ta – Ambient temperature[°C] 80 Input voltage level vs. Supply voltage 1.2 1.4 Standby current vs. Ambient temperature VIL, VIH – Input voltage [Normalized] 1.1 ISB2 – Standby current [Normalized] VIH VIL 1.2 1.0 1.0 0.9 Ta = 25°C 0.8 VCC = 3.3V 0.8 3.0 0.6 3.15 3.3 3.45 VCC – Supply voltage [V] 3.6 0 20 40 60 Ta – Ambient temperature°C 80 Output high current vs. Output high voltage 4.0 Output low current vs. Output low voltage 1.8 IOH – Output high current [Normalized] 3.0 IOL – Output low current [Normalized] 1.4 2.0 1.0 1.0 VCC = 3.3V 0.6 VCC = 3.3V 0.0 0.0 0.2 1.0 2.0 3.0 VOH – Output high voltage [V] 4.0 0 0.2 0.4 0.6 VOL – Output low voltage [V] 0.8 –9– CXK5B18120TM Package Outline Unit: mm 44PIN TSOP (II) (PLASTIC) 400mil 1.2 MAX ∗18.41 ± 0.1 44 23 0.1 ∗10.16 ± 0.1 11.76 ± 0.2 A 1 0.8 B 0.3 ± 0.1 22 0.13 M + 0.05 0.125 – 0.02 + 0.1 0.1 – 0.05 0.32 ± 0.08 (0.3) 0.145 ± 0.055 (0.125) 0° to 10° DETAIL A DETAIL B NOTE: Dimension “∗” does not include mold protrusion. PACKAGE STRUCTURE MOLDING COMPOUND SONY CODE EIAJ CODE JEDEC CODE TSOP (II) -44P-L01 TSOP (II) 044-P-0400-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY / PHENOL RESIN SOLDER PLATING 42 ALLOY 0.5g – 10 – 0.5 ± 0.1