CXK77B1810AGB-6

CXK77B1810AGB -5/6 High Speed Bi-CMOS Synchronous Static RAM Description The CXK77B1810AGB-5/6 is a high speed 1M bit Bi-CMOS synchronous static RAM organized as 65536 words by 18 bits. This SRAM integrates input registers, high speed SRAM and write buffer onto a single monolithic IC and features the delayed write system to reduce the dead cycles. Features • Fast cycle time (Cycle) (Frequency) CXK77B1810AGB-5 5ns 200MHz -6 6ns 167MHz • Inputs and outputs are GTL/HSTL compatible • Controlled Impedance Driver • Single 3.3V power supply: 3.3V±0.15V • Byte-write possible • OE asynchronization • JTAG test circuit • Package 119TBGA • 4 kinds of synchronous operation mode Register-Register mode (R-R mode) Register-Flow Thru mode (R-F mode) Register-Latch mode (R-L mode) Dual clock mode (D-C mode) Preliminary For the availability of this product, please contact the sales office. 119 pin BGA (Plastic) Function 65536 word x 18bit High Speed Bi-CMOS Synchronous SRAM Structure Silicon gate Bi-CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– PE96811 CXK77B1810AGB Block Diagram 16 A0 to 15 Input Reg. 2:1 Mux Add. Dout 2:1 Mux Write Store Reg. 64K × 18 Din Write pulse Output latch DQ Reg. Read Comp. S Reg. W Reg. Self Time Write Logic 2 BW a to b Reg. K/K C/C Output Clock M1 M2 Mode Control G –2– CXK77B1810AGB Pin Configuration (Top View) 1 A B C D E F G H J K L M N P R T U VDDQ NC NC DQb NC VDDQ NC DQb VDDQ NC DQb VDDQ DQb NC NC NC VDDQ 2 A NC A NC DQb NC DQb NC VDD DQb NC DQb NC DQb A A TMS 3 A NC A VSS VSS VSS BWb VSS VREF VSS VSS VSS VSS VSS M1 A TDI 4 NC NC VDD ZQ S G C C VDD K K W A A VDD NC TCK 5 A NC A VSS VSS VSS VSS VSS VREF VSS BWa VSS VSS VSS M2 A TDO 6 A NC A DQa NC DQa NC DQa VDD NC DQa NC DQa NC A A NC 7 VDDQ NC NC NC DQa VDDQ DQa NC VDDQ DQa NC VDDQ NC DQa NC ZZ VDDQ Pin Description Symbol A DQx K K C C VREF Description Address Input Data I/O in byte (a to b) Positive Clock Negative Clock Symbol BWX S G ZZ Description Byte Write Enable (a to b) Chip Select Asyn Output Enable Sleep Mode Select JTAG Clock JTAG Mode Select JTAG Data In Symbol VDD VDDQ VSS M1, M2 ZQ NC Description +3.3V power supply Output power supply Ground Mode Select Output Impedance Control No Connect Output Positive Clock(∗) TCK Output Negative Clock(∗) Input Reference TMS TDI Write Enable JTAG Data Out TDO W (∗) These pins should be tied to VDD or VSS except D-C mode. –3– CXK77B1810AGB Package Outline Unit: mm 119 TER M I AL BG A( N PLASTI ) C 14. 0 11. 5 B A X 0. 0. 1 6} C 3. 19 U T R P N M L K J H G F E D C B A 7. 62 1. 27 84 0. 5 19. 1. 0 3C ~4 0. 10 1234567 0. 0. 1 6} 1. 5 0. 75} 15 0. 0. 3 0. 1 C A B 0. 15 C D ETAI X L PAC KAG E STR U C TU R E PAC KAG E M ATER I AL EPO XY R ESI N C O PPER - LAD LAM I ATE C N SO LD ER 0. 8g SO N Y C O D E EI C O D E AJ JED EC C O D E BG A119P01 BO AR D M ATER I AL TER M I AL M ATER I N AL PAC KAG E W EI H T G –4– 32 20. 0 22. 0. 35 C 27 1. C 46 0. C 5 1.