CXM3517BER

SP7T Antenna Switch Module for GSM and UMTS or CDMA Dual Mode Handset CXM3517BER Description This switch is one of a range of low insertion loss, good linearity and high power MMIC antenna switch modules for GSM/UMTS or CDMA dual-mode handsets. The Sony A.S.M. contains SP7T switch, a 1.8V CMOS decoder and a dual-LPF on GSM transmit paths. The Sony GaAs junction gate pHEMT (JPHEMT) process is used for very low insertion loss and high linearity. The excellent insertion loss contributes to good sensitivity and longer talk time. * A.S.M. = Antenna Switch Module (Applications: Quad Band GSM and Single Band UMTS or CDMA Dual-Mode Handset) Features Low insertion loss: 0.80dB (Typ.) on Tx1 (GSM Low Band Tx) 0.80dB (Typ.) on Tx2 (GSM High Band Tx) 0.33dB (Typ.) on TRx (UMTS Band I) High attenuation: 30dB (Typ.) Tx1 @ 2nd Harmonic freq. 30dB (Typ.) Tx2 @ 2nd Harmonic freq. No DC blocking capacitors (Small device footprint) Small package: VQFN-22P (2.6mm × 3.4mm × 0.8mm Typ.) Low voltage operation: VDD = +2.65V CMOS control line (CTLA/CTLB/CTLC) RX paths are changeable for band assignment Lead-free and RoHS compliant Structure GaAs Junction Gate pHEMT (JPHEMT) Switch, CMOS Decoder and Dual-LPF Note on Handling - GaAs MMIC’s are ESD sensitive devices. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E08405-PS CXM3517BER Block Diagram Ant ∗ Built-in CMOS decoder F14 F1 F2 F7 F3 F9 F4 F5 F6 F10 F15 LPF1 LPF2 Tx1 Tx2 Rx1 Rx2 Rx3 Rx4 TRx Pin Configuration GND GND Tx1 Tx2 11 GND 12 GND 13 10 9 8 7 GND 6 GND 7 6 8 9 10 11 12 13 Top View GND 14 TRx 15 GND 16 ANT 17 GND 18 19 VDD 20 CTLC 21 CTLB 22 CTLA 5 Rx1 VQFN-22P PKG 4 Rx4 (2.6mm × 3.4mm × 0.8mm Typ.) 3 Rx3 2 Rx2 1 GND 5 4 3 2 1 22 24 GND 14 Bottom View 15 16 23 GND 17 18 22 22 19 -2- CXM3517BER Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 GND Rx2 Rx3 Rx4 Rx1 GND GND Tx2 (GSM1800/1900) GND GND Tx1 (GSM850/900) GND Symbol Pin No. 13 14 15 16 17 18 19 20 21 22 23 24 GND GND TRx GND ANT GND VDD CTLC CTLB CTLA GND (Bottom) GND (Bottom) Symbol Truth Table Vctl state A H H *1 State 1 2 3 4 5 6 7 *1 *2 Active path Tx1 Tx2 Rx1 Rx2 *1 Rx3 *1 Rx4 TRx *1 Switch state*2 C L L L H H L H F1 H L L L L L L F2 L H L L L L L F3 L L H L L L L F4 L L L H L L L F5 L L L L H L L F6 L L L L L H L F7 L L L L L L H F9 H L H H H H H F10 H H L L L L H F14 L L H H H H L F15 H H H H H H L B H L L L H H L L L L L H Each RX path can be used from 869MHz to 1990MHz frequency, user can select these RX paths changeably. State “L” means a switch “OFF”, state “H” means a switch “ON”. -3- CXM3517BER Electrical Characteristics Supply Voltage Value (Ta = +25°C) Item Bias voltage (VDD) Min. +2.5 Typ. +2.65 Max. +3.3 Unit V Logic Value (Ta = +25°C) Item Control voltage (CTL-A/B/C) State High Low Min. +1.5 0 Typ. +1.8 — Max. +3.3 +0.3 Unit V Absolute Maximum Ratings Item Bias voltage (VDD) Control voltage (CTL-A/B/C) Input power max. [Tx1] *1 Input power max. [Tx2] *1 Input power max. [TRx] *1 Input power max. [Rx1, Rx2, Rx3, Rx4] *1 Operating temperature range Strage temperature range *1 Ratings 4.3V (Ta: +25°C) 4.3V (Ta: +25°C) +36.5dBm (Duty cycle: 25%) (Ta: +25°C) +34.5dBm (Duty cycle: 25%) (Ta: +25°C) +32dBm (Ta: +25°C) +13dBm (Ta: +25°C) –30 to +90°C –65 to +150°C FR-4 (4 layers), 30mm Sqr., t = 0.8mm -4- CXM3517BER (VDD = 2.65V, Vctl = 0/1.8V, Ta: +25°C) Item Symbol Path Ant - Tx1 Ant - Tx2 Insertion loss I.L Ant - Rx1, Rx2, Rx3, Rx4 Ant - TRx Tx1 - Rx1, Rx2, Rx3, Rx4 Tx1 - TRx Tx1 - Tx2 Tx1 - Ant *1 *2 *3 *4 *5 *8 *1 *1 *1 *1 Conditions Min. — — — — — — Typ. 0.80 0.80 0.65 0.85 0.33 0.25 55 40 21 26 40 31 31 28 23 50 30 31 50 55 55 39 26 39 24 38 25 1.30 1.45 Max. 1.00 1.00 0.80 1.00 0.50 0.40 — — — — — — — — — — — — — — — — — — — — — Unit dB 824 to 915MHz 824 to 915MHz 824 to 915MHz 880 to 915MHz 1710 to 1910MHz 1760 to 1830MHz 2640 to 2745MHz 824 to 915MHz 1710 to 1910MHz 1710 to 1910MHz 1710 to 1910MHz 1710 to 1910MHz 1920 to 2170MHz 824 to 894MHz 1710 to 1990MHz 1920 to 2170MHz 824 to 894MHz 1710 to 1990MHz 1920 to 2170MHz 824 to 894MHz 1710 to 1990MHz State 1 State 1 State 1 State 3/4/5/6 State 3/4/5/6 State 1 State 1 State 3/4/5/6 State 3/4/5/6 State 2 State 2 State 2 State 7 State 7 State 7 State 7 State 7 State 7 State 7 State 7 State 7 45 30 18 22 30 26 26 20 19 40 25 28 40 45 45 30 20 30 20 30 20 — — — — — — — — — — — *10 *1 *1 Tx2 - Ant *11 *2 Isolation Iso Tx2 - Rx1, Rx2, Rx3, Rx4 Tx2 - TRx Tx2 - Tx1 TRx - Rx1, Rx2, Rx3, Rx4 *2 *2 *2 *5 *8 *9 *5 dB TRx - Tx1 *8 *9 *5 TRx - Tx2 Ant - Tx1 Ant - Tx2 V.S.W.R. VSWR Ant - Rx1, Rx2, Rx3, Rx4, TRx Tx1 - Ant Tx2 - Ant TRx - Ant TRx - Ant *8 *9 824 to 915MHz 1710 to 1910MHz 824 to 2170MHz 1.60 1.20 –48 –48 –52 –43 –54 –53 –60 –58 –36 –36 –36 –36 –36 –36 –36 –36 — 2fo 3fo 2fo Harmonic level 3fo 2fo 3fo 2fo 3fo *1 *2 dBm *5 *8 -5- CXM3517BER Item Inter modulation distortion Symbol IMD2 IMD3 Path TRx - Ant TRx - Ant Tx1 - Ant *6, *12 *7, *12 Conditions Min. — — 25 25 20 25 25 — — — Typ. –107 –106 30 41 26 30 33 3 5 0.18 Max. –105 –102 — — — — — 5 20 0.40 Unit dBm 1648 to 1830MHz 2472 to 2745MHz 3296 to 3660MHz Tx2 - Ant Switching time Control current Supply current Ts Ictl Idd 3420 to 3820MHz 5130 to 5730MHz 90% OFF – 90% ON VDD = 2.65V, Vctl = 1.8V Active Mode Attenuation ATT dB μs μA mA Electrical characteristics are specified on Sony EVB and with all RF ports terminated with 50Ω. *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 Pin on Tx1: +34dBm, 824 to 915MHz, VDD = 2.65V Pin on Tx2: +32dBm, 1710 to 1910MHz, VDD = 2.65V Pin on Ant: +10dBm, 869 to 960MHz, VDD = 2.65V Pin on Ant: +10dBm, 1805 to 1990MHz, VDD = 2.65V Pin on TRx: +26dBm, 1920 to 2170MHz, VDD = 2.65V Pin on TRx: +20dBm, 1950MHz, Pin on Ant: –15dBm, 190MHz, VDD = 2.65V Pin on TRx: +20dBm, 1950MHz, Pin on Ant: –15dBm, 1760MHz, VDD = 2.65V Pin on TRx: +26dBm, 824 to 894MHz, VDD = 2.65V Pin on TRx: +26dBm, 1710 to 1990MHz, VDD = 2.65V Pin on Tx1: +5dBm, 1710 to 1910MHz, VDD = 2.65V Pin on Tx2: +5dBm, 824 to 915MHz, VDD = 2.65V Measured with recommended circuit -6- CXM3517BER Recommended Circuit GND GND 9 Tx1 11 GND GND GND TRx GND C1 L1 ANT GND 10 Tx2 8 GND GND Rx1 Rx4 Rx3 Rx2 GND 12 24 13 14 15 Top View 16 17 18 GND 7 6 5 4 3 2 GND 1 VQFN-22P PKG (2.6mm × 3.4mm × 0.8mm Typ.) 23 19 VDD 20 CTLC 21 CTLB 22 CTLA C2 100pF Note) 1. No DC blocking capacitors are required on all RF ports. 2. DC levels of all RF ports are GND. 3. L1 (22nH) and C1 (22pF) are recommended on Ant port for ESD protection. -7- CXM3517BER Pin 1 Index 3.4 (0.55) (φ0.5) (0.95) PCB Layout Template • PKG size: 3.4mm × 2.6mm • Pin pitch: 0.4mm : Land : Mask (Open area) : Resist (Open area) ∗ Metal mask thickness: 110µm 3.4 (PKG line) 0.52 0.42 0.25 R0.2 0.72 0.62 0.4 R0.2 0.05 [Detailed view A] 0.3 0.2 R0.05 C0.1 0.89 R0.2 0.79 R0.2 0.1 0.15 A 0.4 ∗ Mask corner R = 0.05mm 0.21 0.26 -8- 1.2 1.4 1.5 2.6 3.0 0.5 0.3 PKG line 3.8 2.6 CXM3517BER Recommended PCB Design 0.55 0.25 IC (VQFN-22P package) PCB metal pattern GND via hole for LPF (Light blue) 1pin GND via hole for switch 0.58 1.00 0.80 2.31 1.45 0.09 (Unit: mm) Independent GND with via hole The positions of these via holes are recommended for stable attenuation. -9- CXM3517BER Package Outline (Unit: mm) LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18µm - 10 - Sony Corporation