CXP84200

CXP84200 CMOS 8-bit Single Chip Microcomputer Description The CXP84200 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type, which is developed for evaluating the function of the CXP84220/84224. Piggyback/ evaluator type 64 pin PSDIP (Ceramic) Features • Wide-range instruction system (213 instructions) to cover various types of data — 16-bit operation/multiplication and division/Boolean bit operation instructions • Minimum instruction cycle 400ns at 10MHz operation • Applicable EPROM LCC type 27C128, LCC type 27C256 (Maximum 24K bytes are available.) • Incorporated RAM capacity 624 bytes • Peripheral functions — A/D converter 8-bit, 8-channel, successive approximation method (Conversion time of 32µs/10MHz) — Serial interface Incorporated 8-bit, 8-stage FIFO (Auto transfer for 1 to 8 bytes), 1 channel 8-bit clock sync type, 1 channel — Timer 8-bit timer 8-bit timer/counter 19-bit time base timer 16-bit capture timer/counter — Remote control reception circuit 8-bit pulse measurement counter with on-chip 6-stage FIFO — PWM output 14 bits, 1 channel • Interruption 14 factors, 14 vectors, multi-interruption possible • Standby mode Sleep/stop • Package 64-pin ceramic SDIP Note) Mask option depends on the type of the CXP84200. Refer to the Products List for details. Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E93865A7X-PS CXP84200 Pin Assignment in Piggyback Mode NC PG0 PG1 PG2 PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 RST XTAL EXTAL VSS 1 2 3 4 5 6 7 8 9 A15 10 11 12 13 14 15 16 17 18 19 20 21 D1 22 23 24 25 26 27 28 29 30 31 32 D2 GND 13 14 16 15 D4 D3 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 2 3 4 5 6 7 8 9 10 11 12 27 26 25 24 23 22 21 20 19 18 17 A14 A13 A8 A9 A11 OE A10 CE D7 D6 D5 1 28 VDD 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 VDD PI6 PI5 PI4 PI3/INT3 PI2/INT2 PI1/INT1 PI0/INT0 PE5/TO PE4/PWM PE3/NMI PE2/RMC PE1/EC1 PE0/EC0 PB7/SO1 PB6/SI1 PB5/SCK1 PB4/SO0 PB3/SI0 PB2/SCK0 PB1/CS0 PB0/CINT PA7/AN7 PA6/AN6 PA5/AN5 PA4/AN4 PA3/AN3 PA2/AN2 PA1/AN1 PA0/AN0 AVREF AVSS Note) NC (Pin 1) is always connected to VDD. –2– CXP84200 Pin Assignment in Evaluator Mode NC PG0 PG1 PG2 PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 RST XTAL EXTAL VSS 1 2 3 4 5 6 7 8 9 A15 10 11 12 13 14 15 16 17 18 19 20 21 WR 22 23 24 25 26 27 28 29 30 31 32 SYNC GND 13 14 16 15 C1 C2 A12 A7/D7 A6/D6 A5/D5 A4/D4 A3/D3 A2/D2 A1/D1 A0/D0 RD 2 3 4 5 6 7 8 9 10 11 12 27 26 25 24 23 22 21 20 19 18 17 A14 A13 A8 A9 A11 1 28 VDD 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 VDD PI6 PI5 PI4 PI3/INT3 PI2/INT2 PI1/INT1 PI0/INT0 PE5/TO PE4/PWM PE3/NMI PE2/RMC PE1/EC1 PE0/EC0 PB7/SO1 PB6/SI1 PB5/SCK1 PB4/SO0 PB3/SI0 PB2/SCK0 PB1/CS0 PB0/CINT PA7/AN7 PA6/AN6 PA5/AN5 PA4/AN4 PA3/AN3 PA2/AN2 PA1/AN1 PA0/AN0 AVREF AVSS HALT 49 A10 E/P I/T MON RST 43 42 41 40 39 38 37 36 35 34 33 48 47 46 45 44 Note) NC (Pin 1) is always connected to VDD. –3– CXP84200 EPROM Read Timing (Ta = –20 to +75°C, Vcc = 4.5 to 5.5V, Vss = 0V reference) Item Address → Data Input delay time Address → Data Hold time Symbol Pins A0 to A15 D0 to D7 A0 to A15 D0 to D7 0 Min. Max. 120 Unit ns ns tACC tIH 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH 0.8VDD Input data 0.2VDD D0 to D7 Products List Products Option item Mask CXP84220 Package ROM capacitance Pull-up resistance for reset pin Power-on reset circuit CXP84224 Piggyback/evaluator CXP84200-U01S 64-pin ceramic PSDIP 24K bytes Existent Existent 64-pin plastic SDIP 20K bytes 24K bytes Existent/Non-existent Existent/Non-existent –4– CXP84200 Piggyback mode/evaluator mode can be switched as shown below. Evaluator mode Pin 1 marking Piggyback mode Pibbyback/evaluator product Pin 1 index DIP type EPROM CPU Probe Package Outline Unit: mm 64PIN PSDIP (CERAMIC) 750mil 58.9 ± 0.55 64 33 18.75 ± 0.25 + 0.05 0.25 – 0.02 1.27 ± 0.25 3.43 ± 0.38 9.8 MAX CERAMIC GOLD PLATING 42 ALLOY 16.0g 1 2.54 ± 0.25 32 0.46 ± 0.08 0.9 1.778 ± 0.1 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE PSDIP-64C-01 ADIP064-C-0750-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT –5– 19.05 ± 0.25 15.24