CXP85200A

CXP85200A/85290A CMOS 8-bit 1-chip Microcomputer Description The CXP85200A/85290A are CMOS 8-bit 1-chip microcomputers that serve as both piggyback and evaluator. The CXP85200A/85290A is developed for evaluating the function of the CXP85112B/85116B/ 85220A/85224A/85228A/85232A. Note that CXP85200A corresponds to the fixed font, and CXP85290A corresponds to the custom font respectively. 64 pin PSDIP (Ceramic) Piggyback/ evaluator type 64 pin PQFP (Ceramic) 64 pin PSDIP (Ceramic) Features • Instruction set which supports a wide array of data types — 213 types of instructions which include 16-bit calculations, multiplication and division arithmetic, and boolean bit operations. • Minimum instruction cycle 1µs/4MHz • EPROM 27C256 LCC type 27C256 • Incorporated RAM capacity 448 bytes • EPROM for custom font (CXP85290A only) LCC type 27C256 (used volume is 4K bytes) • Peripheral functions — On-screen display function 12 × 16 dots, 128 types, 8 colors, 21 characters × 4 lines (More than 5 lines possible) Double scanning mode, jitter elimination circuit — I2C bus interface — PWM output 14 bits, 1 channel 6 bits, 8 channels — Remote control receiving circuit 8-bit pulse measurement counter, 6-stage FIFO — A/D converter 4 bits, 4 channels, successive approximation system (conversion time of 40µs/4MHz) — HSYNC counter — Power supply frequency counter — Watchdog timer — Serial I/O 8-bit clock synchronized — Timers 8-bit timer, 8-bit timer/counter, 19-bit time-base timer • Interrupts 14 factors, 14 vectors multi-interruption possible • Standby mode Sleep • Package 64-pin ceramic SDIP/QFP Structure Silicon gate CMOS IC Note) Optional mask depends on the type of the CXP85200A/85290A. Refer to the product list for details. Purchase of Sony's I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E94333A7Y-PS CXP85200A/85290A CXP85200A Pin Assignment: Piggyback mode 1 (Top View) 64 pin PSDIP Package PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PD7/EC PD6/RMC PD5/ACI PD4/HSI PD3/SI PD2/SO PD1/SCK VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD A14 A13 A8 A9 A11 OE A10 CE D7 D6 D5 D4 D3 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 VDD NC VSS MP PF0/PWM0 PF1/PWM1 PF2/PWM2 PF3/PWM3 PF4/PWM4/SCL0 PF5/PWM5/SCL1 PF6/PWM6/SDA0 PF7/PWM7/SDA1 BLK R G B VSYNC HSYNC EXLC XLC PE0/INT0 PE1/INT1 PE2/AN0 PE3/AN1 PE4/AN2 PE5/AN3 PE6/PWM PE7/TO RST EXTAL XTAL PD0/INT2 Note) 1. NC (Pin 63) is always connected to VDD. 2. Vss (Pins 32 and 62) are always connected to GND. 3. MP (Pin 61) is always connected to GND. –2– CXP85200A/85290A CXP85200A Pin Assignment: Piggyback mode 2 (Top View) 64 pin PQFP Package PA5 PA6 64 63 62 61 60 59 58 57 56 55 54 53 52 A12 A15 VDD A14 A7 A13 NC PA1 PA0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PD7/EC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 A6 A5 A4 A3 A2 A1 A0 NC D0 5 6 7 8 9 10 11 12 13 4 NC MP PF0/PWM0 PA7 PF1/PWM1 PA2 VSS PF2/PWM2 51 50 49 PA3 PA4 VDD PF3/PWM3 PF4/PWM4/SCL0 PF5/PWM5/SCL1 PF6/PWM6/SDA0 PF7/PWM7/SDA1 BLK R G B VSYNC HSYNC EXLC XLC PE0/INT0 PE1/INT1 PE2/AN0 PE3/AN1 PE4/AN2 PE5/AN3 3 2 1 32 31 30 48 47 29 28 27 26 25 24 23 22 21 A8 A9 46 45 A11 44 NC OE 43 42 A10 41 CE D7 D6 40 39 38 37 14 15 16 17 18 19 20 36 35 GND NC D2 D3 D1 19 D4 D5 18 34 33 20 21 22 23 24 25 26 27 28 29 30 31 32 PD4/HSI PD0/INT2 PD5/ACI Note) 1. NC (Pin 56) is always connected to VDD. 2. Vss (Pins 26 and 58) are always connected to GND. 3. MP (Pin 55) is always connected to GND. –3– PE6/PWM PD6/RMC VSS PD1/SCK PD2/SO PE7/TO PD3/SI EXTAL XTAL RST CXP85200A/85290A CXP85200A Pin Assignment: Evaluator Mode 1 (Top View) 64 pin PSDIP Package PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PD7/EC PD6/RMC PD5/ACI PD4/HSI PD3/SI PD2/SO PD1/SCK VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 A15 A12 A7/D7 A6/D6 A5/D5 A4/D4 A3/D3 A2/D2 A1/D1 A0/D0 RD WR SYNC GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD A14 A13 A8 A9 A11 HALT A10 E/P I/T MON RST C1 C2 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 VDD NC VSS MP PF0/PWM0 PF1/PWM1 PF2/PWM2 PF3/PWM3 PF4/PWM4/SCL0 PF5/PWM5/SCL1 PF6/PWM6/SDA0 PF7/PWM7/SDA1 BLK R G B VSYNC HSYNC EXLC XLC PE0/INT0 PE1/INT1 PE2/AN0 PE3/AN1 PE4/AN2 PE5/AN3 PE6/PWM PE7/TO RST EXTAL XTAL PD0/INT2 Note) 1. NC (Pin 63) is always connected to VDD. 2. Vss (Pins 32 and 62) are always connected to GND. 3. MP (Pin 61) is always connected to GND. –4– CXP85200A/85290A CXP85200A Pin Assignment: Evaluator Mode 2 (Top View) 64 pin PQFP Package 64 63 62 61 60 59 58 57 56 55 54 53 52 A12 A15 NC VDD A14 A13 PA1 PA0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PD7/EC 1 2 3 4 5 6 7 8 9 A6/D6 A5/D5 A4/D4 A3/D3 5 6 7 8 9 10 11 12 13 A7/D7 PF0/PWM0 PA7 PF1/PWM1 PA2 VSS PF2/PWM2 51 50 49 PA3 PA4 PA5 PA6 VDD NC MP PF3/PWM3 PF4/PWM4/SCL0 PF5/PWM5/SCL1 PF6/PWM6/SDA0 PF7/PWM7/SDA1 BLK R G B VSYNC HSYNC EXLC XLC PE0/INT0 PE1/INT1 PE2/AN0 PE3/AN1 PE4/AN2 PE5/AN3 4 3 2 1 32 31 30 48 47 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC 46 45 44 43 10 A2/D2 11 A1/D1 12 A0/D0 13 14 15 16 17 NC RD HALT 42 A10 E/P I/T MON 41 40 39 38 37 14 15 16 17 18 19 20 36 35 SYNC 19 GND RST WR NC C2 C1 18 34 33 20 21 22 23 24 25 26 27 28 29 30 31 32 PD2/SO PD3/SI PD4/HSI PD0/INT2 PD5/ACI EXTAL XTAL Note) 1. NC (Pin 56) is always connected to VDD. 2. Vss (Pins 26 and 58) are always connected to GND. 3. MP (Pin 55) is always connected to GND. –5– PE6/PWM PD6/RMC VSS PD1/SCK PE7/TO RST CXP85200A/85290A CXP85290A Pin Assignment: Piggyback Mode (Top View) 64 pin PSDIP Package D0 A1 A2 A3 A4 A5 A0 A6 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PD7/EC PD6/RMC PD5/ACI PD4/HSI PD3/SI PD2/SO PD1/SCK VSS 1 2 3 D1 4 5 6 7 8 9 10 11 D2 GND NC D3 D4 D5 14 15 16 17 18 19 20 NC 64 63 VDD NC VSS MP PF0/PWM0 PF1/PWM1 PF2/PWM2 PF3/PWM3 PF4/PWM4/SCL0 PF5/PWM5/SCL1 PF6/PWM6/SDA0 PF7/PWM7/SDA1 BLK R G B VSYNC HSYNC EXLC XLC PE0/INT0 PE1/INT1 PE2/AN0 PE3/AN1 PE4/AN2 PE5/AN3 PE6/PWM PE7/TO RST EXTAL XTAL PD0/INT2 13 12 11 10 9 8 7 6 5 4 3 2 A7 A12 A15 NC VDD A14 A13 62 61 60 59 58 57 56 55 54 For custom font 1 32 31 30 21 22 23 24 25 26 27 28 29 D7 A10 A11 D6 OE NC A9 A5 D0 NC CE A1 A2 A3 A4 A0 A6 A8 12 13 53 52 13 12 11 10 14 15 16 17 18 19 20 21 22 D1 D2 GND NC D3 D4 D5 14 15 16 17 18 19 20 9 8 7 6 5 4 3 2 A7 A12 A15 NC VDD A14 A13 51 50 49 48 47 46 45 44 43 For custom font 1 32 31 30 21 22 23 24 25 26 27 28 29 D7 A10 A11 D6 OE NC A9 A5 D0 NC CE A1 A2 A3 A4 23 24 25 26 27 28 29 30 31 D1 D2 GND NC D3 D4 D5 14 15 16 17 18 19 20 A0 A6 A8 42 41 4 3 2 A7 A12 A15 NC VDD A14 A13 37 36 35 34 40 39 38 13 12 11 10 9 8 7 6 5 For programming 1 32 31 30 21 22 23 24 25 26 27 28 29 D7 OE A10 Note) 1. NC (Pin 63) is always connected to VDD. 2. Vss (Pins 32 and 62) are always connected to GND. 3. MP (Pin 61) is always connected to GND. –6– CE A8 32 A11 D6 NC A9 33 CXP85200A/85290A CXP85290A Pin Assignment: Evaluator Mode (Top View) 64 pin PSDIP Package D0 A1 A2 A0 A3 A4 A5 A6 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PD7/EC PD6/RMC PD5/ACI PD4/HSI PD3/SI PD2/SO PD1/SCK VSS 1 2 3 D1 4 5 6 7 8 9 10 11 D2 GND NC D3 D4 D5 14 15 16 17 18 19 20 NC 64 63 VDD NC VSS MP PF0/PWM0 PF1/PWM1 PF2/PWM2 PF3/PWM3 PF4/PWM4/SCL0 PF5/PWM5/SCL1 PF6/PWM6/SDA0 PF7/PWM7/SDA1 BLK R G B VSYNC HSYNC EXLC XLC PE0/INT0 PE1/INT1 PE2/AN0 PE3/AN1 PE4/AN2 PE5/AN3 PE6/PWM PE7/TO RST EXTAL XTAL PD0/INT2 13 12 11 10 9 8 7 6 5 4 3 2 A7 A12 A15 NC VDD A14 A13 62 61 60 59 58 57 56 55 54 For custom font 1 32 31 30 21 22 23 24 25 26 27 28 29 A10 OE CE D7 NC D0 A1 A2 A11 D6 NC A9 A5 A0 A3 A4 A6 A8 12 13 53 52 13 12 11 10 9 14 15 16 17 18 19 20 21 22 23 24 25 WR 14 15 16 17 18 19 20 D1 D2 GND NC D3 D4 D5 14 15 16 17 18 19 20 8 7 6 5 4 3 2 A7 A12 A15 NC VDD A12 A13 51 50 49 48 47 46 45 44 43 42 41 4 3 2 A7/D7 40 A12 A15 NC VDD A14 A13 37 36 35 34 39 38 For custom font 1 32 31 30 21 22 23 24 25 26 27 28 29 A1/D1 A10 A2/D2 OE A0/D0 CE 13 12 11 10 9 A3/D3 NC RD A4/D4 A11 NC A5/D5 A9 6 8 7 26 SYNC 27 28 29 30 31 GND NC C2 C1 RST For programming A6/D6 A8 5 1 32 31 30 21 22 23 24 25 26 27 28 29 D6 D7 HALT A10 A9 I/T MON Note) 1. NC (Pin 63) is always connected to VDD. 2. Vss (Pins 32 and 62) are always connected to GND. 3. MP (Pin 61) is always connected to GND. –7– A11 NC 32 E/P A8 33 CXP85200A/85290A EPROM Read Timing (Ta = –20 to +75°C, VDD = 4.5 to 5.5V, VSS = 0V) Item Address → data input delay time Address → data hold time Symbol Pin A0 to A15 D0 to D7 A0 to A15 D0 to D7 0 Min. Max. 250 Unit ns ns tACC tIH 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH D0 to D7 0.8VDD Input data 0.2VDD Product List Product Mask CXP85112B CXP85224A CXP85116B CXP85220A Optional item CXP85228A CXP85232A Piggyback/evaluator CXP85200A-U01S CXP85200A-U03S CXP85290A-U01S CXP85200A-U01Q CXP85200A-U03Q Package ROM capacity RAM capacity Reset pin pull-up resistor Power-on reset circuit Font data 64 pin plastic SDIP/QFP 12K 16K 20K 24K 28K 32K bytes bytes bytes bytes bytes bytes 352 bytes 448 bytes 64 pin ceramic PSDIP/PQFP EPROM 32K bytes 448 bytes Existent Existent Fixed Fixed (European Font) 64 pin ceramic PSDIP Existent/non existent Existent/non existent User data EPROM 4K bytes –8– CXP85200A/85290A CXP85200A Piggyback mode/evaluator mode switching process is as follows. LCC type EPROM CXP85200A Pin 1 mark CPU probe Pin 1 index EPROM Pin 1 indicated Note) Piggyback mode Pin 1 index DIP type EPROM Evaluator mode Note) The evaluator mode cap should be connected to the CPU probe. –9– CXP85200A/85290A CXP85290A Piggyback mode/evaluator mode switching process is as follows. LCC type EPROM CXP85290A CPU probe EPROM Pin 1 indicated Pin 1 index Two EPROMs for custom font (Both have the same contens.) Note) The evaluator mode cap should be connected to the CPU probe. Pin 1 mark Piggyback mode Evaluator mode – 10 – CXP85200A/85290A Package Outline Unit: mm 64PIN PSDIP (CERAMIC) 750mil 58.9 ± 0.55 64 33 18.75 ± 0.25 + 0.05 0.25 – 0.02 1.27 ± 0.25 3.43 ± 0.38 9.8 MAX CERAMIC GOLD PLATING 42 ALLOY 16.0g 1 2.54 ± 0.25 32 0.46 ± 0.08 0.9 1.778 ± 0.1 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE PSDIP-64C-01 ADIP064-C-0750-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT 64PIN PQFP (CERAMIC) PIN No. 1 INDEX INDEX 64 18.7 ± 0.5 16.3 ± 0.2 52 52 64 PIN No.1 INDEX 1 51 51 19.05 ± 0.25 15.24 1 1.0 ± 0.05 4.5 22.3 ± 0.25 24.7 ± 0.5 1.27 ± 0.13 0.4 ± 0.08 0.3 18.12 ± 0.2 12.02 14.22 6.0 1.05 0.7 33 19 19 33 1.3 ± 0.3 0.75 20 9.48 11.66 15.58 ± 0.2 32 32 0.6 0.9 20 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE PQFP-64C-L02 AQFP064-C-0000-B LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT CERAMIC GOLD PLATING 42 ALLOY 5.2g 3.57 ± 0.36 + 0.05 0.15 – 0.02 9.8 MAX – 11 – CXP85200A/85290A 64PIN PSDIP (CERAMIC) 70.98 ± 0.55 15.58 ± 0.2 64 33 18.57 ± 0.25 1.27 ± 0.13 PIN NO.1 INDEX 1.27 ± 0.25 0.46 ± 0.08 0.9 1.778 ± 0.1 3.43 ± 0.38 11.24 MAX PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE PSDIP-64C-02 ADIP064-C-0750-B LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT CERAMIC GOLD PLATING 42 ALLOY 22.8g – 12 – + 0.05 0.25 – 0.02 1 32 19.05 ± 0.25 18.12 ± 0.2 18.12 ± 0.2