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S29CL016J0JDGH134

S29CL016J0JDGH134

  • 厂商:

    SPANSION(飞索)

  • 封装:

  • 描述:

    S29CL016J0JDGH134 - 16 Megabit (512k x 32-Bit) CMOS 2.6 or 3.3 Volt-only Burst Mode, Dual Boot, Simu...

  • 数据手册
  • 价格&库存
S29CL016J0JDGH134 数据手册
S29CD016J/S29CL016J Known Good Die 16 Megabit (512k x 32-Bit) CMOS 2.6 or 3.3 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory Supplement (Advance Information) General Description The Spansion S29CD016J and S29CL016J devices are Floating Gate products fabricated in 110 nm process technology. These burst mode Flash devices are capable of performing simultaneous read and write operations with zero latency on two separate banks. These products can operate up to 56 MHz and use a single VCC of 2.5 V to 2.75 V (S29CD-J) or 3.0 V to 3.6 V (S29CL-J) that make them ideal for today’s demanding automotive applications. Distinctive Characteristics Single 2.6 V (S29CD-J) or 3.3 V (S29CL-J) for read/program/ erase 110 nm Floating Gate Technology Simultaneous Read/Write operation with zero latency X32 Data Bus Dual Boot Sector Configuration (top and bottom) Flexible Sector Architecture – CD016J & CL016J: Eight 2K Double word, Thirty-two 16K Double word, and Eight 2K Double Word sectors Cycling Endurance: 100,000 write cycles per sector (typical) Command set compatible with JECEC (42.4) standard Supports Common Flash Interface (CFI) Persistent and Password methods of Advanced Sector Protection Unlock Bypass program command to reduce programming time Write operation status bits indicate program and erase operation completion Hardware (WP#) protection of two outermost sectors in the large bank Ready/Busy (RY/BY#) output indicates data available to system Suspend and Resume commands for Program and Erase Operation VersatileI/O™ control (1.65 V to VCC) Programmable Burst Interface – Linear for 2, 4, and 8 double word burst with or without wrap around Secured Silicon Sector that can be either factory or customer locked 20 year data retention (typical) Performance Characteristics Read Access Times Speed Option (MHz) Max Asynch. Access Time, ns (tACC) Max Synch. Latency, ns (tIACC) Max Synch. Burst Access, ns (tBACC) Max CE# Access Time, ns (tCE) Max OE# Access time, ns (tOE) 56 64 64 10 69 22 40 67 67 17 71 22 Typical Program and Erase Times Double Word Programming Sector Erase 18 µs 1.0 s Current Consumption (Max values) Continuous Burst Read @ 56 MHz Program Erase Standby Mode 90 mA 50 mA 50 mA 150 µA Publication Number S29CD016J-CL016J_KGD_SP Revision A Amendment 2 Issue Date September 20, 2006 This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice. Supplement (Advance Information) Table of Contents General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Distinctive Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 S29CD/CL016J Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1. 2. 3. 4. 5. Die Photograph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Die Pad Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pad Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 Valid Combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Packaging Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.1 Surftape Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.2 Waffle Pack Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Product Test Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Physical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Special Handling Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 11.1 Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 11.2 Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DC Characteristics for KGD Devices at 145°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Terms and Conditions of Sale for Spansion Non-Volatile Memory Die . . . . . . . . . . . . . . . . . . . . . 14 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6. 7. 8. 9. 10. 11. 12. 13. 14. List of Figures Figure 6.1 Figure 7.1 Figure 7.2 Spansion KGD Product Test Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Maximum Negative Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Maximum Positive Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 List of Tables Table 3.1 Table 12.1 Pads Relative To Die Center . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 DC Characteristics, CMOS Compatible . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 2 S29CD016J/S29CL016J Known Good Die Revision A2 September 20, 2006 Supplement (Advance Information) S29CD/CL016J Features The S29CD016J & S29CL016J Flash devices are burst mode, dual boot, simultaneous read/write Flash memories with VersatileI/O™ manufactured on 110 nm process technology. The S29CD016J is a 16 megabit, 2.6 volt-only, single-power-supply, burst mode Flash memory device that can be configured for 524,288 double words. The S29CL016J is the 3.3 volt-only version of that device. Both devices can be programmed in standard EPROM programmers. To eliminate bus contention, each device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. Additional control inputs are required for synchronous burst operations: Load Burst Address Valid (ADV#), and Clock (CLK). Each device requires only a single 2.6 volt-only (2.50 V – 2.75 V) or 3.3 volt-only (3.00 V – 3.60 V) for both read and write functions. A 12.0-volt VPP is not required for program or erase operations, although an acceleration pin is available if faster programming performance is required. The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. The software command set is compatible with the command sets of the 5 V Am29F and 3 V Am29LV Flash families. Commands are written to the command register using standard micro-processor write timing. Register contents serve as inputs to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices. The Unlock Bypass mode facilitates faster programming times by requiring only two write cycles to program data instead of four. The Simultaneous Read/Write architecture provides simultaneous operation by dividing the memory space into two banks. The device can begin programming or erasing in one bank, and then simultaneously read from the other bank, with zero latency. This releases the system from waiting for the completion of program or erase operations. The device provides a 256-byte Secured Silicon Sector with an one-time-programmable (OTP) mechanism. In addition, the device features several levels of sector protection, which can disable both the program and erase operations in certain sectors or sector groups: Persistent Sector Protection is a command sector protection method that replaces the old 12 V controlled protection method; Password Sector Protection is a highly sophisticated protection method that requires a password before changes to certain sectors or sector groups are permitted; WP# Hardware Protection prevents program or erase in the two outermost 8 Kbytes sectors of the larger bank. The device defaults to the Persistent Sector Protection mode. The customer must then choose if the Standard or Password Protection method is most desirable. The WP# Hardware Protection feature is always available, independent of the other protection method chosen. The VersatileI/O™ (VCCQ) feature allows the output voltage generated on the device to be determined based on the VIO level. This feature allows this device to operate in the 1.8 V I/O environment, driving and receiving signals to and from other 1.8 V devices on the same bus. The host system can detect whether a program or erase operation is complete by observing the RY/BY# pin, by reading the DQ7 (Data# Polling), or DQ6 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The password and software sector protection feature disables both program and erase operations in any combination of sectors of memory. This can be achieved in-system at VCC level. The Program/Erase Suspend/Erase Resume feature enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. September 20, 2006 Revision A2 S29CD016J/S29CL016J Known Good Die 3 Supplement (Advance Information) The device offers two power-saving features. When addresses have been stable for a specified amount of time, the device enters the automatic sleep mode. The system can also place the device into the standby mode. Power consumption is greatly reduced in both these modes. Spansion Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunnelling. The data is programmed using hot electron injection. 1. Die Photograph 4 S29CD016J/S29CL016J Known Good Die Revision A2 September 20, 2006 Supplement (Advance Information) 2. Die Pad Locations 30 25 20 15 10 8 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 30 31 6 31 7 5 32 33 34 35 35 36 Y 4 3 5 2 37 1 74 38 X 1 73 39 74 72 40 40 41 42 71 43 70 44 69 45 45 49 46 47 48 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 70 47 50 55 60 65 69 Logo September 20, 2006 Revision A2 S29CD016J/S29CL016J Known Good Die 5 Supplement (Advance Information) 3. Pad Description Table 3.1 Pads Relative To Die Center (Sheet 1 of 2) Pad Description – Coordinates are Relative to Die Center Mils Pad 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 Signal VSS VCC CE# OE# WE# WP# IND/WAIT# DQ(16) DQ(17) DQ(18) DQ(19) VCCQ VSS DQ(20) DQ(21) DQ(22) DQ(23) DQ(24) DQ(25) DQ(26) DQ(27) VCCQ VSS DQ(28) DQ(29) DQ(30) DQ(31) A0 A1 A2 A3 A4 A5 A6 A7 A8 VSS ACC VCC A9 A10 X 87.381 87.381 87.381 87.381 87.381 87.381 88.346 70.562 65.797 57.691 52.926 46.4 41.738 35.235 30.47 22.364 17.599 –0.093 –4.858 –12.963 –17.728 –24.254 –28.916 –35.42 –40.185 –48.291 –53.056 –69.006 –73.77 –78.333 –88.473 –88.473 –88.473 –88.473 –88.473 –88.473 –88.473 –88.473 –88.473 –88.473 –88.473 Y 3.347 8.031 12.892 17.556 22.22 27.039 39.741 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 46.96 49.02 49.02 49.02 41.504 36.941 32.176 27.613 22.848 18.285 13.402 8.245 –11.899 –17 –21.905 X 2219.485 2219.485 2219.485 2219.485 2219.485 2219.485 2243.986 1792.27 1671.24 1465.356 1344.326 1178.57 1060.153 894.957 773.927 568.043 447.013 –2.356 –123.386 –329.27 –450.3 –616.056 –734.474 –899.669 –1020.699 –1226.583 –1347.613 –1752.741 –1873.771 –1989.671 –2247.216 –2247.216 –2247.216 –2247.216 –2247.216 –2247.216 –2247.216 –2247.216 –2247.216 –2247.216 –2247.216 µm Y 85.016 203.994 327.456 445.921 564.386 686.793 1009.432 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1192.773 1245.108 1245.108 1245.108 1054.196 938.296 817.266 701.366 580.336 464.436 340.414 209.418 –302.224 –431.794 –556.387 6 S29CD016J/S29CL016J Known Good Die Revision A2 September 20, 2006 Supplement (Advance Information) Table 3.1 Pads Relative To Die Center (Sheet 2 of 2) Pad Description – Coordinates are Relative to Die Center Mils Pad 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 Signal A11 A12 A13 A14 A15 A16 A17 A18 DQ(0) DQ(1) DQ(2) DQ(3) VCCQ VSS DQ(4) DQ(5) DQ(6) DQ(7) DQ(8) DQ(9) DQ(10) DQ(11) VCCQ VSS DQ(12) DQ(13) DQ(14) DQ(15) VCCQ RESET# CLK RY/BY# ADV# X –88.473 –88.473 –88.473 –88.473 –88.473 –78.333 –73.77 –69.006 –53.056 –48.291 –40.185 –35.42 –28.894 –24.232 –17.728 –12.963 –4.858 –0.093 17.599 22.364 30.47 35.235 41.76 46.422 52.926 57.691 65.797 70.562 87.381 87.381 87.381 88.346 87.381 Y –26.468 –31.233 –35.796 –40.561 –45.124 –49.192 –49.192 –49.192 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –47.131 –42.383 –36.499 –31.394 –19.018 –11.386 X –2247.216 –2247.216 –2247.216 –2247.216 –2247.216 –1989.671 –1873.771 –1752.741 –1347.613 –1226.583 –1020.699 –899.669 –733.913 –615.496 –450.3 –329.27 –123.386 –2.356 447.013 568.043 773.927 894.957 1060.713 1179.131 1344.326 1465.356 1671.24 1792.27 2219.485 2219.485 2219.485 2243.986 2219.485 µm Y –672.287 –793.317 –909.217 –1030.247 –1146.147 –1249.469 –1249.469 –1249.469 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1197.133 –1076.54 –927.067 –797.402 –483.066 –289.199 September 20, 2006 Revision A2 S29CD016J/S29CL016J Known Good Die 7 Supplement (Advance Information) 4. Ordering Information The order number (Valid Combination) is formed by the following: S29CD016J S29CL016J 0J D E I 00 4 PACKING TYPE 4 = Surf Tape (2500 per reel) 7 = Waffle Pack (42 per waffle pack tray) ADDITIONAL ORDERING OPTIONS 15th Character – S29CD016J only: 0 = 7E, 08, 01/00 Autoselect ID 1 = 7E, 36, 01/00 Autoselect ID 15th Character – S29CL016J only: 0 = 7E, 46, 01/00 Autoselect ID 16th Character – Top or Bottom Boot: 1 = Bottom Boot with Simultaneous Operation 3 = Bottom Boot with No Simultaneous Operation TEMPERATURE RANGE H = Hot (–40°C to +145°C) DIE THICKNESS G = 500 µm PACKAGE TYPE D = Die CLOCK FREQUENCY 10th Character - Initial Burst Access Delay 0 = 5-1-1-1, 6-1-1-1, and above 1 = 4-1-1-1 11h Character - Frequency J = 40 Mhz M = 56 Mhz DEVICE NUMBER/DESCRIPTION S29CD016J/S29CL016J 16 Megabit (512K x 32-Bit) CMOS 2.6 or 3.3 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory Manufactured on 110 nm Floating Gate Technology S29CL016J/S29CL016J Valid Combinations S29CD016J S29CL016J OJ, 1J, OM 1M OJ, 1J, OM, 1M D G H 01, 03, 11, 13 03, 13 01, 03 4.1 Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to 0c\\heck on newly released combinations. 8 S29CD016J/S29CL016J Known Good Die Revision A2 September 20, 2006 Supplement (Advance Information) 5. Packaging Information 5.1 Surftape Packaging Direction of Feed Orientation relative to leading edge of tape and reel 12 mm Spansion logo location September 20, 2006 Revision A2 S29CD016J/S29CL016J Known Good Die 9 Supplement (Advance Information) 5.2 Waffle Pack Packaging Orientation relative to top-left corner of Waffle Pack cavity plate Spansion Logo Location 6. Product Test Flow Figure 6.1 provides an overview of Spansion’s Known Good Die test flow. For more detailed information, refer to the S29CD016J/S29CL016J product qualification database. Spansion implements quality assurance procedures throughout the product test flow. These QA procedures also allow Spansion to produce KGD products without requiring or implementing burn-in. In addition, an off-line quality monitoring program (QMP) further guarantees Spansion quality standards are met on Known Good Die products. 10 S29CD016J/S29CL016J Known Good Die Revision A2 September 20, 2006 Supplement (Advance Information) Figure 6.1 Spansion KGD Product Test Flow Wafer Sort 1 DC Parameters Functionality Programmability Erasability Bake 24 hours at 250°C Data Retention Electronic Marking Step 1: Wafer sort, test 1 & 2 information Wafer Sort 2 DC Parameters Functionality Programmability Erasability DC Parameters Functionality Programmability Erasability Speed Incoming Inspection Wafer Saw Die Separation 100% Visual Inspection Die Pack Electronic Marking Step 2: Final class or KGD test information & device speed Wafer Sort 3 High Temperature Packaging for Shipment Shipment Electronic marking is programmed into every KGD for the purpose of traceability. The electronic marking contains wafer lot number, wafer number of origin, die location on the wafer, mask revision, test program revision, test dates, and speed grade. Figure 6.1 illustrates the steps where specific electronic marking information is programmed. For more information regarding electronic marking, reference the S29CD016J Electronic Marking Data Sheet Supplement. September 20, 2006 Revision A2 S29CD016J/S29CL016J Known Good Die 11 Supplement (Advance Information) 7. Absolute Maximum Ratings Parameter Storage Temperature Ambient Temperature with Power Applied VCC, VIO (Note 1) VCC, VIO (Note 1) ACC, A9, OE#, and RESET# (Note 2) Address, Data, Control Signals Output Short Circuit Current (Note 3) (with the exception of CLK) (Note 1) All other pins (Note 1) S29CD016J S29CL016J Rating –65°C to +150°C –65°C to +145°C –0.5 V to + 3.0 V –0.5 V to + 3.6 V –0.5 V to +13.0 V –0.5 V to +3.6 V –0.5 V to +3.6 V 200 mA Notes 1. Minimum DC voltage on input or I/O pins is –0.5 V. During voltage transitions, input at I/O pins may overshoot VSS to –2.0 V for periods of up to 20 ns. See Figure 7.1. Maximum DC voltage on output and I/O pins is 3.0 V. During voltage transitions output pins may overshoot to VCC + 2.0 V for periods up to 20 ns. See Figure 9. 2. Minimum DC input voltage on pins ACC, A9, OE#, and RESET# is –0.5 V. During voltage transitions, A9, OE#, and RESET# may overshoot VSS to –2.0 V for periods of up to 20 ns. See Figure 7.2. Maximum DC input voltage on pin A9 and OE# is +13.0 V which may overshoot to 13.7 V for periods up to 20 ns. 3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second. 4. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability. Figure 7.1 Maximum Negative Overshoot Waveform 20 ns +0.8 V –0.5 V –2.0 V 20 ns 20 ns Figure 7.2 Maximum Positive Overshoot Waveform 20 ns V CC +2.0 V V CC +0.5 V 2.0 V 20 ns 20 ns 8. Operating Ranges Parameter Ambient Temperature (TA), Hot Range VCC Supply Voltage for regulated voltage range VIO Supply Voltage Note Operating ranges define those limits between which the functionality of the device is guaranteed. Rating –40°C to +145°C CD016J CL016J 2.5 V to 2.75 V 3.0 V to 3.6 V 1.65 V to VCC 12 S29CD016J/S29CL016J Known Good Die Revision A2 September 20, 2006 Supplement (Advance Information) 9. Physical Specifications Specification Die Dimensions Die Thickness Bond Pad Size Pad Area Free of Passivation Pads Per Die Bond Pad Metalization Passivation Value 4.77 x 2.83 mm 500 µm 86 x 86 µm 5,776 µm2 74 Al/Cu Si02/SiN 10. Manufacturing Information Item Description Manufacturing Location Test Location Shipment Preparation Location Manufacturing ID (Bottom Boot) Fabrication Process Die Revision Location/Data Fab 25, TX PNG Penang, Malaysia 98P05AB CS69S 1 11. Special Handling Instructions 11.1 Processing Do not expose KGD products to ultraviolet light or process them at temperatures greater than 250°C. Failure to adhere to these handling instructions will result in irreparable damage to the devices. For best yield, Spansion recommends assembly in a Class 10K clean room with 30% to 60% relative humidity. 11.2 Storage Store at a maximum temperature of 30°C in a nitrogen-purged cabinet or vacuum-sealed bag. Observe all standard ESD handling procedures. 12. DC Characteristics for KGD Devices at 145°C Table 12.1 DC Characteristics, CMOS Compatible Parameter ICC1 ICC3 ICC5 (Note 1) ICC7 (Note 1) ICC8 (Note 1) Description VCC Active Asynchronous Read Current VCC Active Program Current VCC Standby Current (CMOS) VCC Reset Current Automatic Sleep Mode Current Test Condition CE# = VIL, OE#=VIL 1 MHz 40 Min Typ Max 10 50 250 250 250 Unit mA mA µA µA µA CE# = VIL, OE#=VIL, ACC = VIH VCC = VCCMAX, CE# = VCC ± 0.3 V Reset = VIL VIH = VCC ± 0.3 V, VIL = VSS ± 0.3 V September 20, 2006 Revision A2 S29CD016J/S29CL016J Known Good Die 13 Supplement (Advance Information) 13. Terms and Conditions of Sale for Spansion Non-Volatile Memory Die All transactions relating to unpackaged die under this agreement shall be subject to Spansion’s standard terms and conditions of sale, or any revisions thereof, which revisions Spansion reserves the right to make at any time and from time to time. In the event of conflict between the provisions of Spansion’s standard terms and conditions of sale and this agreement, the terms of this agreement shall be controlling. Spansion warrants its manufactured unpackaged die whether shipped to customer in individual dice or wafer form (“Known Good Die,” “KGD”, “Die,” “Known Good Wafer”, “KGW”, or Wafer(s)) will meet Spansion's published specifications and against defective materials or workmanship for a period of one (1) year from date of shipment. This limited warranty does not extend beyond the first purchaser of said Die or Wafer(s). Buyer assumes full responsibility to ensure compliance with the appropriate handling, assembly and processing of KGD or KGW (including but not limited to proper Die preparation, Die attach, backgrinding, singulation, wire bonding and related assembly and test activities), and compliance with all guidelines set forth in Spansion's specifications for KGD or KGW, and Spansion assumes no responsibility for environmental effects on KGD or KGW or for any activity of Buyer or a third party that damages the Die or Wafer(s) due to improper use, abuse, negligence, improper installation, improper backgrinding, improper singulation, accident, loss, damage in transit, or unauthorized repair or alteration by a person or entity other than Spansion (“Limited Warranty Exclusions”) The liability of Spansion under this limited warranty is limited, at Spansion's option, solely to repair the Die or Wafer(s), to send replacement Die or Wafer(s), or to make an appropriate credit adjustment or refund in an amount not to exceed the original purchase price actually paid for the Die or Wafer(s) returned to Spansion, provided that: (a) Spansion is promptly notified by Buyer in writing during the applicable warranty period of any defect or nonconformity in the Die or Wafer(s); (b) Buyer obtains authorization from Spansion to return the defective Die or Wafer(s); (c) the defective Die or Wafer(s) is returned to Spansion by Buyer in accordance with Spansion's shipping instructions set forth below; and (d) Buyer shows to Spansion's satisfaction that such alleged defect or nonconformity actually exists and was not caused by any of the above-referenced Warranty Exclusions. Buyer shall ship such defective Die or Wafer(s) to Spansion via Spansion's carrier, collect. Risk of loss will transfer to Spansion when the defective Die or Wafer(s) is provided to Spansion's carrier. If Buyer fails to adhere to these warranty returns guidelines, Buyer shall assume all risk of loss and shall pay for all freight to Spansion's specified location. The aforementioned provisions do not extend the original limited warranty period of any Die or Wafer(s) that has either been replaced by Spansion. THIS LIMITED WARRANTY IS EXPRESSED IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED OR IMPLIED, INCLUDING THE IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE, THE IMPLIED WARRANTY OF MERCHANTABILITY OR NONINFRINGEMENT AND OF ALL OTHER OBLIGATIONS OR LIABILITIES ON Spansion's PART, AND IT NEITHER ASSUMES NOR AUTHORIZES ANY OTHER PERSON TO ASSUME FOR Spansion ANY OTHER LIABILITIES. THE FOREGOING CONSTITUTES THE BUYER'S SOLE AND EXCLUSIVE REMEDY FOR THE FURNISHING OF DEFECTIVE OR NON CONFORMING KNOWN GOOD DIE OR KNOWN GOOD WAFER(S) AND Spansion SHALL NOT IN ANY EVENT BE LIABLE FOR INCREASED MANUFACTURING COSTS, DOWNTIME COSTS, DAMAGES RELATING TO BUYER'S PROCUREMENT OF SUBSTITUTE DIE OR WAFER(S) (i.e., “COST OF COVER”), LOSS OF PROFITS, REVENUES OR GOODWILL, LOSS OF USE OF ORDAMAGE TO ANY ASSOCIATED EQUIPMENT, OR ANY OTHER INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES BY REASON OF THE FACT THAT SUCH KNOWN GOOD DIE OR KNOWN GOOD WAFER(S) SHALL HAVE BEEN DETERMINED TO BE DEFECTIVE OR NON CONFORMING. Buyer agrees that it will make no warranty representations to its customers which exceed those given by Spansion to Buyer unless and until Buyer shall agree to indemnify Spansion in writing for any claims which exceed Spansion's limited warranty. Known Good Die or Known Good Wafer(s) are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of the Die or Wafer(s) can reasonably be expected to result in a personal injury. Buyer's use of Known Good Die or Known Good Wafer(s) for use in life support applications is at Buyer's own risk and Buyer agrees to fully indemnify Spansion for any damages resulting in such use or sale. Known Good Die or Known Good Wafer are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of the die or wafer can reasonably be expected to result in a personal injury. Buyer's use of Known Good Die or Known Good Wafer for use in life support applications is at Buyer's own risk and Buyer agrees to fully indemnify Spansion for any damages resulting in such use or sale. 14 S29CD016J/S29CL016J Known Good Die Revision A2 September 20, 2006 Supplement (Advance Information) 14. Revision Summary Section Revision A0 (December 23, 2005) Initial release. Revision A1 (August 16, 2006) Die Pad Locations Revision A2 (September 20, 2006) Global Added S29CL016J information. Deleted emboss tape packing type. Deleted industrial and extended temperature ranges. Corrected die pad locations figure. Description Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity will be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2005–2006 Spansion Inc. All Rights Reserved. Spansion, the Spansion logo, MirrorBit, ORNAND, HD-SIM, and combinations thereof are trademarks of Spansion Inc. Other names are for informational purposes only and may be trademarks of their respective owners. September 20, 2006 Revision A2 S29CD016J/S29CL016J Known Good Die 15
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