S29GL032M10BBCR32

S29GL-M MirrorBitTM Flash Family S29GL256M, S29GL128M, S29GL064M, S29GL032M 256 Megabit, 128 Megabit, 64 Megabit, and 32 Megabit, 3.0 Volt-only Page Mode Flash Memory featuring 0.23 µm MirrorBit Process Technology Data Sheet This product family has been retired and is not recommended for designs. For new and current designs, S29GL032A, S29GL064A, S29GL128N, and S29GL256N supersede S29GL032M, S29GL064M, S29GL128M, and S29GL256M respectively. These are the factory-recommended migration paths. Please refer to the S29GL-A and S29GL-N Datasheets for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the valid combinations offered may occur. Publication Number S29GL-M_00 Revision B Amendment 6 Issue Date October 10, 2006 Data Sheet Notice On Data Sheet Designations Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all cases, however, readers are encouraged to verify that they have the latest information before finalizing their design. The following descriptions of Spansion data sheet designations are presented here to highlight their presence and definitions. Advance Information The Advance Information designation indicates that Spansion Inc. is developing one or more specific products, but has not committed any design to production. Information presented in a document with this designation is likely to change, and in some cases, development on the product may discontinue. Spansion Inc. therefore places the following conditions upon Advance Information content: “This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.” Preliminary The Preliminary designation indicates that the product development has progressed such that a commitment to production has taken place. This designation covers several aspects of the product life cycle, including product qualification, initial production, and the subsequent phases in the manufacturing process that occur before full production is achieved. Changes to the technical specifications presented in a Preliminary document should be expected while keeping these aspects of production under consideration. Spansion places the following conditions upon Preliminary content: “This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qualification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document may be revised by subsequent versions or modifications due to changes in technical specifications.” Combination Some data sheets will contain a combination of products with different designations (Advance Information, Preliminary, or Full Production). This type of document will distinguish these products and their designations wherever necessary, typically on the first page, the ordering information page, and pages with DC Characteristics table and AC Erase and Program table (in the table notes). The disclaimer on the first page refers the reader to the notice on this page. Full Production (No Designation on Document) When a product has been in production for a period of time such that no changes or only nominal changes are expected, the Preliminary designation is removed from the data sheet. Nominal changes may include those affecting the number of ordering part numbers available, such as the addition or deletion of a speed option, temperature range, package type, or VIO range. Changes may also include those needed to clarify a description or to correct a typographical error or incorrect specification. Spansion Inc. applies the following conditions to documents in this category: “This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the valid combinations offered may occur.” Questions regarding these document designations may be directed to your local sales office. ii S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 S29GL-M MirrorBitTM Flash Family S29GL256M, S29GL128M, S29GL064M, S29GL032M 256 Megabit, 128 Megabit, 64 Megabit, and 32 Megabit, 3.0 Volt-only Page Mode Flash Memory featuring 0.23 µm MirrorBit Process Technology Data Sheet This product family has been retired and is not recommended for designs. For new and current designs, S29GL032A, S29GL064A, S29GL128N, and S29GL256N supersede S29GL032M, S29GL064M, S29GL128M, and S29GL256M respectively. These are the factory-recommended migration paths. Please refer to the S29GL-A and S29GL-N Datasheets for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. Distinctive Characteristics Architectural Advantages Single power supply operation — 3 volt read, erase, and program operations Manufactured on 0.23 µm MirrorBit process technology Secured Silicon Sector region — 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number, accessible through a command sequence — May be programmed and locked at the factory or by the customer Flexible sector architecture — 256 Mb: 512 32-Kword (64 Kbyte) sectors — 128 Mb: 256 32-Kword (64 Kbyte) sectors — 64 Mb (uniform sector models): 128 32-Kword (64-Kbyte) sectors or 128 32 Kword sectors — 64 Mb (boot sector models): 127 32-Kword (64-Kbyte) sectors + 8 4Kword (8Kbyte) boot sectors — 32 Mb (uniform sector models): 64 32-Kword (64-Kbyte) sectors of 64 32-Kword sectors — 32 Mb (boot sector models): 63 32-Kword (64 Kbyte) sectors + 8 4-Kword (8-Kbyte) boot sectors Compatibility with JEDEC standards — Provides pinout and software compatibility for singlepower supply flash, and superior inadvertent write protection 100,000 erase cycles typical per sector 20-year data retention typical — 16-word/32-byte write buffer reduces overall programming time for multiple-word updates Low power consumption (typical values at 3.0 V, 5 MHz) — 18 mA typical active read current (64 Mb, 32 Mb) — 25 mA typical active read current (256 Mb, 128 Mb) — 50 mA typical erase/program current — 1 µA typical standby mode current Package options — 40-pin TSOP — 48-pin TSOP — 56-pin TSOP — 64-ball Fortified BGA — 48-ball fine-pitch BGA — 63-ball fine-pitch BGA Software & Hardware Features Software features — Program Suspend & Resume: read other sectors before programming operation is completed — Erase Suspend & Resume: read/program other sectors before an erase operation is completed — Data# polling & toggle bits provide status — CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices — Unlock Bypass Program command reduces overall multiple-word programming time Hardware features — Sector Group Protection: hardware-level method of preventing write operations within a sector group — Temporary Sector Unprotect: VID-level method of charging code in locked sectors — WP#/ACC input accelerates programming time (when high voltage is applied) for greater throughput during system production. Protects first or last sector regardless of sector protection settings on uniform sector models — Hardware reset input (RESET#) resets device — Ready/Busy# output (RY/BY#) detects program or erase cycle completion Performance Characteristics High performance — 90 ns access time (128 Mb, 64 Mb, 32 Mb), 100 ns access time (256 Mb) — 4-word/8-byte page read buffer — 25 ns page read times (128 Mb, 64 Mb, 32 Mb) — 30 ns page read times (256 Mb) — 16-word/32-byte write buffer Publication Number S29GL-M_00 Revision B Amendment 6 Issue Date October 10, 2006 Data Sheet General Description The S29GL256/128/064/032M family of devices are 3.0 V single power Flash memory manufactured using 0.23 µm MirrorBit technology. The S29GL256M is a 256†Mbit, organized as 16,777,216 words or 33,554,432 bytes. The S29GL128M is a 128 Mbit, organized as 8,388,608 words or 16,777,216 bytes. The S29GL064M is a 64 Mbit, organized as 4,194,304 words or 8,388,608 bytes. The S29GL032M is a 32 Mbit, organized as 2,097,152 words or 4,194,304 bytes. Depending on the model number, the devices have an 8-bit wide data bus only, 16-bit wide data bus only, or a 16-bit wide data bus that can also function as an 8-bit wide data bus by using the BYTE# input. The devices can be programmed either in the host system or in standard EPROM programmers. Access times as fast as 90 ns (S29GL128M, S29GL064M, S29GL032M) or 100 ns (S29GL256M) are available. Note that each access time has a specific operating voltage range (VCC) as specified in Product Selector Guide and the Ordering Information sections starting on page 16. Package offerings include 40-pin TSOP, 48-pin TSOP, 56-pin TSOP, 48-ball fine-pitch BGA, 63-ball fine-pitch BGA and 64-ball Fortified BGA, depending on model number. Each device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. Each device requires only a single 3.0 volt power supply for both read and write functions. In addition to a VCC input, a high-voltage accelerated program (ACC) feature provides shorter programming times through increased current on the WP#/ACC input. This feature is intended to facilitate factory throughput during system production, but may also be used in the field if desired. The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the programming and erase operations. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. Device programming and erasure are initiated through command sequences. Once a program or erase operation starts, the host system need only poll the DQ7 (Data# Polling) or DQ6 (toggle) status bits or monitor the Ready/Busy# (RY/BY#) output to determine whether the operation is complete. To facilitate programming, an Unlock Bypass mode reduces command sequence overhead by requiring only two write cycles to program data instead of four. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of sectors of memory. This can be achieved in-system or via programming equipment. The Erase Suspend/Erase Resume feature allows the host system to pause an erase operation in a given sector to read or program any other sector and then complete the erase operation. The Program Suspend/Program Resume feature enables the host system to pause a program operation in a given sector to read any other sector and then complete the program operation. The hardware RESET# pin terminates any operation in progress and resets the device, after which it is then ready for a new operation. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the host system to read boot-up firmware from the Flash memory device. The device reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses are stable for a specified period of time. The Write Protect (WP#) feature protects the first or last sector by asserting a logic low on the WP#/ACC pin or WP# pin, depending on model number. The protected sector is still protected even during accelerated programming. The Secured Silicon Sector provides a 128-word/256-byte area for code or data that can be permanently protected. Once this sector is protected, no further changes within the sector can occur. Spansion MirrorBit flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via hot-hole assisted erase. The data is programmed using hot electron injection. 2 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table of Contents Distinctive Characteristics . . . . . . . . . . . . . . . . . . . . 1 General Description . . . . . . . . . . . . . . . . . . . . . . . . 2 Product Selector Guide . . . . . . . . . . . . . . . . . . . . . .5 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .6 For S29GL064M (model R0) only ....................................................................7 For S29GL064M (model R0) only .................................................................. 10 For S29GL032M (model R0) only .................................................................. 12 Unprotection Address Table ................................................. 49 Table 23. S29GL064M (Models R1, R2, R8, R9) Sector Group Protection/Unprotection Addresses ....................................... 49 Table 24. S29GL064M (Model R3) Sector Group Protection/ Unprotection Address Table ................................................. 50 Table 26. S29GL064M (Model R5) Sector Group Protection/ Unprotection Addresses ...................................................... 51 Table 27. S29GL064M (Models R6, R7) Sector Group Protection/ Unprotection Address ......................................................... 51 Table 28. S29GL128M Sector Group Protection/Unprotection Addresses ......................................................................... 51 Table 29. S29GL256M Sector Group Protection/Unprotection Addresses ......................................................................... 52 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Logic Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 S29GL064M (Models R1, R2, R8, R9) ............................................................ 14 S29GL064M (Models R3, R4) .......................................................................... 14 S29GL064M (Model R5) .....................................................................................15 S29GL064M (Model R6, R7) .............................................................................15 S29GL128M .............................................................................................................15 Temporary Sector Group Unprotect .......................................................... 53 Figure 1. Temporary Sector Group Unprotect Operation.......... 53 Figure 2. In-System Sector Group Protect/Sector Group Unprotect Algorithms........................................................................ 54 Ordering Information: S29GL032M . . . . . . . . . . . . 16 S29GL032M Standard Products ...................................................................... 16 Table 1. S29GL032M Ordering Options ................................. 17 Ordering Information: S29GL064M . . . . . . . . . . . 18 S29GL064M Standard Products ...................................................................... 18 Table 2. S29GL064M Ordering Options ................................. 19 Ordering Information: S29GL128M . . . . . . . . . . . .20 Table 3. S29GL128M Ordering Options ................................. 20 Secured Silicon Sector Flash Memory Region ........................................... 55 Write Protect (WP#) ....................................................................................... 56 Hardware Data Protection ............................................................................. 56 Low VCC Write Inhibit ................................................................................ 56 Write Pulse “Glitch” Protection ............................................................... 56 Logical Inhibit ................................................................................................... 56 Power-Up Write Inhibit ............................................................................... 56 Common Flash Memory Interface (CFI) . . . . . . . 57 Table 30. CFI Query Identification String .............................. 57 Table 31. System Interface String ........................................ 57 Table 32. Device Geometry Definition ................................... 58 Table 33. Primary Vendor-Specific Extended Query ................ 59 Ordering Information: S29GL256M . . . . . . . . . . . . 21 Table 4. S29GL256M Ordering Options ................................. 21 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 22 Table 5. Device Bus Operations ........................................... 22 Word/Byte Configuration ............................................................................... 22 Requirements for Reading Array Data ........................................................ 22 Page Mode Read ..................................................................................................23 Writing Commands/Command Sequences .................................................23 Write Buffer .....................................................................................................23 Accelerated Program Operation ...............................................................23 Autoselect Functions .....................................................................................23 Standby Mode ...................................................................................................... 24 Automatic Sleep Mode ..................................................................................... 24 RESET#: Hardware Reset Pin ........................................................................ 24 Output Disable Mode ....................................................................................... 24 Table 6. S29GL032M (Model R0) Sector Addresses ................ 25 Table 7. S29GL032M (Models R1, R2) Sector Addresses ......... 26 Table 8. S29GL032M (Model R3) Top Boot Sector Addresses ................................................. 27 Table 9. S29GL032M (Model R4) Bottom Boot Sector Addresses ............................................ 28 Table 11. S29GL064M (Models R1, R2, R8, R9) Sector Addresses .............................................................. 30 Table 14. S29GL064M (Model R5, R6, R7) Sector Addresses ... 37 Table 16. S29GL256M Sector Address Table ......................... 41 Command Definitions . . . . . . . . . . . . . . . . . . . . . . 60 Reading Array Data ...........................................................................................60 Reset Command .................................................................................................60 Autoselect Command Sequence .....................................................................61 Enter/Exit Secured Silicon Sector Command Sequence ..........................61 Word Program Command Sequence .......................................................61 Unlock Bypass Command Sequence ........................................................ 62 Write Buffer Programming .......................................................................... 62 Accelerated Program .................................................................................... 63 Figure 3. Write Buffer Programming Operation ...................... 64 Figure 4. Program Operation ............................................... 65 Program Suspend/Program Resume Command Sequence .................... 65 Figure 5. Program Suspend/Program Resume........................ 66 Chip Erase Command Sequence ...................................................................66 Sector Erase Command Sequence ................................................................66 Figure 6. Erase Operation ................................................... 67 Erase Suspend/Erase Resume Commands ..................................................68 Command Definitions .......................................................................................69 Write Operation Status .................................................................................... 71 DQ7: Data# Polling ............................................................................................. 71 Table 34. Command Definitions( x16 Mode, BYTE# = VIH) ...... 69 Table 35. Command Definitions (x8 Mode, BYTE# = VIL) ........ 70 Autoselect Mode .................................................................................................47 Table 17. Autoselect Codes, (High Voltage Method) ............... 47 Table 18. S29GL032M (Model R0) Sector Group Protection/ Unprotection Addresses ...................................................... 48 Table 19. S29GL032M (Models R1, R2) Sector Group Protection/ Unprotection Addresses ...................................................... 48 Table 20. S29GL032M (Model R3) Sector Group Protection/ Unprotection Address Table ................................................ 48 Table 21. S29GL032M (Model R4) Sector Group Protection/ Unprotection Address Table ................................................ 49 Table 22. S29GL064M (Model 00) Sector Group Protection/ Figure 7. Data# Polling Algorithm ........................................ 72 RY/BY#: Ready/Busy# ....................................................................................... 72 DQ6: Toggle Bit I ............................................................................................... 72 Figure 8. Toggle Bit Algorithm ............................................. 74 DQ2: Toggle Bit II .............................................................................................. 74 DQ5: Exceeded Timing Limits ........................................................................ 75 DQ3: Sector Erase Timer ................................................................................ 75 DQ1: Write-to-Buffer Abort ........................................................................... 75 Table 36. Write Operation Status ......................................... 76 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 3 Data Sheet Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . 77 Figure 9. Maximum Negative Overshoot Waveform ................. 77 Figure 10. Maximum Positive Overshoot Waveform................. 77 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .78 CMOS Compatible ............................................................................................ 78 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 Figure 11. Test Setup ......................................................... 79 Table 37. Test Specifications ............................................... 79 Key to Switching Waveforms . . . . . . . . . . . . . . . .79 Figure 12. Input Waveforms and Measurement Levels............. 79 Alternate CE# Controlled Erase and Program Operations— S29GL256M .......................................................................................................... 93 Alternate CE# Controlled Erase and Program Operations— S29GL128M ...........................................................................................................94 Alternate CE# Controlled Erase and Program Operations— S29GL064M .......................................................................................................... 95 Alternate CE# Controlled Erase and Program Operations— S29GL032M ..........................................................................................................96 Figure 24. Alternate CE# Controlled Write (Erase/ Program) Operation Timings ............................................... 97 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .80 Read-Only Operations—S29GL256M Only ...............................................80 Read-Only Operations—S29GL128M only ................................................ 80 Read-Only Operations—S29GL064M Only ............................................... 81 Read-Only Operations—S29GL032M only ................................................ 82 Figure 13. Read Operation Timings ....................................... 82 Figure 14. Page Read Timings .............................................. 83 Erase and Programming Performance . . . . . . . . . 98 TSOP Pin and BGA Package Capacitance . . . . . .98 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . 99 TS040—40-Pin Standard Thin Small Outline Package (TSOP) ............99 TSR040—40-Pin Standard and Reverse Thin Small Outline Package (TSOP) ................................................................................................................. 100 TS048—48-Pin Standard and Reverse Thin Small Outline Package (TSOP) ...................................................................................................................101 TSR048—48-Pin Standard and Reverse Thin Small Outline Package (TSOP) ..................................................................................................................102 TS056/TSR056—56-Pin Standard and Reverse Thin Small Outline Package (TSOP) ..........................................................................................................103 LAA064—64-Ball Fortified Ball Grid Array (FBGA) ..............................104 LAC064—64-Pin 18 x 12 mm Package .........................................................105 FBA048—48-Pin 6.15 x 8.15 mm Package ...................................................106 FBC048—48-Pin 8 x 9 mm Package ............................................................107 FBE063—63-Pin 12 x 11 mm Package ........................................................... 108 FPT-48P-M19 ...................................................................................................... 109 FPT-56P-M01 ....................................................................................................... 109 Hardware Reset (RESET#) ...............................................................................83 Figure 15. Reset Timings..................................................... 84 Erase and Program Operations—S29GL256M Only ............................... 85 Erase and Program Operations—S29GL128M Only ............................... 86 Erase and Program Operations—S29GL064M Only .............................. 87 Erase and Program Operations—S29GL032M Only .............................. 88 Figure 16. Program Operation Timings .................................. 89 Figure 17. Accelerated Program Timing Diagram .................... 89 Figure 18. Chip/Sector Erase Operation Timings ..................... 90 Figure 19. Data# Polling Timings (During Embedded Algorithms) ............................................ 90 Figure 20. Toggle Bit Timings (During Embedded Algorithms) .. 91 Figure 21. DQ2 vs. DQ6 ...................................................... 91 Temporary Sector Unprotect ......................................................................... 91 Figure 22. Temporary Sector Group Unprotect Timing Diagram 92 Figure 23. Sector Group Protect and Unprotect Timing Diagram 92 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 110 4 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Product Selector Guide Part Number Speed Option Max. Access Time (ns) Max. CE# Access Time (ns) Max. Page Access Time (ns) Max. OE# Access Time (ns) S29GL256M 10 100 100 30 30 11 110 110 30 30 S29GL128M 90 90 90 25 25 10 100 100 30 30 90 90 90 25 25 S29GL064M 10 100 100 30 30 11 110 110 30 30 90 90 90 25 25 S29GL032M 10 100 100 30 30 11 110 110 30 30 Block Diagram VCC VSS RY/BY# Sector Switches Erase Voltage Generator Input/Output Buffers DQ15–DQ0 (A-1) RESET# WE# WP#/ACC BYTE# State Control Command Register PGM Voltage Generator Chip Enable Output Enable Logic STB Data Latch CE# OE# STB VCC Detector Timer Address Latch Y-Decoder Y-Gating X-Decoder Cell Matrix AMax**–A0 ** AMax: GL256M = A23, GL128M = A22, GL064M = A21 (GL064M-00 = A22), GL032M = A20 (GL032M-00 = A21) October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 5 Data Sheet Connection Diagrams A16 A15 A14 A13 A12 A11 A9 A8 WE# RESET# ACC RY/BY# A18 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A17 VSS A20 A19 A10 DQ7 DQ6 DQ5 DQ4 VCC VIO A21 DQ3 DQ2 DQ1 DQ0 OE# VSS CE# A0 40-Pin Standard TSOP A15 A14 A13 A12 A11 A10 A9 A8 A192 A20 WE# RESET# A211,2 WP#/ACC2 RY/BY#2 A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48-Pin Standard TSOP 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE#2 VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# VSS CE# A0 Notes: 1. Pin 13 is NC on S29GL032M. 2. Pin 9 is A21, Pin 13 is ACC, Pin 14 is WP#, Pin 15 is A19, and Pin 47 is VIO on S29GL064M (models R6, R7). 6 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet For S29GL064M (model R0) only NC A22 A16 A15 A14 A13 A12 A11 A9 A8 WE# RESET# ACC RY/BY# A18 A7 A6 A5 A4 A3 A2 A1 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC A17 VSS A20 A19 A10 DQ7 DQ6 DQ5 DQ4 VCC VIO A21 DQ3 DQ2 DQ1 DQ0 OE# VSS CE# A0 NC NC 48-Pin Standard TSOP A231 A222 A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE# RESET# A213 WP#/ACC RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56-Pin Standard TSOP 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 NC NC A16 BYTE# VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# VSS CE# A0 NC VIO Notes: 1. Pin 1 is NC on S29GL128M, 29GL064M, and S29GL032M. 2. Pin 2 is NC on S29GL064M, and S29GL032M. 3. Pin 15 is NC on S29GL032M. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 7 Data Sheet 64-ball Fortified BGA Top View, Balls Facing Down A8 NC A7 A13 A6 A9 A5 WE# A4 B8 A222 B7 A12 B6 A8 B5 RESET# B4 C8 A233 C7 A14 C6 A10 C5 A211 C4 A18 C3 A6 C2 A2 C1 NC D8 VIO4 D7 A15 D6 A11 D5 A19 D4 A20 D3 A5 D2 A1 D1 NC E8 VSS E7 A16 E6 DQ7 E5 DQ5 E4 DQ2 E3 DQ0 E2 A0 E1 NC F8 NC F7 BYTE# F6 DQ14 F5 DQ12 F4 DQ10 F3 DQ8 F2 CE# F1 VIO4 5 G8 NC G7 DQ15/A-1 G6 DQ13 G5 VCC G4 DQ11 G3 DQ9 G2 OE# G1 NC H8 NC H7 VSS H6 DQ6 H5 DQ4 H4 DQ3 H3 DQ1 H2 VSS H1 NC RY/BY# WP#/ACC A3 A7 A2 A3 A1 NC B3 A17 B2 A4 B1 NC Notes: 1. Ball 2. Ball 3. Ball 4. Ball 5. Ball C5 is NC on S29GL032M. B8 is NC on S29GL064M and S29GL032M. C8 is NC on S29GL128M, S29GL064M and S29GL032M. D8 and Ball F1 are NC on S29GL064M (models R3, R4) and S29GL032M (models R3, R4, R5, R6). F7 is NC on S29GL064M (model R5). 8 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet 63-Ball Fine-Pitch BGA Top View, Balls Facing Down A8 NC* A7 NC* B8 NC* B7 NC* C7 A13 C6 A9 C5 WE# C4 D7 A12 D6 A8 D5 RESET# D4 E7 A14 E6 A10 E5 A21 E4 A18 E3 A6 E2 A2 F7 A15 F6 A11 F5 A19 F4 A20 F3 A5 F2 A1 G7 A16 G6 DQ7 G5 DQ5 G4 DQ2 G3 DQ0 G2 A0 H7 BYTE# H6 DQ14 H5 DQ12 H4 DQ10 H3 DQ8 H2 CE# 1 L8 NC* J7 DQ15/A-1 J6 DQ13 J5 VCC J4 DQ11 J3 DQ9 J2 OE# K7 VSS K6 DQ6 K5 DQ4 K4 DQ3 K3 DQ1 K2 VSS L2 NC* L1 * Balls are shorted together via the substrate but not connected to the die. M8 NC* M7 NC* L7 NC* RY/BY# WP#/ACC C3 A7 A2 NC* A1 NC* B1 NC* C2 A3 D3 A17 D2 A4 M2 NC* M1 NC* NC* Note: Ball H7 is VIO on S29GL064M (model R5). Special Package Handling Instructions Special handling is required for Flash Memory products in molded packages (TSOP and BGA). The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 9 Data Sheet For S29GL064M (model R0) only 63-Ball Fine-Pitch BGA Top View, Balls Facing Down A8 NC* A7 NC* B8 NC* B7 NC* C7 A14 C6 A9 C5 WE# C4 RY/BY# C3 A7 D7 A13 D6 A8 D5 RESET# D4 ACC D3 A18 D2 A4 L8 NC* M8 NC* M7 NC* E7 A15 E6 A11 E5 A22 E4 NC E3 A6 E2 A2 F7 A16 F6 A12 F5 NC F4 NC F3 A5 F2 A1 G7 A17 G6 A19 G5 DQ5 G4 DQ2 G3 DQ0 G2 A0 H7 NC H6 A10 H5 NC H4 DQ3 H3 NC H2 CE# J7 A20 J6 DQ6 J5 VCC J4 VIO J3 NC J2 OE# K7 VSS K6 DQ7 K5 DQ4 K4 A21 K3 DQ1 K2 VSS L7 NC* A2 NC* A1 NC* B1 NC* C2 A3 L2 NC* L1 M2 NC* M1 NC* * Balls are shorted together via the substrate but not connected to the die. NC* Special Package Handling Instructions Special handling is required for Flash Memory products in molded packages (TSOP and BGA). The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. 10 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet 48-ball Fine-pitch BGA Top View, Balls Facing Down A6 A13 A5 A9 A4 WE# A3 B6 A12 B5 A8 B4 RESET# B3 C6 A14 C5 A10 C4 NC C3 A18 C2 A6 C1 A2 D6 A15 D5 A11 D4 A19 D3 A20 D2 A5 D1 A1 E6 A16 E5 DQ7 E4 DQ5 E3 DQ2 E2 DQ0 E1 A0 F6 G6 H6 VSS H5 DQ6 H4 DQ4 H3 DQ3 H2 DQ1 H1 VSS BYTE# DQ15/A-1 F5 DQ14 F4 DQ12 F3 DQ10 F2 DQ8 F1 CE# G5 DQ13 G4 VCC G3 DQ11 G2 DQ9 G1 OE# RY/BY# WP#/ACC A2 A7 A1 A3 B2 A17 B1 A4 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 11 Data Sheet For S29GL032M (model R0) only 48-Ball Fine-Pitch BGA Top View, Balls Facing Down A6 A14 A5 A9 A4 WE# A3 RY/BY# A2 A7 A1 A3 B6 A13 B5 A8 B4 RESET# B3 ACC B2 A18 B1 A4 C6 A15 C5 A11 C4 NC C3 NC C2 A6 C1 A2 D6 A16 D5 A12 D4 NC D3 NC D2 A5 D1 A1 E6 A17 E5 A19 E4 D5 E3 D2 E2 D0 E1 A0 F6 NC F5 A10 F4 NC F3 D3 F2 NC F1 CE# G6 A20 G5 D6 G4 VCC G3 VIO G2 NC G1 OE# H6 VSS H5 D7 H4 D4 H3 A21 H2 D1 H1 VSS Special Package Handling Instructions Special handling is required for Flash Memory products in moulded packages (TSOP and BGA). The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. 12 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Pin Description A23–A0 A22–A0 A21–A0 A20–A0 DQ7–DQ0 DQ14–DQ0 DQ15/A-1 CE# OE# WE# WP#/ACC ACC WP# RESET# RY/BY# BYTE# VCC VSS NC VIO = = = = = = = = = = = = = = = = = 24 Address inputs 23 Address inputs 22 Address inputs 21 Address inputs 8 Data inputs/outputs 15 Data inputs/outputs DQ15 (Data input/output, word mode), A-1 (LSB Address input, byte mode) Chip Enable input Output Enable input Write Enable input Hardware Write Protect input/Programming Acceleration input Acceleration input Hardware Write Protect input Hardware Reset Pin input Ready/Busy output Selects 8-bit or 16-bit mode 3.0 volt-only single power supply (see Product Selector Guide for speed options and voltage supply tolerances) Device Ground Pin Not Connected Internally Output Buffer Power = = = October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 13 Data Sheet Logic Symbols S29GL032M (Model R0) 22 A21–A0 CE# OE# WE# ACC RESET# VIO RY/BY# DQ7–DQ0 8 S29GL032M (Models R1, R2) 21 A20–A0 CE# OE# WE# WP#/ACC RESET# BYTE# VIO RY/BY# DQ15–DQ0 (A-1) 16 or 8 S29GL032M (Models R3, R4) 21 A20–A0 CE# OE# WE# WP#/ACC RESET# RY/BY# BYTE# DQ15–DQ0 (A-1) S29GL064M (Model R0) 23 16 or 8 A22–A0 CE# OE# WE# ACC RESET# VIO RY/BY# DQ7–DQ0 8 S29GL064M (Models R1, R2, R8, R9) 22 A21–A0 CE# OE# WE# WP#/ACC RESET# BYTE# VIO RY/BY# DQ15–DQ0 (A-1) S29GL064M (Models R3, R4) 22 A21–A0 CE# OE# WE# WP#/ACC RESET# BYTE# RY/BY# DQ15–DQ0 (A-1) 16 or 8 16 or 8 14 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Logic Symbols S29GL064M (Model R5) 22 A21–A0 CE# OE# WE# ACC RESET# VIO RY/BY# DQ15–DQ0 16 S29GL064M (Model R6, R7) 22 A21–A0 CE# OE# WE# WP# ACC RESET# VIO DQ15–DQ0 16 S29GL128M 23 A22–A0 CE# OE# WE# WP#/ACC RESET# BYTE# VIO RY/BY# DQ15–DQ0 (A-1) S29GL256M 24 16 or 8 A23–A0 CE# OE# WE# WP#/ACC RESET# BYTE# VIO RY/BY# DQ15–DQ0 (A-1) 16 or 8 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 15 Data Sheet Ordering Information: S29GL032M This product has been retired and is not recommended for designs. For new and current designs, S29GL032A supersedes S29GL032M, and is the factory-recommended migration path. Please refer to the S29GL-A Datasheet for specifications and ordering information. S29GL032M Standard Products Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL032M 10 T A I R1 0 PACKING TYPE 0 2 3 = Tray = 7” Tape and Reel = 13” Tape and Reel R0 R1 MODEL NUMBER R2 R3 R4 = x8, VCC=3.0-3.6V, Uniform sector device = x8/x16, VCC=3.0-3.6V, Uniform sector device, highest address sector protected when WP#/ACC=VIL = x8/x16, VCC=3.0-3.6V, Uniform sector device, lowest address sector protected when WP#/ACC=VIL = x8/x16, VCC=3.0-3.6V, Top boot sector device, top two address sectors protected when WP#/ACC=VIL = x8/x16, VCC=3.0-3.6V, Bottom boot sector device, bottom two address sectors protected when WP#/ACC=VIL = Industrial (–40°C to +85°C) = Commercial (0°C to +70°C) Standard Pb-Free Standard Pb-Free I C TEMPERATURE RANGE PACKAGE MATERIAL SET A F B C T B F = = = = PACKAGE TYPE = Thin Small Outline Package (TSOP) Standard Pinout = Fine-pitch Ball-Grid Array Package = Fortified Ball-Grid Array Package SPEED OPTION DEVICE NUMBER/DESCRIPTION See Product Selector Guide and Valid Combinations S29GL032M 32 Megabit Page-Mode Flash Memory Manufactured using 0.23 µm MirrorBit™ Process Technology, 3.0 Volt-only Read, Program, and Erase 16 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 1. Device Number Speed Option S29GL032M Ordering Options Model Number R0 Packing Type Package Description (Notes) TS040 (2, 3, 5) FBC048 (4) TS056 (2, 3, 5) LAA064 (4) TS048 (2, 3, 5) R3,R4 FBC048 (4) LAA064 (4) R0 0,2,3 (Note 1) TS040 (2, 3, 5) FBC048 (4) TS056 (2, 3, 5) LAA064 (4) TS048 (2, 3, 5) R3,R4 FBC048 (4) LAA064 (4) FPT-48P-M19 (3, 6) TSOP Fine-Pitch BGA TSOP Fortified BGA TSOP Fine-Pitch BGA Fortified BGA TSOP Fine-Pitch BGA TSOP Fortified BGA TSOP Fine-Pitch BGA Fortified BGA TSOP S29GL032M Valid Combinations Package, Material, & Temperature Range TAC,TFC BAC,BFC TAC,TFC 90 FAC,FFC TAC,TFC BAC,BFC FAC,FFC S29GL032M TAI,TFI BAI,BFI TAI,TFI 90, 10, 11 FAI,FFI TAI,TFI BAI,BFI FAI,FFI TBI,TCI R1,R2 R1,R2 Notes: 1. Type 0 is standard. Specify others as required: TSOPs can be packed in Types 0 and 3; BGAs can be packed in Types 0, 2, or 3. 2. This package is recommended for new designs using TSOPs. 3. TSOP package marking omits packing type designator from the ordering part number. 4. BGA package marking omits leading “S29” and packing type designator from the ordering part number. 5. 100% Matte Sn is used for Pb-free TSOP plating. 6. SnBi is used for Pb-free TSOP plating. Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 17 Data Sheet Ordering Information: S29GL064M This product has been retired and is not recommended for designs. For new and current designs, S29GL064A supersedes S29GL064M, and is the factory-recommended migration path. Please refer to the S29GL-A Datasheet for specifications and ordering information. S29GL064M Standard Products Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL064M 90 T A I R1 0 PACKING TYPE 0 2 3 = Tray = 7” Tape and Reel = 13” Tape and Reel = x8, VCC=3.0-3.6V, Uniform sector device = x8/x16, VCC=3.0-3.6V, Uniform sector device, highest address sector protected when WP#/ACC=VIL = x8/x16, VCC=3.0-3.6V, Uniform sector device, lowest address sector protected when WP#/ACC=VIL = x8/x16, VCC=3.0-3.6V, Top boot sector device, top two address sectors protected when WP#/ACC=VIL = x8/x16, VCC=3.0-3.6V, Bottom boot sector device, bottom two address sectors protected when WP#/ACC=VIL = x16, VCC=3.0-3.6V, Uniform sector device = x16, VCC=3.0-3.6V, Uniform sector device, highest address sector protected when WP#=VIL = x16, VCC=3.0-3.6V, Uniform sector device, lowest address sector protected when WP#=VIL = x8/x16, VCC=3.0-3.6V, Uniform sector device, highest address sector protected when WP#/ACC=VIL, FPT-56P-M01 package only = x8/x16, VCC=3.0-3.6V, Uniform sector device, lowest address sector protected when WP#/ACC=VIL, FPT-56P-M01 package only R0 R1 MODEL NUMBER R2 R3 R4 R5 R6 R7 R8 R9 TEMPERATURE RANGE I = Industrial (–40°C to +85°C) Standard Pb-Free Standard Pb-Free Pb-Free PACKAGE MATERIAL SET A F B C D T B F = = = = = PACKAGE TYPE = Thin Small Outline Package (TSOP) Standard Pinout = Fine-pitch Ball-Grid Array Package = Fortified Ball-Grid Array Package SPEED OPTION DEVICE NUMBER/DESCRIPTION See Product Selector Guide and Valid Combinations S29GL064M 64 Megabit Page-Mode Flash Memory Manufactured using 0.23 um MirrorBitTM Process Technology, 3.0 Volt-only Read, Program, and Erase 18 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 2. Device Number Speed Option S29GL064M Ordering Options Model Number R0,R3,R4,R6,R7 R1,R2 R2,R7 R9 R0,R3,R4,R5 R1,R2,R3,R4,R5 0,2,3 (Note 1) Packing Type Package Description (Notes) TS048 (2, 3, 5) TS056 (2, 3, 5) FPT-48P-M19 (3, 6) FPT-56P-M01 (3, 6) FBE063 (4, 6) LAA064 (4) Fine-Pitch BGA Fortified BGA TSOP S29GL064M Valid Combinations Package, Material, & Temperature Range TAI, TFI TBI, TCI TAI, TDI BAI, BFI FAI, FFI S29GL064M 90, 10, 11 Notes: 1. Type 0 is standard. Specify others as required: TSOPs can be packed in Types 0 and 3; BGAs can be packed in Types 0, 2, or 3. 2. This package is recommended for new designs using TSOPs. 3. TSOP package marking omits packing type designator from the ordering part number. 4. BGA package marking omits leading “S29” and packing type designator from the ordering part number. 5. 100% Matte Sn is used for Pb-free TSOP plating. 6. SnBi is used for Pb-free TSOP plating. Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 19 Data Sheet Ordering Information: S29GL128M This product has been retired and is not recommended for designs. For new and current designs, S29GL128N supersedes S29GL128M, and is the factory-recommended migration path. Please refer to the S29GL-N Datasheet for specifications and ordering information. Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL128M 90 T A I R1 0 PACKING TYPE 0 2 3 = Tray = 7” Tape and Reel = 13” Tape and Reel = x8/x16, VCC=3.0-3.6V, Uniform sector device, highest address sector protected when WP#/ACC=VIL = x8/x16, VCC=3.0-3.6V, Uniform sector device, lowest address sector protected when WP#/ACC=VIL = x8/x16, VCC=3.0-3.6V, Uniform sector device, highest address sector protected when WP#/ACC=VIL, FPT-56P-M01 package only = x8/x16, VCC=3.0-3.6V, Uniform sector device, lowest address sector protected when WP#/ACC=VIL, FPT-56P-M01 package only Model Number R1 R2 R8 R9 TEMPERATURE RANGE I = Industrial (–40°C to +85°C) PACKAGE MATERIAL SET A F D T F = Standard = Pb-Free = Pb-Free PACKAGE TYPE = Thin Small Outline Package (TSOP) Standard Pinout = Fortified Ball-Grid Array Package SPEED OPTION DEVICE NUMBER/DESCRIPTION See Product Selector Guide and Valid Combinations S29GL128M 128 Megabit Page-Mode Flash Memory Manufactured using 0.23 µm MirrorBit™ Process Technology, 3.0 Volt-only Read, Program, and Erase Table 3. Base Ordering Part Number Speed Option S29GL128M Ordering Options Model Number R1, R2 R9 R1, R2 0, 2, 3 (Note 1) Packing Type Package Descriptions (Notes) TS056 (2, 3, 5) FPT-56P-M01 (3, 6) LAA064 (4) S29GL128M Valid Combinations Package Type, Material, & Temperature Range TAI, TFI S29GL128M 90, 10, 11 (Note 7) TAI, TDI FAI, FFI TSOP Fortified-BGA Notes: 1. Type 0 is standard. Specify others as required: TSOPs can be packed in Types 0 and 3; BGAs can be packed in Types 0, 2, or 3. 2. This package is recommended for new designs using TSOPs. 3. TSOP package marking omits packing type designator from the ordering part number. 4. BGA package marking omits leading “S29” and packing type designator from the ordering part number. 5. 100% Matte Sn is used for Pb-free TSOP plating. 6. SnBi is used for Pb-free TSOP plating. 7. Contact your Spansion representative for availability of the 90ns speed option for LAA064. Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. 20 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Ordering Information: S29GL256M This product has been retired and is not recommended for designs. For new and current designs, S29GL256N supersedes S29GL256M, and is the factory-recommended migration path. Please refer to the S29GL-N Datasheet for specifications and ordering information. Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL256M 11 T A I R1 0 PACKING TYPE 0 2 3 = Tray = 7” Tape and Reel = 13” Tape and Reel = x8/x16, VCC=3.0-3.6V, Uniform sector device, highest address sector protected when WP#/ACC=VIL = x8/x16, VCC=3.0-3.6V, Uniform sector device, lowest address sector protected when WP#/ACC=VIL Model Number R1 R2 TEMPERATURE RANGE I = Industrial (–40°C to +85°C) PACKAGE MATERIAL SET A F T F = Standard = Pb-Free PACKAGE TYPE = Thin Small Outline Package (TSOP) Standard Pinout = Fortified Ball-Grid Array Package SPEED OPTION DEVICE NUMBER/DESCRIPTION See Product Selector Guide and Valid Combinations S29GL256M 256 Megabit Page-Mode Flash Memory Manufactured using 0.23 µm MirrorBit™ Process Technology, 3.0 Volt-only Read, Program, and Erase Table 4. Device Number S29GL256M Speed Option 10, 11 (Note 5) S29GL256M Ordering Options Model Number R1,R2 Packing Type 0,2,3 (Note 1) Package Description (Notes) TS056 (2, 3, 4) LAC064 (3) TSOP Fortified BGA S29GL256M Valid Combinations Package, Material, & Temperature Range TAI,TFI FAI,FFI Notes: 1. Type 0 is standard. Specify others as required: TSOPs can be packed in Types 0 and 3; BGAs can be packed in Types 0, 2, or 3. 2. TSOP package marking omits the packing type designator from the ordering part number. 3. BGA package marking omits leading “S29” and packing type designator from the ordering part number. 4. 100% Matte Sn is used for Pb-free TSOP plating. 5. Contact your Spansion representative for availability of the 100 ns speed option. Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 21 Data Sheet Device Bus Operations This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is a latch used to store the commands, along with the address and data information needed to execute the command. The contents of the register serve as inputs to the internal state machine. The state machine outputs dictate the function of the device. Table 5 lists the device bus operations, the inputs and control levels they require, and the resulting output. The following subsections describe each of these operations in further detail. Table 5. Operation Read Write (Program/Erase) Accelerated Program Standby Output Disable Reset Sector Group Protect (Note 2) Sector Group Unprotect (Note 2) Temporary Sector Group Unprotect CE# L L L VCC ± 0.3 V L X L Device Bus Operations WP# X (Note 3) AC C X X Addresses (Note 1) AIN AIN AIN X X X SA, A6 =L, A3=L, A2=L, A1=H, A0=L SA, A6=H, A3=L, A2=L, A1=H, A0=L AIN DQ0– DQ7 DOUT DQ8–DQ15 BYTE# = VIH DOUT BYTE# = VIL DQ8–DQ14 = High-Z, DQ15 = A-1 High-Z High-Z High-Z X OE WE# RESET# # L H H X H X H H L L X H X L H H H VCC ± 0.3 V H L VID (Note 4) (Note 4) (Note 4) (Note 4) High-Z High-Z High-Z (Note 4) High-Z High-Z High-Z X (Note 3) VHH X X X H H X X X L X H X L X VID VID H H X X (Note 4) X X High-Z (Note 4) (Note 4) Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5–12.5 V, VHH = 11.5 V – 12.5 V, X = Don’t Care, SA = Sector Address, AIN = Address In, DIN = Data In, DOUT = Data Out Notes: 1. Addresses are Amax:A0 in word mode; Amax:A-1 in byte mode. Sector addresses are Amax:A15 in both modes. 2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector Group Protection and Unprotection” section. 3. If WP# = VIL, the first or last sector remains protected (for uniform sector devices), and the two outer boot sectors are protected (for boot sector devices). If WP# = VIH, the first or last sector, or the two outer boot sectors are protected or unprotected as determined by the method described in “Sector Group Protection and Unprotection”. All sectors are unprotected when shipped from the factory (The Secured Silicon Sector may be factory protected depending on version ordered.) 4. DIN or DOUT as required by command sequence, data polling, or sector protect algorithm (see Figure 2). Word/Byte Configuration The BYTE# pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE# pin is set at logic ‘1’, the device is in word configuration, DQ0–DQ15 are active and controlled by CE# and OE#. If the BYTE# pin is set at logic ‘0’, the device is in byte configuration, and only data I/O pins DQ0– DQ7 are active and controlled by CE# and OE#. The data I/O pins DQ8–DQ14 are tri-stated, and the DQ15 pin is used as an input for the LSB (A-1) address function. Requirements for Reading Array Data To read array data from the outputs, the system must drive the CE# and OE# pins to VIL. CE# is the power control and selects the device. OE# is the output control and gates array data to the output pins. WE# should remain at VIH. 22 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This ensures that no spurious alteration of the memory content occurs during the power transition. No command is necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid addresses on the device address inputs produce valid data on the device data outputs. The device remains enabled for read access until the command register contents are altered. See Reading Array Data for more information. See AC Characteristics for timing specifications and the timing diagram. See DC Characteristics for the active current specification on reading array data. Page Mode Read The device is capable of fast page mode read and is compatible with the page mode Mask ROM read operation. This mode provides faster read access speed for random locations within a page. The page size of the device is 4 words/8 bytes. The appropriate page is selected by the higher address bits A(max)–A2. Address bits A1–A0 in word mode (A1–A-1 in byte mode) determine the specific word within a page. This is an asynchronous operation; the microprocessor supplies the specific word location. The random or initial page access is equal to tACC or tCE and subsequent page read accesses (as long as the locations specified by the microprocessor falls within that page) is equivalent to tPACC. When CE# is deasserted and reasserted for a subsequent access, the access time is tACC or tCE. Fast page mode accesses are obtained by keeping the “read-page addresses” constant and changing the “intra-read page” addresses. Writing Commands/Command Sequences To write a command or command sequence (which includes programming data to the device and erasing sectors of memory), the system must drive WE# and CE# to VIL, and OE# to VIH. The device features an Unlock Bypass mode to facilitate faster programming. Once the device enters the Unlock Bypass mode, only two write cycles are required to program a word, instead of four. Word Program Command Sequence contains details on programming data to the device using both standard and Unlock Bypass command sequences. An erase operation can erase one sector, multiple sectors, or the entire device. Table 6 and Table 16 indicates the address space that each sector occupies. See DC Characteristics for the active current specification for the write mode. AC Characteristics contains timing specification tables and timing diagrams for write operations. Write Buffer Write Buffer Programming allows the system write to a maximum of 16 words/32 bytes in one programming operation. This results in faster effective programming time than the standard programming algorithms. See Write Buffer Programming for more information. Accelerated Program Operation The device offers accelerated program operations through the ACC function. This is one of two functions provided by the WP#/ACC or ACC pin, depending on model number. This function is primarily intended to allow faster manufacturing throughput at the factory. If the system asserts VHH on this pin, the device automatically enters the aforementioned Unlock Bypass mode, temporarily unprotects any protected sector groups, and uses the higher voltage on the pin to reduce the time required for program operations. The system would use a two-cycle program command sequence as required by the Unlock Bypass mode. Removing VHH from the WP#/ACC or ACC pin, depending on model number, returns the device to normal operation. Note that the WP#/ACC or ACC pin must not be at VHH for operations other than accelerated programming, or device damage may result. WP# has an internal pullup; when unconnected, WP# is at VIH. Autoselect Functions If the system writes the autoselect command sequence, the device enters the autoselect mode. The system can then read autoselect codes from the internal register (which is separate from the memory array) on DQ7–DQ0. Standard read cycle timings apply in this mode. See Autoselect Mode and Autoselect Command Sequence for more information. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 23 Data Sheet Standby Mode When the system is not reading or writing to the device, it can place the device in the standby mode. In this mode, current consumption is greatly reduced, and the outputs are placed in the high impedance state, independent of the OE# input. The device enters the CMOS standby mode when the CE# and RESET# pins are both held at VIO ± 0.3 V. (Note that this is a more restricted voltage range than VIH.) If CE# and RESET# are held at VIH, but not within VIO ± 0.3 V, the device is in the standby mode, but the standby current is greater. The device requires standard access time (tCE) for read access when the device is in either of these standby modes, before it is ready to read data. If the device is deselected during erasure or programming, the device draws active current until the operation is completed. See DC Characteristics for the standby current specification. Automatic Sleep Mode The automatic sleep mode minimizes Flash device energy consumption. The device automatically enables this mode when addresses remain stable for tACC + 30 ns. The automatic sleep mode is independent of the CE#, WE#, and OE# control signals. Standard address access timings provide new data when addresses are changed. While in sleep mode, output data is latched and always available to the system. See DC Characteristics for the automatic sleep mode current specification. RESET#: Hardware Reset Pin The RESET# pin provides a hardware method of resetting the device to reading array data. When the RESET# pin is driven low for at least a period of tRP, the device immediately terminates any operation in progress, tristates all output pins, and ignores all read/write commands for the duration of the RESET# pulse. The device also resets the internal state machine to reading array data. The operation that was interrupted should be reinitiated once the device is ready to accept another command sequence, to ensure data integrity. Current is reduced for the duration of the RESET# pulse. When RESET# is held at VSS±0.3 V, the device draws CMOS standby current (ICC5). If RESET# is held at VIL but not within VSS±0.3 V, the standby current is greater. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firmware from the Flash memory. See AC Characteristics for RESET# parameters and to Figure 15 for the timing diagram. Output Disable Mode When the OE# input is at VIH, output from the device is disabled. The output pins are placed in the high impedance state. 24 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 6. Sector A21–A16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 S29GL032M (Model R0) Sector Addresses 8-bit Address Range A21–A16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 8-bit Address Range 200000–20FFFF 210000–21FFFF 220000–22FFFF 230000–23FFFF 240000–24FFFF 250000–25FFFF 260000–26FFFF 270000–27FFFF 280000–28FFFF 290000–29FFFF 2A0000–2AFFFF 2B0000–2BFFFF 2C0000–2CFFFF 2D0000–2DFFFF 2E0000–2EFFFF 2F0000–2FFFFF 300000–30FFFF 310000–31FFFF 320000–32FFFF 330000–33FFFF 340000–34FFFF 350000–35FFFF 360000–36FFFF 370000–37FFFF 380000–38FFFF 390000–39FFFF 3A0000–3AFFFF 3B0000–3BFFFF 3C0000–3CFFFF 3D0000–3DFFFF 3E0000–3EFFFF 3F0000–3FFFFF Sector SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 000000–00FFFF 010000–01FFFF 020000–02FFFF 030000–03FFFF 040000–04FFFF 050000–05FFFF 060000–06FFFF 070000–07FFFF 080000–08FFFF 090000–09FFFF 0A0000–0AFFFF 0B0000–0BFFFF 0C0000–0CFFFF 0D0000–0DFFFF 0E0000–0EFFFF 0F0000–0FFFFF 100000–10FFFF 110000–11FFFF 120000–12FFFF 130000–13FFFF 140000–14FFFF 150000–15FFFF 160000–16FFFF 170000–17FFFF 180000–18FFFF 190000–19FFFF 1A0000–1AFFFF 1B0000–1BFFFF 1C0000–1CFFFF 1D0000–1DFFFF 1E0000–1EFFFF 1F0000–1FFFFF October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 25 Data Sheet Table 7. A20-A15 000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 Sector Size (KB/ Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range Sector S29GL032M (Models R1, R2) Sector Addresses 16-bit Address Range 000000–007FFF 008000–00FFFF 010000–017FFF 018000–01FFFF 020000–027FFF 028000–02FFFF 030000–037FFF 038000–03FFFF 040000–047FFF 048000–04FFFF 050000–057FFF 058000–05FFFF 060000–067FFF 068000–06FFFF 070000–077FFF 078000–07FFFF 080000–087FFF 088000–08FFFF 090000–097FFF 098000–09FFFF 0A0000–0A7FFF 0A8000–0AFFFF 0B0000–0B7FFF 0B8000–0BFFFF 0C0000–0C7FFF 0C8000–0CFFFF 0D0000–0D7FFF 0D8000–0DFFFF 0E0000–0E7FFF 0E8000–0EFFFF 0F0000–0F7FFF 0F8000–0FFFFF A20-A15 Sector Size (KB/ Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 200000–20FFFF 210000–21FFFF 220000–22FFFF 230000–23FFFF 240000–24FFFF 250000–25FFFF 260000–26FFFF 270000–27FFFF 280000–28FFFF 290000–29FFFF 2A0000–2AFFFF 2B0000–2BFFFF 2C0000–2CFFFF 2D0000–2DFFFF 2E0000–2EFFFF 2F0000–2FFFFF 300000–30FFFF 310000–31FFFF 320000–32FFFF 330000–33FFFF 340000–34FFFF 350000–35FFFF 360000–36FFFF 370000–37FFFF 380000–38FFFF 390000–39FFFF 3A0000–3AFFFF 3B0000–3BFFFF 3C0000–3CFFFF 3D0000–3DFFFF 3E0000–3EFFFF 3F0000–3FFFFF 16-bit Address Range 100000–107FFF 108000–10FFFF 110000–117FFF 118000–11FFFF 120000–127FFF 128000–12FFFF 130000–137FFF 138000–13FFFF 140000–147FFF 148000–14FFFF 150000–157FFF 158000–15FFFF 160000–167FFF 168000–16FFFF 170000–177FFF 178000–17FFFF 180000–187FFF 188000–18FFFF 190000–197FFF 198000–19FFFF 1A0000–1A7FFF 1A8000–1AFFFF 1B0000–1B7FFF 1B8000–1BFFFF 1C0000–1C7FFF 1C8000–1CFFFF 1D0000–1D7FFF 1D8000–1DFFFF 1E0000–1E7FFF 1E8000–1EFFFF 1F0000–1F7FFF 1F8000–1FFFFF Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 000000–00FFFF 010000–01FFFF 020000–02FFFF 030000–03FFFF 040000–04FFFF 050000–05FFFF 060000–06FFFF 070000–07FFFF 080000–08FFFF 090000–09FFFF 0A0000–0AFFFF 0B0000–0BFFFF 0C0000–0CFFFF 0D0000–0DFFFF 0E0000–0EFFFF 0F0000–0FFFFF 100000–10FFFF 110000–11FFFF 120000–12FFFF 130000–13FFFF 140000–14FFFF 150000–15FFFF 160000–16FFFF 170000–17FFFF 180000–18FFFF 190000–19FFFF 1A0000–1AFFFF 1B0000–1BFFFF 1C0000–1CFFFF 1D0000–1DFFFF 1E0000–1EFFFF 1F0000–1FFFFF SA32 1 0 0 0 0 0 SA33 1 0 0 0 0 1 SA34 1 0 0 0 1 0 SA35 1 0 0 0 1 1 SA36 1 0 0 1 0 0 SA37 1 0 0 1 0 1 SA38 1 0 0 1 1 0 SA39 1 0 0 1 1 1 SA40 1 0 1 0 0 0 SA41 1 0 1 0 0 1 SA42 1 0 1 0 1 0 SA43 1 0 1 0 1 1 SA44 1 0 1 1 0 0 SA45 1 0 1 1 0 1 SA46 1 0 1 1 1 0 SA47 1 0 1 1 1 1 SA48 1 1 0 0 0 0 SA49 1 1 0 0 0 1 SA50 1 1 0 0 1 0 SA51 1 1 0 0 1 1 SA52 1 1 0 1 0 0 SA53 1 1 0 1 0 1 SA54 1 1 0 1 1 0 SA55 1 1 0 1 1 1 SA56 1 1 1 0 0 0 SA57 1 1 1 0 0 1 SA58 1 1 1 0 1 0 SA59 1 1 1 0 1 1 SA60 1 1 1 1 0 0 SA61 1 1 1 1 0 1 SA62 1 1 1 1 1 0 SA63 1 1 1 1 1 1 SA10 0 0 1 0 1 0 SA11 0 0 1 0 1 1 SA12 0 0 1 1 0 0 SA13 0 0 1 1 0 1 SA14 0 0 1 1 1 0 SA15 0 0 1 1 1 1 SA16 0 1 0 0 0 0 SA17 0 1 0 0 0 1 SA18 0 1 0 0 1 0 SA19 0 1 0 0 1 1 SA20 0 1 0 1 0 0 SA21 0 1 0 1 0 1 SA22 0 1 0 1 1 0 SA23 0 1 0 1 1 1 SA24 0 1 1 0 0 0 SA25 0 1 1 0 0 1 SA26 0 1 1 0 1 0 SA27 0 1 1 0 1 1 SA28 0 1 1 1 0 0 SA29 0 1 1 1 0 1 SA30 0 1 1 1 1 0 SA31 0 1 1 1 1 1 26 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 8. S29GL032M (Model R3) Top Boot Sector Addresses A20–A12 000000xxx 000001xxx 000010xxx 000011xxx 000100xxx 000101xxx 000110xxx 000111xxx 001000xxx 001001xxx 001010xxx 001011xxx 001100xxx 001101xxx 001101xxx 001111xxx 010000xxx 010001xxx 010010xxx 010011xxx 010100xxx 010101xxx 010110xxx 010111xxx 011000xxx 011001xxx 011010xxx 011011xxx 011000xxx 011101xxx 011110xxx 011111xxx 100000xxx 100001xxx 100010xxx 101011xxx Sector Size* 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 000000h–00FFFFh 010000h–01FFFFh 020000h–02FFFFh 030000h–03FFFFh 040000h–04FFFFh 050000h–05FFFFh 060000h–06FFFFh 070000h–07FFFFh 080000h–08FFFFh 090000h–09FFFFh 0A0000h–0AFFFFh 0B0000h–0BFFFFh 0C0000h–0CFFFFh 0D0000h–0DFFFFh 0E0000h–0EFFFFh 0F0000h–0FFFFFh 100000h–00FFFFh 110000h–11FFFFh 120000h–12FFFFh 130000h–13FFFFh 140000h–14FFFFh 150000h–15FFFFh 160000h–16FFFFh 170000h–17FFFFh 180000h–18FFFFh 190000h–19FFFFh 1A0000h–1AFFFFh 1B0000h–1BFFFFh 1C0000h–1CFFFFh 1D0000h–1DFFFFh 1E0000h–1EFFFFh 1F0000h–1FFFFFh 200000h–20FFFFh 16-bit Address Range 00000h–07FFFh 08000h–0FFFFh 10000h–17FFFh 18000h–1FFFFh 20000h–27FFFh 28000h–2FFFFh 30000h–37FFFh 38000h–3FFFFh 40000h–47FFFh 48000h–4FFFFh 50000h–57FFFh 58000h–5FFFFh 60000h–67FFFh 68000h–6FFFFh 70000h–77FFFh 78000h–7FFFFh 80000h–87FFFh 88000h–8FFFFh 90000h–97FFFh 98000h–9FFFFh A0000h–A7FFFh A8000h–AFFFFh B0000h–B7FFFh B8000h–BFFFFh C0000h–C7FFFh C8000h–CFFFFh D0000h–D7FFFh D8000h–DFFFFh E0000h–E7FFFh E8000h–EFFFFh F0000h–F7FFFh F8000h–FFFFFh F9000h–107FFFh A20–A12 100100xxx 100101xxx 100110xxx 100111xxx 101000xxx 101001xxx 101010xxx 101011xxx 101100xxx 101101xxx 101110xxx 101111xxx 110000xxx 110001xxx 110010xxx 110011xxx 100100xxx 110101xxx 110110xxx 110111xxx 111000xxx 111001xxx 111010xxx 111011xxx 111100xxx 111101xxx 111110xxx 111111000 111111001 111111010 111111011 111111100 111111101 111111110 111111111 Sector Size* 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8/4 8/4 8/4 8/4 8/4 8/4 8/4 8/4 8-bit Address Range 240000h–24FFFFh 250000h–25FFFFh 260000h–26FFFFh 270000h–27FFFFh 280000h–28FFFFh 290000h–29FFFFh 2A0000h–2AFFFFh 2B0000h–2BFFFFh 2C0000h–2CFFFFh 2D0000h–2DFFFFh 2E0000h–2EFFFFh 2F0000h–2FFFFFh 300000h–30FFFFh 310000h–31FFFFh 320000h–32FFFFh 330000h–33FFFFh 340000h–34FFFFh 350000h–35FFFFh 360000h–36FFFFh 370000h–37FFFFh 380000h–38FFFFh 390000h–39FFFFh 3A0000h–3AFFFFh 3B0000h–3BFFFFh 3C0000h–3CFFFFh 3D0000h–3DFFFFh 3E0000h–3EFFFFh 3F0000h–3F1FFFh 3F2000h–3F3FFFh 3F4000h–3F5FFFh 3F6000h–3F7FFFh 3F8000h–3F9FFFh 3FA000h–3FBFFFh 3FC000h–3FDFFFh 3FE000h–3FFFFFh 16-bit Address Range 120000h–127FFFh 128000h–12FFFFh 130000h–137FFFh 138000h–13FFFFh 140000h–147FFFh 148000h–14FFFFh 150000h–157FFFh 158000h–15FFFFh 160000h–167FFFh 168000h–16FFFFh 170000h–177FFFh 178000h–17FFFFh 180000h–187FFFh 188000h–18FFFFh 190000h–197FFFh 198000h–19FFFFh 1A0000h–1A7FFFh 1A8000h–1AFFFFh 1B0000h–1B7FFFh 1B8000h–1BFFFFh 1C0000h–1C7FFFh 1C8000h–1CFFFFh 1D0000h–1D7FFFh 1D8000h–1DFFFFh 1E0000h–1E7FFFh 1E8000h–1EFFFFh 1F0000h–1F7FFFh 1F8000h–1F8FFFh 1F9000h–1F9FFFh 1FA000h–1FAFFFh 1FB000h–1FBFFFh 1FC000h–1FCFFFh 1FD000h–1FDFFFh 1FE000h–1FEFFFh 1FF000h–1FFFFFh Sector Sector SA36 SA37 SA38 SA39 SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 210000h–21FFFFh 108000h–10FFFFh 220000h–22FFFFh 110000h–117FFFh 230000h–23FFFFh 118000h–11FFFFh * Sector sizes are given in Kbytes/Kwords. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 27 Data Sheet Table 9. S29GL032M (Model R4) Bottom Boot Sector Addresses Sector Sector A20–A12 000000000 000000001 000000010 000000011 000000100 000000101 000000110 000000111 000001xxx 000010xxx Sector Size* 8/4 8/4 8/4 8/4 8/4 8/4 8/4 8/4 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 000000h–001FFFh 002000h–003FFFh 004000h–005FFFh 006000h–007FFFh 008000h–009FFFh 00A000h–00BFFFh 00C000h–00DFFFh 00E000h–00FFFFFh 010000h–01FFFFh 020000h–02FFFFh 030000h–03FFFFh 040000h–04FFFFh 050000h–05FFFFh 060000h–06FFFFh 070000h–07FFFFh 080000h–08FFFFh 090000h–09FFFFh 0A0000h–0AFFFFh 0B0000h–0BFFFFh 1F0000h–1FFFFFh 200000h–20FFFFh 210000h–21FFFFh 220000h–22FFFFh 230000h–23FFFFh 240000h–24FFFFh 250000h–25FFFFh 260000h–26FFFFh 270000h–27FFFFh 280000h–28FFFFh 290000h–29FFFFh 2A0000h–2AFFFFh 2B0000h–2BFFFFh 2C0000h–2CFFFFh 2D0000h–2DFFFFh 2E0000h–2EFFFFh 2F0000h–2FFFFFh 16-bit Address Range 00000h–00FFFh 01000h–01FFFh 02000h–02FFFh 03000h–03FFFh 04000h–04FFFh 05000h–05FFFh 06000h–06FFFh 07000h–07FFFh 08000h–0FFFFh 10000h–17FFFh 18000h–1FFFFh 20000h–27FFFh 28000h–2FFFFh 30000h–37FFFh 38000h–3FFFFh 40000h–47FFFh 48000h–4FFFFh 50000h–57FFFh 58000h–5FFFFh F8000h–FFFFFh F9000h–107FFFh 108000h–10FFFFh 110000h–117FFFh 118000h–11FFFFh 120000h–127FFFh 128000h–12FFFFh 130000h–137FFFh 138000h–13FFFFh 140000h–147FFFh 148000h–14FFFFh 150000h–157FFFh 158000h–15FFFFh 160000h–167FFFh 168000h–16FFFFh 170000h–177FFFh 178000h–17FFFFh A20–A12 Sector Size* 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 0C0000h–0CFFFFh 0D0000h–0DFFFFh 0E0000h–0EFFFFh 0F0000h–0FFFFFh 100000h–00FFFFh 110000h–11FFFFh 120000h–12FFFFh 130000h–13FFFFh 140000h–14FFFFh 150000h–15FFFFh 160000h–16FFFFh 170000h–17FFFFh 180000h–18FFFFh 190000h–19FFFFh 1A0000h–1AFFFFh 1B0000h–1BFFFFh 1C0000h–1CFFFFh 1D0000h–1DFFFFh 1E0000h–1EFFFFh 300000h–30FFFFh 310000h–31FFFFh 320000h–32FFFFh 330000h–33FFFFh 340000h–34FFFFh 350000h–35FFFFh 360000h–36FFFFh 370000h–37FFFFh 380000h–38FFFFh 390000h–39FFFFh 16-bit Address Range 60000h–67FFFh 68000h–6FFFFh 70000h–77FFFh 78000h–7FFFFh 80000h–87FFFh 88000h–8FFFFh 90000h–97FFFh 98000h–9FFFFh A0000h–A7FFFh A8000h–AFFFFh B0000h–B7FFFh B8000h–BFFFFh C0000h–C7FFFh C8000h–CFFFFh D0000h–D7FFFh D8000h–DFFFFh E0000h–E7FFFh E8000h–EFFFFh F0000h–F7FFFh 180000h–187FFFh 188000h–18FFFFh 190000h–197FFFh 198000h–19FFFFh 1A0000h–1A7FFFh 1A8000h–1AFFFFh 1B0000h–1B7FFFh 1B8000h–1BFFFFh 1C0000h–1C7FFFh 1C8000h–1CFFFFh SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA19 001100xxx SA20 001101xxx SA21 001101xxx SA22 001111xxx SA23 010000xxx SA24 010001xxx SA25 010010xxx SA26 010011xxx SA27 010100xxx SA28 010101xxx SA29 010110xxx SA30 010111xxx SA31 011000xxx SA32 011001xxx SA33 011010xxx SA34 011011xxx SA35 011000xxx SA36 011101xxx SA37 011110xxx SA55 110000xxx SA56 110001xxx SA57 110010xxx SA58 110011xxx SA59 100100xxx SA60 110101xxx SA61 110110xxx SA62 110111xxx SA63 111000xxx SA64 111001xxx SA65 111010xxx SA66 111011xxx SA67 111100xxx SA68 111101xxx SA69 111110xxx SA70 111111xxx SA10 000011xxx SA11 000100xxx SA12 000101xxx SA13 000110xxx SA14 000111xxx SA15 001000xxx SA16 001001xxx SA17 001010xxx SA18 001011xxx SA38 011111xxx SA39 100000xxx SA40 100001xxx SA41 100010xxx SA42 101011xxx SA43 100100xxx SA44 100101xxx SA45 100110xxx SA46 100111xxx SA47 101000xxx SA48 101001xxx SA49 101010xxx SA50 101011xxx SA51 101100xxx SA52 101101xxx SA53 101110xxx SA54 101111xxx 3A0000h–3AFFFFh 1D0000h–1D7FFFh 3B0000h–3BFFFFh 3C0000h–3CFFFFh 3D0000h–3DFFFFh 3E0000h–3EFFFFh 3F0000h–3FFFFFh 1D8000h–1DFFFFh 1E0000h–1E7FFFh 1E8000h–1EFFFFh 1F0000h–1F7FFFh 1F8000h–1FFFFFh * Sector sizes are given in Kbytes/Kwords. 28 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 10. S29GL064M (Model R0) Sector Addresses A22–A16 0000000 0000001 0000010 0000011 0000100 0000101 0000110 0000111 0001000 0001001 0001010 0001011 0001100 0001101 0001110 0001111 0010000 0010001 0010010 0010011 0010100 0010101 0010110 0010111 0011000 0011001 0011010 0011011 0011100 0011101 0011110 0011111 0100000 0100001 0100010 0100011 0100100 0100101 0100110 0100111 0101000 0101001 0101010 8-bit Address Range 000000–00FFFF 010000–01FFFF 020000–02FFFF 030000–03FFFF 040000–04FFFF 050000–05FFFF 060000–06FFFF 070000–07FFFF 080000–08FFFF 090000–09FFFF 0A0000–0AFFFF 0B0000–0BFFFF 0C0000–0CFFFF 0D0000–0DFFFF 0E0000–0EFFFF 0F0000–0FFFFF 100000–10FFFF 110000–11FFFF 120000–12FFFF 130000–13FFFF 140000–14FFFF 150000–15FFFF 160000–16FFFF 170000–17FFFF 180000–18FFFF 190000–19FFFF 1A0000–1AFFFF 1B0000–1BFFFF 1C0000–1CFFFF 1D0000–1DFFFF 1E0000–1EFFFF 1F0000–1FFFFF 200000–20FFFF 210000–21FFFF 220000–22FFFF 230000–23FFFF 240000–24FFFF 250000–25FFFF 260000–26FFFF 270000–27FFFF 280000–28FFFF 290000–29FFFF 2A0000–2AFFFF A22–A16 0101011 0101100 0101101 0101110 0101111 0110000 0110001 0110010 0110011 0110100 0110101 0110110 0110111 0111000 0111001 0111010 0111011 0111100 0111101 0111110 0111111 1000000 1000001 1000010 1000011 1000100 1000101 1000110 1000111 1001000 1001001 1001010 1001011 1001100 1001101 1001110 1001111 1010000 1010001 1010010 1010011 1010100 1010101 8-bit Address Range 2B0000–2BFFFF 2C0000–2CFFFF 2D0000–2DFFFF 2E0000–2EFFFF 2F0000–2FFFFF 300000–30FFFF 310000–31FFFF 320000–32FFFF 330000–33FFFF 340000–34FFFF 350000–35FFFF 360000–36FFFF 370000–37FFFF 380000–38FFFF 390000–39FFFF 3A0000–3AFFFF 3B0000–3BFFFF 3C0000–3CFFFF 3D0000–3DFFFF 3E0000–3EFFFF 3F0000–3FFFFF 400000–40FFFF 410000–41FFFF 420000–42FFFF 430000–43FFFF 440000–44FFFF 450000–45FFFF 460000–46FFFF 470000–47FFFF 480000–48FFFF 490000–49FFFF 4A0000–4AFFFF 4B0000–4BFFFF 4C0000–4CFFFF 4D0000–4DFFFF 4E0000–4EFFFF 4F0000–4FFFFF 500000–50FFFF 510000–51FFFF 520000–52FFFF 530000–53FFFF 540000–54FFFF 550000–55FFFF A22–A16 1010110 1010111 1011000 1011001 1011010 1011011 1011100 1011101 1011110 1011111 1100000 1100001 1100010 1100011 1100100 1100101 1100110 1100111 1101000 1101001 1101010 1101011 1101100 1101101 1101110 1101111 1110000 1110001 1110010 1110011 1110100 1110101 1110110 1110111 1111000 1111001 1111010 1111011 1111100 1111101 1111110 1111111 8-bit Address Range 560000–56FFFF 570000–57FFFF 580000–58FFFF 590000–59FFFF 5A0000–5AFFFF 5B0000–5BFFFF 5C0000–5CFFFF 5D0000–5DFFFF 5E0000–5EFFFF 5F0000–5FFFFF 600000–60FFFF 610000–61FFFF 620000–62FFFF 630000–63FFFF 640000–64FFFF 650000–65FFFF 660000–66FFFF 670000–67FFFF 680000–68FFFF 690000–69FFFF 6A0000–6AFFFF 6B0000–6BFFFF 6C0000–6CFFFF 6D0000–6DFFFF 6E0000–6EFFFF 6F0000–6FFFFF 700000–70FFFF 710000–71FFFF 720000–72FFFF 730000–73FFFF 740000–74FFFF 750000–75FFFF 760000–76FFFF 770000–77FFFF 780000–78FFFF 790000–79FFFF 7A0000–7AFFFF 7B0000–7BFFFF 7C0000–7CFFFF 7D0000–7DFFFF 7E0000–7EFFFF 7F0000–7FFFFF Sector Sector Sector SA86 SA87 SA88 SA89 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 SA115 SA116 SA117 SA118 SA119 SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 SA79 SA80 SA81 SA82 SA83 SA84 SA85 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 29 Data Sheet Table 11. S29GL064M (Models R1, R2, R8, R9) Sector Addresses (Sheet 1 of 3) Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 SA40 SA41 SA42 SA43 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 A21–A15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Sector Size (KB/ Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 000000–00FFFF 010000–01FFFF 020000–02FFFF 030000–03FFFF 040000–04FFFF 050000–05FFFF 060000–06FFFF 070000–07FFFF 080000–08FFFF 090000–09FFFF 0A0000–0AFFFF 0B0000–0BFFFF 0C0000–0CFFFF 0D0000–0DFFFF 0E0000–0EFFFF 0F0000–0FFFFF 100000–10FFFF 110000–11FFFF 120000–12FFFF 130000–13FFFF 140000–14FFFF 150000–15FFFF 160000–16FFFF 170000–17FFFF 180000–18FFFF 190000–19FFFF 1A0000–1AFFFF 1B0000–1BFFFF 1C0000–1CFFFF 1D0000–1DFFFF 1E0000–1EFFFF 1F0000–1FFFFF 200000–20FFFF 210000–21FFFF 220000–22FFFF 230000–23FFFF 240000–24FFFF 250000–25FFFF 260000–26FFFF 270000–27FFFF 280000–28FFFF 290000–29FFFF 2A0000–2AFFFF 2B0000–2BFFFF 8-bit Address Range 000000–007FFF 008000–00FFFF 010000–017FFF 018000–01FFFF 020000–027FFF 028000–02FFFF 030000–037FFF 038000–03FFFF 040000–047FFF 048000–04FFFF 050000–057FFF 058000–05FFFF 060000–067FFF 068000–06FFFF 070000–077FFF 078000–07FFFF 080000–087FFF 088000–08FFFF 090000–097FFF 098000–09FFFF 0A0000–0A7FFF 0A8000–0AFFFF 0B0000–0B7FFF 0B8000–0BFFFF 0C0000–0C7FFF 0C8000–0CFFFF 0D0000–0D7FFF 0D8000–0DFFFF 0E0000–0E7FFF 0E8000–0EFFFF 0F0000–0F7FFF 0F8000–0FFFFF 100000–107FFF 108000–10FFFF 110000–117FFF 118000–11FFFF 120000–127FFF 128000–12FFFF 130000–137FFF 138000–13FFFF 140000–147FFF 148000–14FFFF 150000–157FFF 158000–15FFFF 30 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 11. S29GL064M (Models R1, R2, R8, R9) Sector Addresses (Sheet 2 of 3) Sector SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 SA79 SA80 SA81 SA82 SA83 SA84 SA85 SA86 SA87 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A21–A15 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Sector Size (KB/ Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 2C0000–2CFFFF 2D0000–2DFFFF 2E0000–2EFFFF 2F0000–2FFFFF 300000–30FFFF 310000–31FFFF 320000–32FFFF 330000–33FFFF 340000–34FFFF 350000–35FFFF 360000–36FFFF 370000–37FFFF 380000–38FFFF 390000–39FFFF 3A0000–3AFFFF 3B0000–3BFFFF 3C0000–3CFFFF 3D0000–3DFFFF 3E0000–3EFFFF 3F0000–3FFFFF 400000–40FFFF 410000–41FFFF 420000–42FFFF 430000–43FFFF 440000–44FFFF 450000–45FFFF 460000–46FFFF 470000–47FFFF 480000–48FFFF 490000–49FFFF 4A0000–4AFFFF 4B0000–4BFFFF 4C0000–4CFFFF 4D0000–4DFFFF 4E0000–4EFFFF 4F0000–4FFFFF 500000–50FFFF 510000–51FFFF 520000–52FFFF 530000–53FFFF 540000–54FFFF 550000–55FFFF 560000–56FFFF 570000–57FFFF 8-bit Address Range 160000–167FFF 168000–16FFFF 170000–177FFF 178000–17FFFF 180000–187FFF 188000–18FFFF 190000–197FFF 198000–19FFFF 1A0000–1A7FFF 1A8000–1AFFFF 1B0000–1B7FFF 1B8000–1BFFFF 1C0000–1C7FFF 1C8000–1CFFFF 1D0000–1D7FFF 1D8000–1DFFFF 1E0000–1E7FFF 1E8000–1EFFFF 1F0000–1F7FFF 1F8000–1FFFFF 200000–207FFF 208000–20FFFF 210000–217FFF 218000–21FFFF 220000–227FFF 228000–22FFFF 230000–237FFF 238000–23FFFF 240000–247FFF 248000–24FFFF 250000–257FFF 258000–25FFFF 260000–267FFF 268000–26FFFF 270000–277FFF 278000–27FFFF 280000–287FFF 288000–28FFFF 290000–297FFF 298000–29FFFF 2A0000–2A7FFF 2A8000–2AFFFF 2B0000–2B7FFF 2B8000–2BFFFF October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 31 Data Sheet Table 11. S29GL064M (Models R1, R2, R8, R9) Sector Addresses (Sheet 3 of 3) Sector SA88 SA89 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 SA115 SA116 SA117 SA118 SA119 SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A21–A15 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Sector Size (KB/ Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 580000–58FFFF 590000–59FFFF 5A0000–5AFFFF 5B0000–5BFFFF 5C0000–5CFFFF 5D0000–5DFFFF 5E0000–5EFFFF 5F0000–5FFFFF 600000–60FFFF 610000–61FFFF 620000–62FFFF 630000–63FFFF 640000–64FFFF 650000–65FFFF 660000–66FFFF 670000–67FFFF 680000–68FFFF 690000–69FFFF 6A0000–6AFFFF 6B0000–6BFFFF 6C0000–6CFFFF 6D0000–6DFFFF 6E0000–6EFFFF 6F0000–6FFFFF 700000–70FFFF 710000–71FFFF 720000–72FFFF 730000–73FFFF 740000–74FFFF 750000–75FFFF 760000–76FFFF 770000–77FFFF 780000–78FFFF 790000–79FFFF 7A0000–7AFFFF 7B0000–7BFFFF 7C0000–7CFFFF 7D0000–7DFFFF 7E0000–7EFFFF 7F0000–7FFFFF 8-bit Address Range 2C0000–2C7FFF 2C8000–2CFFFF 2D0000–2D7FFF 2D8000–2DFFFF 2E0000–2E7FFF 2E8000–2EFFFF 2F0000–2F7FFF 2F8000–2FFFFF 300000–307FFF 308000–30FFFF 310000–317FFF 318000–31FFFF 320000–327FFF 328000–32FFFF 330000–337FFF 338000–33FFFF 340000–347FFF 348000–34FFFF 350000–357FFF 358000–35FFFF 360000–367FFF 368000–36FFFF 370000–377FFF 378000–37FFFF 380000–387FFF 388000–38FFFF 390000–397FFF 398000–39FFFF 3A0000–3A7FFF 3A8000–3AFFFF 3B0000–3B7FFF 3B8000–3BFFFF 3C0000–3C7FFF 3C8000–3CFFFF 3D0000–3D7FFF 3D8000–3DFFFF 3E0000–3E7FFF 3E8000–3EFFFF 3F0000–3F7FFF 3F8000–3FFFFF 32 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 12. Sector A21–A12 Sector Size* S29GL064M (Model R3) Top Boot Sector Addresses (Sheet 1 of 2) 8-bit Address Range 16-bit Address Range 00000h–07FFFh 08000h–0FFFFh 10000h–17FFFh 18000h–1FFFFh 20000h–27FFFh 28000h–2FFFFh 30000h–37FFFh 38000h–3FFFFh 40000h–47FFFh 48000h–4FFFFh 50000h–57FFFh 58000h–5FFFFh 60000h–67FFFh 68000h–6FFFFh 70000h–77FFFh 78000h–7FFFFh 80000h–87FFFh 88000h–8FFFFh 90000h–97FFFh 98000h–9FFFFh A0000h–A7FFFh A8000h–AFFFFh B0000h–B7FFFh B8000h–BFFFFh C0000h–C7FFFh C8000h–CFFFFh D0000h–D7FFFh D8000h–DFFFFh E0000h–E7FFFh E8000h–EFFFFh F0000h–F7FFFh F8000h–FFFFFh F9000h–107FFFh A21–A12 0101101xxx 0101110xxx 0101111xxx 0110000xxx 0110001xxx 0110010xxx 0110011xxx 0100100xxx 0110101xxx 0110110xxx 0110111xxx 0111000xxx 0111001xxx 0111010xxx 0111011xxx 0111100xxx 0111101xxx 0111110xxx 0111111xxx 1000000xxx 1000001xxx 1000010xxx 1000011xxx 1000100xxx 1000101xxx 1000110xxx 1000111xxx 1001000xxx 1001001xxx 1001010xxx 1001011xxx 1001100xxx 1001101xxx 1001110xxx 1001111xxx 1010000xxx 1010001xxx 1010010xxx 1010011xxx 1010100xxx 1010101xxx 1010110xxx 1010111xxx 1011000xxx 1011001xxx Sector Size* 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 16-bit Address Range Sector SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 SA79 SA80 SA81 SA82 SA83 SA84 SA85 SA86 SA87 SA88 SA89 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 SA40 SA41 SA42 SA43 SA44 0000000xxx 64/32 0000001xxx 64/32 0000010xxx 64/32 0000011xxx 64/32 0000100xxx 64/32 0000101xxx 64/32 0000110xxx 64/32 0000111xxx 64/32 0001000xxx 64/32 0001001xxx 64/32 000000h–00FFFFh 010000h–01FFFFh 020000h–02FFFFh 030000h–03FFFFh 040000h–04FFFFh 050000h–05FFFFh 060000h–06FFFFh 070000h–07FFFFh 080000h–08FFFFh 090000h–09FFFFh 2D0000h–2DFFFFh 168000h–16FFFFh 2E0000h–2EFFFFh 170000h–177FFFh 2F0000h–2FFFFFh 178000h–17FFFFh 300000h–30FFFFh 180000h–187FFFh 310000h–31FFFFh 188000h–18FFFFh 320000h–32FFFFh 190000h–197FFFh 330000h–33FFFFh 198000h–19FFFFh 340000h–34FFFFh 1A0000h–1A7FFFh 350000h–35FFFFh 1A8000h–1AFFFFh 360000h–36FFFFh 1B0000h–1B7FFFh 370000h–37FFFFh 1B8000h–1BFFFFh 380000h–38FFFFh 1C0000h–1C7FFFh 390000h–39FFFFh 1C8000h–1CFFFFh 3A0000h–3AFFFFh 1D0000h–1D7FFFh 3B0000h–3BFFFFh 1D8000h–1DFFFFh 3C0000h–3CFFFFh 1E0000h–1E7FFFh 3D0000h–3DFFFFh 1E8000h–1EFFFFh 3E0000h–3EFFFFh 3F0000h–3FFFFFh 1F0000h–1F7FFFh 1F8000h–1FFFFFh 0001010xxx 64/32 0A0000h–0AFFFFh 0001011xxx 64/32 0B0000h–0BFFFFh 0001100xxx 64/32 0C0000h–0CFFFFh 0001101xxx 64/32 0D0000h–0DFFFFh 0001101xxx 64/32 0001111xxx 64/32 0010000xxx 64/32 0010001xxx 64/32 0010010xxx 64/32 0010011xxx 64/32 0010100xxx 64/32 0010101xxx 64/32 0010110xxx 64/32 0010111xxx 64/32 0011000xxx 64/32 0011001xxx 64/32 0E0000h–0EFFFFh 0F0000h–0FFFFFh 100000h–00FFFFh 110000h–11FFFFh 120000h–12FFFFh 130000h–13FFFFh 140000h–14FFFFh 150000h–15FFFFh 160000h–16FFFFh 170000h–17FFFFh 180000h–18FFFFh 190000h–19FFFFh 400000h–40FFFFh 200000h–207FFFh 410000h–41FFFFh 208000h–20FFFFh 420000h–42FFFFh 210000h–217FFFh 430000h–43FFFFh 218000h–21FFFFh 440000h–44FFFFh 220000h–227FFFh 450000h–45FFFFh 228000h–22FFFFh 460000h–46FFFFh 230000h–237FFFh 470000h–47FFFFh 238000h–23FFFFh 480000h–48FFFFh 240000h–247FFFh 490000h–49FFFFh 248000h–24FFFFh 4A0000h–4AFFFFh 250000h–257FFFh 4B0000h–4BFFFFh 258000h–25FFFFh 4C0000h–4CFFFFh 260000h–267FFFh 4D0000h–4DFFFFh 268000h–26FFFFh 4E0000h–4EFFFFh 270000h–277FFFh 4F0000h–4FFFFFh 278000h–27FFFFh 0011010xxx 64/32 1A0000h–1AFFFFh 0011011xxx 64/32 1B0000h–1BFFFFh 0011000xxx 64/32 1C0000h–1CFFFFh 0011101xxx 64/32 1D0000h–1DFFFFh 0011110xxx 64/32 0011111xxx 64/32 0100000xxx 64/32 0100001xxx 64/32 0100010xxx 64/32 0101011xxx 64/32 0100100xxx 64/32 0100101xxx 64/32 0100110xxx 64/32 0100111xxx 64/32 0101000xxx 64/32 0101001xxx 64/32 1E0000h–1EFFFFh 1F0000h–1FFFFFh 200000h–20FFFFh 210000h–21FFFFh 108000h–10FFFFh 220000h–22FFFFh 110000h–117FFFh 230000h–23FFFFh 118000h–11FFFFh 240000h–24FFFFh 120000h–127FFFh 250000h–25FFFFh 128000h–12FFFFh 260000h–26FFFFh 130000h–137FFFh 270000h–27FFFFh 138000h–13FFFFh 280000h–28FFFFh 140000h–147FFFh 290000h–29FFFFh 148000h–14FFFFh 500000h–50FFFFh 280000h–28FFFFh 510000h–51FFFFh 288000h–28FFFFh 520000h–52FFFFh 290000h–297FFFh 530000h–53FFFFh 298000h–29FFFFh 540000h–54FFFFh 2A0000h–2A7FFFh 550000h–55FFFFh 2A8000h–2AFFFFh 560000h–56FFFFh 2B0000h–2B7FFFh 570000h–57FFFFh 2B8000h–2BFFFFh 580000h–58FFFFh 2C0000h–2C7FFFh 590000h–59FFFFh 2C8000h–2CFFFFh 0101010xxx 64/32 2A0000h–2AFFFFh 150000h–157FFFh 0101011xxx 64/32 2B0000h–2BFFFFh 158000h–15FFFFh 0101100xxx 64/32 2C0000h–2CFFFFh 160000h–167FFFh October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 33 Data Sheet Table 12. Sector A21–A12 Sector Size* S29GL064M (Model R3) Top Boot Sector Addresses (Sheet 2 of 2) 8-bit Address Range 16-bit Address Range A21–A12 1110001xxx 1110010xxx 1110011xxx 1110100xxx 1110101xxx 1110110xxx 1110111xxx 1111000xxx 1111001xxx 1111010xxx 1111011xxx 1111100xxx 1111101xxx 1111110xxx 1111111000 1111111001 1111111010 1111111011 1111111100 1111111101 1111111110 1111111111 Sector Size* 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8/4 8/4 8/4 8/4 8/4 8/4 8/4 8/4 8-bit Address Range 16-bit Address Range Sector SA113 SA114 SA115 SA116 SA117 SA118 SA119 SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 SA128 SA129 SA130 SA131 SA132 SA133 SA134 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 1011010xxx 64/32 5A0000h–5AFFFFh 2D0000h–2D7FFFh 1011011xxx 64/32 5B0000h–5BFFFFh 2D8000h–2DFFFFh 1011100xxx 64/32 5C0000h–5CFFFFh 2E0000h–2E7FFFh 1011101xxx 64/32 5D0000h–5DFFFFh 2E8000h–2EFFFFh 1011110xxx 64/32 1011111xxx 64/32 1100000xxx 64/32 1100001xxx 64/32 1100010xxx 64/32 1100011xxx 64/32 5E0000h–5EFFFFh 5F0000h–5FFFFFh 2F0000h–2FFFFFh 2F8000h–2FFFFFh 710000h–71FFFFh 388000h–38FFFFh 720000h–72FFFFh 390000h–397FFFh 730000h–73FFFFh 398000h–39FFFFh 740000h–74FFFFh 3A0000h–3A7FFFh 750000h–75FFFFh 3A8000h–3AFFFFh 760000h–76FFFFh 3B0000h–3B7FFFh 770000h–77FFFFh 3B8000h–3BFFFFh 780000h–78FFFFh 3C0000h–3C7FFFh 790000h–79FFFFh 3C8000h–3CFFFFh 7A0000h–7AFFFFh 3D0000h–3D7FFFh 7B0000h–7BFFFFh 3D8000h–3DFFFFh 7C0000h–7CFFFFh 3E0000h–3E7FFFh 7D0000h–7DFFFFh 3E8000h–3EFFFFh 7E0000h–7EFFFFh 7F0000h–7F1FFFh 7F2000h–7F3FFFh 7F4000h–7F5FFFh 3F0000h–3F7FFFh 3F8000h–3F8FFFh 3F9000h–3F9FFFh 3FA000h–3FAFFFh 600000h–60FFFFh 300000h–307FFFh 610000h–61FFFFh 308000h–30FFFFh 620000h–62FFFFh 310000h–317FFFh 630000h–63FFFFh 318000h–31FFFFh 640000h–64FFFFh 320000h–327FFFh 650000h–65FFFFh 328000h–32FFFFh 660000h–66FFFFh 330000h–337FFFh 670000h–67FFFFh 338000h–33FFFFh 680000h–68FFFFh 340000h–347FFFh 690000h–69FFFFh 348000h–34FFFFh SA100 1100100xxx 64/32 SA101 1100101xxx 64/32 SA102 1100110xxx 64/32 SA103 1100111xxx 64/32 SA104 1101000xxx 64/32 SA105 1101001xxx 64/32 SA106 1101010xxx 64/32 6A0000h–6AFFFFh 350000h–357FFFh SA107 1101011xxx 64/32 6B0000h–6BFFFFh 358000h–35FFFFh SA108 1101100xxx 64/32 6C0000h–6CFFFFh 360000h–367FFFh SA109 1101101xxx 64/32 6D0000h–6DFFFFh 368000h–36FFFFh SA110 1101110xxx 64/32 SA111 1101111xxx 64/32 SA112 1110000xxx 64/32 6E0000h–6EFFFFh 370000h–377FFFh 6F0000h–6FFFFFh 378000h–37FFFFh 7F6000h–7F7FFFh 3FB000h–3FBFFFh 7F8000h–7F9FFFh 3FC000h–3FCFFFh 7FA000h–7FBFFFh 3FD000h–3FDFFFh 7FC000h–7FDFFFh 3FE000h–3FEFFFh 7FE000h–7FFFFFh 3FF000h–3FFFFFh 700000h–70FFFFh 380000h–387FFFh * Sector sizes are given in Kbytes/Kwords. 34 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 13. S29GL064M (Model R4) Bottom Boot Sector Addresses (Sheet 1 of 2) A21–A12 0000000000 0000000001 0000000010 0000000011 0000000100 0000000101 0000000110 0000000111 0000001xxx 0000010xxx 0000011xxx 0000100xxx 0000101xxx 0000110xxx 0000111xxx 0001000xxx 0001001xxx 0001010xxx 0001011xxx 0001100xxx 0001101xxx 0001101xxx 0001111xxx 0010000xxx 0010001xxx 0010010xxx 0010011xxx 0010100xxx 0010101xxx 0010110xxx 0010111xxx 0011000xxx 0011001xxx 0011010xxx 0011011xxx 0011000xxx 0011101xxx 0011110xxx 0011111xxx 0100000xxx 0100001xxx 0100010xxx 0101011xxx 0100100xxx 0100101xxx Sector Size* 8/4 8/4 8/4 8/4 8/4 8/4 8/4 8/4 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 000000h–001FFFh 002000h–003FFFh 004000h–005FFFh 006000h–007FFFh 008000h–009FFFh 00A000h–00BFFFh 00C000h–00DFFFh 00E000h–00FFFFFh 010000h–01FFFFh 020000h–02FFFFh 030000h–03FFFFh 040000h–04FFFFh 050000h–05FFFFh 060000h–06FFFFh 070000h–07FFFFh 080000h–08FFFFh 090000h–09FFFFh 0A0000h–0AFFFFh 0B0000h–0BFFFFh 0C0000h–0CFFFFh 0D0000h–0DFFFFh 0E0000h–0EFFFFh 0F0000h–0FFFFFh 100000h–00FFFFh 110000h–11FFFFh 120000h–12FFFFh 130000h–13FFFFh 140000h–14FFFFh 150000h–15FFFFh 160000h–16FFFFh 170000h–17FFFFh 180000h–18FFFFh 190000h–19FFFFh 1A0000h–1AFFFFh 1B0000h–1BFFFFh 1C0000h–1CFFFFh 1D0000h–1DFFFFh 1E0000h–1EFFFFh 1F0000h–1FFFFFh 200000h–20FFFFh 210000h–21FFFFh 220000h–22FFFFh 230000h–23FFFFh 240000h–24FFFFh 250000h–25FFFFh 16-bit Address Range 00000h–00FFFh 01000h–01FFFh 02000h–02FFFh 03000h–03FFFh 04000h–04FFFh 05000h–05FFFh 06000h–06FFFh 07000h–07FFFh 08000h–0FFFFh 10000h–17FFFh 18000h–1FFFFh 20000h–27FFFh 28000h–2FFFFh 30000h–37FFFh 38000h–3FFFFh 40000h–47FFFh 48000h–4FFFFh 50000h–57FFFh 58000h–5FFFFh 60000h–67FFFh 68000h–6FFFFh 70000h–77FFFh 78000h–7FFFFh 80000h–87FFFh 88000h–8FFFFh 90000h–97FFFh 98000h–9FFFFh A0000h–A7FFFh A8000h–AFFFFh B0000h–B7FFFh B8000h–BFFFFh C0000h–C7FFFh C8000h–CFFFFh D0000h–D7FFFh D8000h–DFFFFh E0000h–E7FFFh E8000h–EFFFFh F0000h–F7FFFh F8000h–FFFFFh F9000h–107FFFh 108000h–10FFFFh 110000h–117FFFh 118000h–11FFFFh 120000h–127FFFh 128000h–12FFFFh A21–A12 0100110xxx 0100111xxx 0101000xxx 0101001xxx 0101010xxx 0101011xxx 0101100xxx 0101101xxx 0101110xxx 0101111xxx 0110000xxx 0110001xxx 0110010xxx 0110011xxx 0100100xxx 0110101xxx 0110110xxx 0110111xxx 0111000xxx 0111001xxx 0111010xxx 0111011xxx 0111100xxx 0111101xxx 0111110xxx 0111111xxx 1000000xxx 1000001xxx 1000010xxx 1000011xxx 1000100xxx 1000101xxx 1000110xxx 1000111xxx 1001000xxx 1001001xxx 1001010xxx 1001011xxx 1001100xxx 1001101xxx 1001110xxx 1001111xxx 1010000xxx 1010001xxx 1010010xxx Sector Size* 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 260000h–26FFFFh 270000h–27FFFFh 280000h–28FFFFh 290000h–29FFFFh 2A0000h–2AFFFFh 2B0000h–2BFFFFh 2C0000h–2CFFFFh 2D0000h–2DFFFFh 2E0000h–2EFFFFh 2F0000h–2FFFFFh 300000h–30FFFFh 310000h–31FFFFh 320000h–32FFFFh 330000h–33FFFFh 340000h–34FFFFh 350000h–35FFFFh 360000h–36FFFFh 370000h–37FFFFh 380000h–38FFFFh 390000h–39FFFFh 3A0000h–3AFFFFh 3B0000h–3BFFFFh 3C0000h–3CFFFFh 3D0000h–3DFFFFh 3E0000h–3EFFFFh 3F0000h–3FFFFFh 400000h–40FFFFh 410000h–41FFFFh 420000h–42FFFFh 430000h–43FFFFh 440000h–44FFFFh 450000h–45FFFFh 460000h–46FFFFh 470000h–47FFFFh 480000h–48FFFFh 490000h–49FFFFh 4A0000h–4AFFFFh 4B0000h–4BFFFFh 4C0000h–4CFFFFh 4D0000h–4DFFFFh 4E0000h–4EFFFFh 4F0000h–4FFFFFh 500000h–50FFFFh 510000h–51FFFFh 520000h–52FFFFh 16-bit Address Range 130000h–137FFFh 138000h–13FFFFh 140000h–147FFFh 148000h–14FFFFh 150000h–157FFFh 158000h–15FFFFh 160000h–167FFFh 168000h–16FFFFh 170000h–177FFFh 178000h–17FFFFh 180000h–187FFFh 188000h–18FFFFh 190000h–197FFFh 198000h–19FFFFh 1A0000h–1A7FFFh 1A8000h–1AFFFFh 1B0000h–1B7FFFh 1B8000h–1BFFFFh 1C0000h–1C7FFFh 1C8000h–1CFFFFh 1D0000h–1D7FFFh 1D8000h–1DFFFFh 1E0000h–1E7FFFh 1E8000h–1EFFFFh 1F0000h–1F7FFFh 1F8000h–1FFFFFh 200000h–207FFFh 208000h–20FFFFh 210000h–217FFFh 218000h–21FFFFh 220000h–227FFFh 228000h–22FFFFh 230000h–237FFFh 238000h–23FFFFh 240000h–247FFFh 248000h–24FFFFh 250000h–257FFFh 258000h–25FFFFh 260000h–267FFFh 268000h–26FFFFh 270000h–277FFFh 278000h–27FFFFh 280000h–28FFFFh 288000h–28FFFFh 290000h–297FFFh Sector Sector SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 SA79 SA80 SA81 SA82 SA83 SA84 SA85 SA86 SA87 SA88 SA89 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 SA40 SA41 SA42 SA43 SA44 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 35 Data Sheet Table 13. Sector A21–A12 1010011xxx 1010100xxx 1010101xxx 1010110xxx 1010111xxx 1011000xxx 1011001xxx 1011010xxx 1011011xxx 1011100xxx 1011101xxx 1011110xxx 1011111xxx 1100000xxx 1100001xxx 1100010xxx 1100011xxx 1100100xxx 1100101xxx 1100110xxx 1100111xxx 1101000xxx 1101001xxx Sector Size* 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 S29GL064M (Model R4) Bottom Boot Sector Addresses (Sheet 2 of 2) 8-bit Address Range 530000h–53FFFFh 540000h–54FFFFh 550000h–55FFFFh 560000h–56FFFFh 570000h–57FFFFh 580000h–58FFFFh 590000h–59FFFFh 5A0000h–5AFFFFh 5B0000h–5BFFFFh 5C0000h–5CFFFFh 5D0000h–5DFFFFh 5E0000h–5EFFFFh 5F0000h–5FFFFFh 600000h–60FFFFh 610000h–61FFFFh 620000h–62FFFFh 630000h–63FFFFh 640000h–64FFFFh 650000h–65FFFFh 660000h–66FFFFh 670000h–67FFFFh 680000h–68FFFFh 690000h–69FFFFh 16-bit Address Range 298000h–29FFFFh 2A0000h–2A7FFFh 2A8000h–2AFFFFh 2B0000h–2B7FFFh 2B8000h–2BFFFFh 2C0000h–2C7FFFh 2C8000h–2CFFFFh 2D0000h–2D7FFFh 2D8000h–2DFFFFh 2E0000h–2E7FFFh 2E8000h–2EFFFFh 2F0000h–2FFFFFh 2F8000h–2FFFFFh 300000h–307FFFh 308000h–30FFFFh 310000h–317FFFh 318000h–31FFFFh 320000h–327FFFh 328000h–32FFFFh 330000h–337FFFh 338000h–33FFFFh 340000h–347FFFh 348000h–34FFFFh A21–A12 1101010xxx 1101011xxx 1101100xxx 1101101xxx 1101110xxx 1101111xxx 1110000xxx 1110001xxx 1110010xxx 1110011xxx 1110100xxx 1110101xxx 1110110xxx 1110111xxx 1111000xxx 1111001xxx 1111010xxx 1111011xxx 1111100xxx 1111101xxx 1111110xxx 1111111000 Sector Size* 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8-bit Address Range 6A0000h–6AFFFFh 6B0000h–6BFFFFh 6C0000h–6CFFFFh 6D0000h–6DFFFFh 6E0000h–6EFFFFh 6F0000h–6FFFFFh 700000h–70FFFFh 710000h–71FFFFh 720000h–72FFFFh 730000h–73FFFFh 740000h–74FFFFh 750000h–75FFFFh 760000h–76FFFFh 770000h–77FFFFh 780000h–78FFFFh 790000h–79FFFFh 7A0000h–7AFFFFh 7B0000h–7BFFFFh 7C0000h–7CFFFFh 7D0000h–7DFFFFh 7E0000h–7EFFFFh 7F0000h–7FFFFFh 16-bit Address Range 350000h–357FFFh 358000h–35FFFFh 360000h–367FFFh 368000h–36FFFFh 370000h–377FFFh 378000h–37FFFFh 380000h–387FFFh 388000h–38FFFFh 390000h–397FFFh 398000h–39FFFFh 3A0000h–3A7FFFh 3A8000h–3AFFFFh 3B0000h–3B7FFFh 3B8000h–3BFFFFh 3C0000h–3C7FFFh 3C8000h–3CFFFFh 3D0000h–3D7FFFh 3D8000h–3DFFFFh 3E0000h–3E7FFFh 3E8000h–3EFFFFh 3F0000h–3F7FFFh 3F8000h–3FFFFFh Sector SA113 SA114 SA115 SA116 SA117 SA118 SA119 SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 SA128 SA129 SA130 SA131 SA132 SA133 SA134 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 * Sector sizes are given in Kbytes/Kwords. 36 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 14. A21–A15 0000000 0000001 0000010 0000011 0000100 0000101 0000110 0000111 0001000 0001001 16-bit Address Range 000000–007FFF 008000–00FFFF 010000–017FFF 018000–01FFFF 020000–027FFF 028000–02FFFF 030000–037FFF 038000–03FFFF 040000–047FFF 048000–04FFFF 050000–057FFF 058000–05FFFF 060000–067FFF 068000–06FFFF 070000–077FFF 078000–07FFFF 080000–087FFF 088000–08FFFF 090000–097FFF 098000–09FFFF 0A0000–0A7FFF 0A8000–0AFFFF 0B0000–0B7FFF 0B8000–0BFFFF 0C0000–0C7FFF 0C8000–0CFFFF 0D0000–0D7FFF 0D8000–0DFFFF 0E0000–0E7FFF 0E8000–0EFFFF 0F0000–0F7FFF 0F8000–0FFFFF 100000–107FFF 108000–10FFFF 110000–117FFF 118000–11FFFF 120000–127FFF 128000–12FFFF 130000–137FFF 138000–13FFFF 140000–147FFF 148000–14FFFF 150000–157FFF Sector S29GL064M (Model R5, R6, R7) Sector Addresses A21–A15 16-bit Address Range 158000–15FFFF 160000–167FFF 168000–16FFFF 170000–177FFF 178000–17FFFF 180000–187FFF 188000–18FFFF 190000–197FFF 198000–19FFFF 1A0000–1A7FFF 1A8000–1AFFFF 1B0000–1B7FFF 1B8000–1BFFFF 1C0000–1C7FFF 1C8000–1CFFFF 1D0000–1D7FFF 1D8000–1DFFFF 1E0000–1E7FFF 1E8000–1EFFFF 1F0000–1F7FFF 1F8000–1FFFFF 200000–207FFF 208000–20FFFF 210000–217FFF 218000–21FFFF 220000–227FFF 228000–22FFFF 230000–237FFF 238000–23FFFF 240000–247FFF 248000–24FFFF 250000–257FFF 258000–25FFFF 260000–267FFF 268000–26FFFF 270000–277FFF 278000–27FFFF 280000–287FFF 288000–28FFFF 290000–297FFF 298000–29FFFF 2A0000–2A7FFF 2A8000–2AFFFF A21–A15 1010110 1010111 1011000 1011001 1011010 1011011 1011100 1011101 1011110 1011111 1100000 1100001 1100010 1100011 1100100 1100101 1100110 1100111 1101000 1101001 1101010 1101011 1101100 1101101 1101110 1101111 1110000 1110001 1110010 1110011 1110100 1110101 1110110 1110111 1111000 1111001 1111010 1111011 1111100 1111101 1111110 1111111 16-bit Address Range 2B0000–2B7FFF 2B8000–2BFFFF 2C0000–2C7FFF 2C8000–2CFFFF 2D0000–2D7FFF 2D8000–2DFFFF 2E0000–2E7FFF 2E8000–2EFFFF 2F0000–2F7FFF 2F8000–2FFFFF 300000–307FFF 308000–30FFFF 310000–317FFF 318000–31FFFF 320000–327FFF 328000–32FFFF 330000–337FFF 338000–33FFFF 340000–347FFF 348000–34FFFF 350000–357FFF 358000–35FFFF 360000–367FFF 368000–36FFFF 370000–377FFF 378000–37FFFF 380000–387FFF 388000–38FFFF 390000–397FFF 398000–39FFFF 3A0000–3A7FFF 3A8000–3AFFFF 3B0000–3B7FFF 3B8000–3BFFFF 3C0000–3C7FFF 3C8000–3CFFFF 3D0000–3D7FFF 3D8000–3DFFFF 3E0000–3E7FFF 3E8000–3EFFFF 3F0000–3F7FFF 3F8000–3FFFFF Sector Sector SA86 SA87 SA88 SA89 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 SA115 SA116 SA117 SA118 SA119 SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA43 0 1 0 1 0 1 1 SA44 0 1 0 1 1 0 0 SA45 0 1 0 1 1 0 1 SA46 0 1 0 1 1 1 0 SA47 0 1 0 1 1 1 1 SA48 0 1 1 0 0 0 0 SA49 0 1 1 0 0 0 1 SA50 0 1 1 0 0 1 0 SA51 0 1 1 0 0 1 1 SA52 0 1 1 0 1 0 0 SA53 0 1 1 0 1 0 1 SA54 0 1 1 0 1 1 0 SA55 0 1 1 0 1 1 1 SA56 0 1 1 1 0 0 0 SA57 0 1 1 1 0 0 1 SA58 0 1 1 1 0 1 0 SA59 0 1 1 1 0 1 1 SA60 0 1 1 1 1 0 0 SA61 0 1 1 1 1 0 1 SA62 0 1 1 1 1 1 0 SA63 0 1 1 1 1 1 1 SA64 1 0 0 0 0 0 0 SA65 1 0 0 0 0 0 1 SA66 1 0 0 0 0 1 0 SA67 1 0 0 0 0 1 1 SA68 1 0 0 0 1 0 0 SA69 1 0 0 0 1 0 1 SA70 1 0 0 0 1 1 0 SA71 1 0 0 0 1 1 1 SA72 1 0 0 1 0 0 0 SA73 1 0 0 1 0 0 1 SA74 1 0 0 1 0 1 0 SA75 1 0 0 1 0 1 1 SA76 1 0 0 1 1 0 0 SA77 1 0 0 1 1 0 1 SA78 1 0 0 1 1 1 0 SA79 1 0 0 1 1 1 1 SA80 1 0 1 0 0 0 0 SA81 1 0 1 0 0 0 1 SA82 1 0 1 0 0 1 0 SA83 1 0 1 0 0 1 1 SA84 1 0 1 0 1 0 0 SA85 1 0 1 0 1 0 1 SA10 0 0 0 1 0 1 0 SA11 0 0 0 1 0 1 1 SA12 0 0 0 1 1 0 0 SA13 0 0 0 1 1 0 1 SA14 0 0 0 1 1 1 0 SA15 0 0 0 1 1 1 1 SA16 0 0 1 0 0 0 0 SA17 0 0 1 0 0 0 1 SA18 0 0 1 0 0 1 0 SA19 0 0 1 0 0 1 1 SA20 0 0 1 0 1 0 0 SA21 0 0 1 0 1 0 1 SA22 0 0 1 0 1 1 0 SA23 0 0 1 0 1 1 1 SA24 0 0 1 1 0 0 0 SA25 0 0 1 1 0 0 1 SA26 0 0 1 1 0 1 0 SA27 0 0 1 1 0 1 1 SA28 0 0 1 1 1 0 0 SA29 0 0 1 1 1 0 1 SA30 0 0 1 1 1 1 0 SA31 0 0 1 1 1 1 1 SA32 0 1 0 0 0 0 0 SA33 0 1 0 0 0 0 1 SA34 0 1 0 0 0 1 0 SA35 0 1 0 0 0 1 1 SA36 0 1 0 0 1 0 0 SA37 0 1 0 0 1 0 1 SA38 0 1 0 0 1 1 0 SA39 0 1 0 0 1 1 1 SA40 0 1 0 1 0 0 0 SA41 0 1 0 1 0 0 1 SA42 0 1 0 1 0 1 0 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 37 Data Sheet Table 15. Sector A22–A15 Sector Size* 8-bit Address Range S29GL128M Sector Address Table (Sheet 1 of 3) Sector 16-bit Address Range 000000–007FFF 008000–00FFFF 010000–017FFF 018000–01FFFF 020000–027FFF 028000–02FFFF 030000–037FFF 038000–03FFFF 040000–047FFF 048000–04FFFF 050000–057FFF 058000–05FFFF 060000–067FFF 068000–06FFFF 070000–077FFF 078000–07FFFF 080000–087FFF 088000–08FFFF 090000–097FFF 098000–09FFFF 0A0000–0A7FFF 0A8000–0AFFFF 0B0000–0B7FFF 0B8000–0BFFFF 0C0000–0C7FFF 0C8000–0CFFFF 0D0000–0D7FFF 0D8000–0DFFFF 0E0000–0E7FFF 0E8000–0EFFFF 0F0000–0F7FFF 0F8000–0FFFFF 100000–107FFF 108000–10FFFF 110000–117FFF 118000–11FFFF 120000–127FFF 128000–12FFFF 130000–137FFF 138000–13FFFF 140000–147FFF A22–A15 Sector Size* 8-bit Address Range 290000–29FFFF 2A0000–2AFFFF 2B0000–2BFFFF 2C0000–2CFFFF 2D0000–2DFFFF 2E0000–2EFFFF 2F0000–2FFFFF 300000–30FFFF 310000–31FFFF 320000–32FFFF 330000–33FFFF 340000–34FFFF 350000–35FFFF 360000–36FFFF 370000–37FFFF 380000–38FFFF 390000–39FFFF 3A0000–3AFFFF 3B0000–3BFFFF 3C0000–3CFFFF 3D0000–3DFFFF 3E0000–3EFFFF 3F0000–3FFFFF 400000–40FFFF 410000–41FFFF 420000–42FFFF 430000–43FFFF 440000–44FFFF 450000–45FFFF 460000–46FFFF 470000–47FFFF 480000–48FFFF 490000–49FFFF 4A0000–4AFFFF 4B0000–4BFFFF 4C0000–4CFFFF 4D0000–4DFFFF 4E0000–4EFFFF 4F0000–4FFFFF 500000–50FFFF 510000–51FFFF 16-bit Address Range 148000–14FFFF 150000–157FFF 158000–15FFFF 160000–167FFF 168000–16FFFF 170000–177FFF 178000–17FFFF 180000–187FFF 188000–18FFFF 190000–197FFF 198000–19FFFF 1A0000–1A7FFF 1A8000–1AFFFF 1B0000–1B7FFF 1B8000–1BFFFF 1C0000–1C7FFF 1C8000–1CFFFF 1D0000–1D7FFF 1D8000–1DFFFF 1E0000–1E7FFF 1E8000–1EFFFF 1F0000–1F7FFF 1F8000–1FFFFF 200000–207FFF 208000–20FFFF 210000–217FFF 218000–21FFFF 220000–227FFF 228000–22FFFF 230000–237FFF 238000–23FFFF 240000–247FFF 248000–24FFFF 250000–257FFF 258000–25FFFF 260000–267FFF 268000–26FFFF 270000–277FFF 278000–27FFFF 280000–287FFF 288000–28FFFF SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 0 0 0 0 0 0 0 0 64/32 0 0 0 0 0 0 0 1 64/32 0 0 0 0 0 0 1 0 64/32 0 0 0 0 0 0 1 1 64/32 0 0 0 0 0 1 0 0 64/32 0 0 0 0 0 1 0 1 64/32 0 0 0 0 0 1 1 0 64/32 0 0 0 0 0 1 1 1 64/32 0 0 0 0 1 0 0 0 64/32 0 0 0 0 1 0 0 1 64/32 000000–00FFFF 010000–01FFFF 020000–02FFFF 030000–03FFFF 040000–04FFFF 050000–05FFFF 060000–06FFFF 070000–07FFFF 080000–08FFFF 090000–09FFFF 0A0000–0AFFFF 0B0000–0BFFFF 0C0000–0CFFFF 0D0000–0DFFFF 0E0000–0EFFFF 0F0000–0FFFFF 100000–10FFFF 110000–11FFFF 120000–12FFFF 130000–13FFFF 140000–14FFFF 150000–15FFFF 160000–16FFFF 170000–17FFFF 180000–18FFFF 190000–19FFFF 1A0000–1AFFFF 1B0000–1BFFFF 1C0000–1CFFFF 1D0000–1DFFFF 1E0000–1EFFFF 1F0000–1FFFFF 200000–20FFFF 210000–21FFFF 220000–22FFFF 230000–23FFFF 240000–24FFFF 250000–25FFFF 260000–26FFFF 270000–27FFFF 280000–28FFFF SA41 0 0 1 0 1 0 0 1 64/32 SA42 0 0 1 0 1 0 1 0 64/32 SA43 0 0 1 0 1 0 1 1 64/32 SA44 0 0 1 0 1 1 0 0 64/32 SA45 0 0 1 0 1 1 0 1 64/32 SA46 0 0 1 0 1 1 1 0 64/32 SA47 0 0 1 0 1 1 1 1 64/32 SA48 0 0 1 1 0 0 0 0 64/32 SA49 0 0 1 1 0 0 0 1 64/32 SA50 0 0 1 1 0 0 1 0 64/32 SA51 0 0 1 1 0 0 1 1 64/32 SA52 0 0 1 1 0 1 0 0 64/32 SA53 0 0 1 1 0 1 0 1 64/32 SA54 0 0 1 1 0 1 1 0 64/32 SA55 0 0 1 1 0 1 1 1 64/32 SA56 0 0 1 1 1 0 0 0 64/32 SA57 0 0 1 1 1 0 0 1 64/32 SA58 0 0 1 1 1 0 1 0 64/32 SA59 0 0 1 1 1 0 1 1 64/32 SA60 0 0 1 1 1 1 0 0 64/32 SA61 0 0 1 1 1 1 0 1 64/32 SA62 0 0 1 1 1 1 1 0 64/32 SA63 0 0 1 1 1 1 1 1 64/32 SA64 0 1 0 0 0 0 0 0 64/32 SA65 0 1 0 0 0 0 0 1 64/32 SA66 0 1 0 0 0 0 1 0 64/32 SA67 0 1 0 0 0 0 1 1 64/32 SA68 0 1 0 0 0 1 0 0 64/32 SA69 0 1 0 0 0 1 0 1 64/32 SA70 0 1 0 0 0 1 1 0 64/32 SA71 0 1 0 0 0 1 1 1 64/32 SA72 0 1 0 0 1 0 0 0 64/32 SA73 0 1 0 0 1 0 0 1 64/32 SA74 0 1 0 0 1 0 1 0 64/32 SA75 0 1 0 0 1 0 1 1 64/32 SA76 0 1 0 0 1 1 0 0 64/32 SA77 0 1 0 0 1 1 0 1 64/32 SA78 0 1 0 0 1 1 1 0 64/32 SA79 0 1 0 0 1 1 1 1 64/32 SA80 0 1 0 1 0 0 0 0 64/32 SA81 0 1 0 1 0 0 0 1 64/32 SA10 0 0 0 0 1 0 1 0 64/32 SA11 0 0 0 0 1 0 1 1 64/32 SA12 0 0 0 0 1 1 0 0 64/32 SA13 0 0 0 0 1 1 0 1 64/32 SA14 0 0 0 0 1 1 1 0 64/32 SA15 0 0 0 0 1 1 1 1 64/32 SA16 0 0 0 1 0 0 0 0 64/32 SA17 0 0 0 1 0 0 0 1 64/32 SA18 0 0 0 1 0 0 1 0 64/32 SA19 0 0 0 1 0 0 1 1 64/32 SA20 0 0 0 1 0 1 0 0 64/32 SA21 0 0 0 1 0 1 0 1 64/32 SA22 0 0 0 1 0 1 1 0 64/32 SA23 0 0 0 1 0 1 1 1 64/32 SA24 0 0 0 1 1 0 0 0 64/32 SA25 0 0 0 1 1 0 0 1 64/32 SA26 0 0 0 1 1 0 1 0 64/32 SA27 0 0 0 1 1 0 1 1 64/32 SA28 0 0 0 1 1 1 0 0 64/32 SA29 0 0 0 1 1 1 0 1 64/32 SA30 0 0 0 1 1 1 1 0 64/32 SA31 0 0 0 1 1 1 1 1 64/32 SA32 0 0 1 0 0 0 0 0 64/32 SA33 0 0 1 0 0 0 0 1 64/32 SA34 0 0 1 0 0 0 1 0 64/32 SA35 0 0 1 0 0 0 1 1 64/32 SA36 0 0 1 0 0 1 0 0 64/32 SA37 0 0 1 0 0 1 0 1 64/32 SA38 0 0 1 0 0 1 1 0 64/32 SA39 0 0 1 0 0 1 1 1 64/32 SA40 0 0 1 0 1 0 0 0 64/32 38 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 15. Sector A22–A15 Sector Size* 8-bit Address Range S29GL128M Sector Address Table (Sheet 2 of 3) Sector 16-bit Address Range 290000–297FFF 298000–29FFFF 2A0000–2A7FFF 2A8000–2AFFFF 2B0000–2B7FFF 2B8000–2BFFFF 2C0000–2C7FFF 2C8000–2CFFFF 2D0000–2D7FFF 2D8000–2DFFFF 2E0000–2E7FFF 2E8000–2EFFFF 2F0000–2F7FFF 2F8000–2FFFFF 300000–307FFF 308000–30FFFF 310000–317FFF 210000–217FFF 218000–21FFFF 440000–447FFF 448000–44FFFF 450000–457FFF 458000–45FFFF 460000–467FFF 468000–46FFFF 470000–477FFF 478000–47FFFF 480000–487FFF 488000–48FFFF 490000–497FFF 498000–49FFFF 4A0000–4A7FFF 4A8000–4AFFFF 4B0000–4B7FFF 4B8000–4BFFFF 4C0000–4C7FFF 4C8000–4CFFFF 4D0000–4D7FFF 4D8000–4DFFFF 4E0000–4E7FFF 4E8000–4EFFFF A22–A15 Sector Size* 8-bit Address Range 9E0000–9EFFFF 9F0000–9FFFFF A00000–A0FFFF A10000–A1FFFF A20000–A2FFFF A30000–A3FFFF A40000–A4FFFF A50000–A5FFFF A60000–A6FFFF A70000–A7FFFF A80000–A8FFFF A90000–A9FFFF AA0000–AAFFFF AB0000–ABFFFF AC0000–ACFFFF AD0000–ADFFFF AE0000–AEFFFF AF0000–AFFFFF B00000–B0FFFF B10000–B1FFFF B20000–B2FFFF B30000–B3FFFF B40000–B4FFFF B50000–B5FFFF B60000–B6FFFF B70000–B7FFFF B80000–B8FFFF B90000–B9FFFF BA0000–BAFFFF BB0000–BBFFFF BC0000–BCFFFF BD0000–BDFFFF BE0000–BEFFFF BF0000–BFFFFF C00000–C0FFFF C10000–C1FFFF C20000–C2FFFF C30000–C3FFFF C40000–C4FFFF C50000–C5FFFF C60000–C6FFFF 16-bit Address Range 4F0000–4F7FFF 4F8000–4FFFFF 500000–507FFF 508000–50FFFF 510000–517FFF 518000–51FFFF 520000–527FFF 528000–52FFFF 530000–537FFF 538000–53FFFF 540000–547FFF 548000–54FFFF 550000–557FFF 558000–55FFFF 560000–567FFF 568000–56FFFF 570000–577FFF 578000–57FFFF 580000–587FFF 588000–58FFFF 590000–597FFF 598000–59FFFF 5A0000–5A7FFF 5A8000–5AFFFF 5B0000–5B7FFF 5B8000–5BFFFF 5C0000–5C7FFF 5C8000–5CFFFF 5D0000–5D7FFF 5D8000–5DFFFF 5E0000–5E7FFF 5E8000–5EFFFF 5F0000–5F7FFF 5F8000–5FFFFF 600000–607FFF 608000–60FFFF 610000–617FFF 618000–61FFFF 620000–627FFF 628000–62FFFF 630000–637FFF SA82 0 1 0 1 0 0 1 0 64/32 SA83 0 1 0 1 0 0 1 1 64/32 SA84 0 1 0 1 0 1 0 0 64/32 SA85 0 1 0 1 0 1 0 1 64/32 SA86 0 1 0 1 0 1 1 0 64/32 SA87 0 1 0 1 0 1 1 1 64/32 SA88 0 1 0 1 1 0 0 0 64/32 SA89 0 1 0 1 1 0 0 1 64/32 SA90 0 1 0 1 1 0 1 0 64/32 SA91 0 1 0 1 1 0 1 1 64/32 SA92 0 1 0 1 1 1 0 0 64/32 SA93 0 1 0 1 1 1 0 1 64/32 SA94 0 1 0 1 1 1 1 0 64/32 SA95 0 1 0 1 1 1 1 1 64/32 SA96 0 1 1 0 0 0 0 0 64/32 SA97 0 1 1 0 0 0 0 1 64/32 SA98 0 1 1 0 0 0 1 0 64/32 SA66 0 1 0 0 0 0 1 0 64/32 SA67 0 1 0 0 0 0 1 1 64/32 SA136 1 0 0 0 1 0 0 0 64/32 SA137 1 0 0 0 1 0 0 1 64/32 SA138 1 0 0 0 1 0 1 0 64/32 SA139 1 0 0 0 1 0 1 1 64/32 SA140 1 0 0 0 1 1 0 0 64/32 SA141 1 0 0 0 1 1 0 1 64/32 SA142 1 0 0 0 1 1 1 0 64/32 SA143 1 0 0 0 1 1 1 1 64/32 SA144 1 0 0 1 0 0 0 0 64/32 SA145 1 0 0 1 0 0 0 1 64/32 SA146 1 0 0 1 0 0 1 0 64/32 SA147 1 0 0 1 0 0 1 1 64/32 SA148 1 0 0 1 0 1 0 0 64/32 SA149 1 0 0 1 0 1 0 1 64/32 SA150 1 0 0 1 0 1 1 0 64/32 SA151 1 0 0 1 0 1 1 1 64/32 SA152 1 0 0 1 1 0 0 0 64/32 SA153 1 0 0 1 1 0 0 1 64/32 SA154 1 0 0 1 1 0 1 0 64/32 SA155 1 0 0 1 1 0 1 1 64/32 SA156 1 0 0 1 1 1 0 0 64/32 SA157 1 0 0 1 1 1 0 1 64/32 520000–52FFFF 530000–53FFFF 540000–54FFFF 550000–55FFFF 560000–56FFFF 570000–57FFFF 580000–58FFFF 590000–59FFFF 5A0000–5AFFFF 5B0000–5BFFFF 5C0000–5CFFFF 5D0000–5DFFFF 5E0000–5EFFFF 5F0000–5FFFFF 600000–60FFFF 610000–61FFFF 620000–62FFFF 420000–42FFFF 430000–43FFFF 880000–88FFFF 890000–89FFFF 8A0000–8AFFFF 8B0000–8BFFFF 8C0000–8CFFFF 8D0000–8DFFFF 8E0000–8EFFFF 8F0000–8FFFFF 900000–90FFFF 910000–91FFFF 920000–92FFFF 930000–93FFFF 940000–94FFFF 950000–95FFFF 960000–96FFFF 970000–97FFFF 980000–98FFFF 990000–99FFFF 9A0000–9AFFFF 9B0000–9BFFFF 9C0000–9CFFFF 9D0000–9DFFFF SA158 1 0 0 1 1 1 1 0 64/32 SA159 1 0 0 1 1 1 1 1 64/32 SA160 1 0 1 0 0 0 0 0 64/32 SA161 1 0 1 0 0 0 0 1 64/32 SA162 1 0 1 0 0 0 1 0 64/32 SA163 1 0 1 0 0 0 1 1 64/32 SA164 1 0 1 0 0 1 0 0 64/32 SA165 1 0 1 0 0 1 0 1 64/32 SA166 1 0 1 0 0 1 1 0 64/32 SA167 1 0 1 0 0 1 1 1 64/32 SA168 1 0 1 0 1 0 0 0 64/32 SA169 1 0 1 0 1 0 0 1 64/32 SA170 1 0 1 0 1 0 1 0 64/32 SA171 1 0 1 0 1 0 1 1 64/32 SA172 1 0 1 0 1 1 0 0 64/32 SA173 1 0 1 0 1 1 0 1 64/32 SA174 1 0 1 0 1 1 1 0 64/32 SA175 1 0 1 0 1 1 1 1 64/32 SA176 1 0 1 1 0 0 0 0 64/32 SA177 1 0 1 1 0 0 0 1 64/32 SA178 1 0 1 1 0 0 1 0 64/32 SA179 1 0 1 1 0 0 1 1 64/32 SA180 1 0 1 1 0 1 0 0 64/32 SA181 1 0 1 1 0 1 0 1 64/32 SA182 1 0 1 1 0 1 1 0 64/32 SA183 1 0 1 1 0 1 1 1 64/32 SA184 1 0 1 1 1 0 0 0 64/32 SA185 1 0 1 1 1 0 0 1 64/32 SA186 1 0 1 1 1 0 1 0 64/32 SA187 1 0 1 1 1 0 1 1 64/32 SA188 1 0 1 1 1 1 0 0 64/32 SA189 1 0 1 1 1 1 0 1 64/32 SA190 1 0 1 1 1 1 1 0 64/32 SA191 1 0 1 1 1 1 1 1 64/32 SA192 1 1 0 0 0 0 0 0 64/32 SA193 1 1 0 0 0 0 0 1 64/32 SA194 1 1 0 0 0 0 1 0 64/32 SA195 1 1 0 0 0 0 1 1 64/32 SA196 1 1 0 0 0 1 0 0 64/32 SA197 1 1 0 0 0 1 0 1 64/32 SA198 1 1 0 0 0 1 1 0 64/32 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 39 Data Sheet Table 15. Sector A22–A15 Sector Size* 8-bit Address Range S29GL128M Sector Address Table (Sheet 3 of 3) Sector 16-bit Address Range 638000–63FFFF 640000–647FFF 648000–64FFFF 650000–657FFF 658000–65FFFF 660000–667FFF 668000–66FFFF 670000–677FFF 678000–67FFFF 680000–687FFF 688000–68FFFF 690000–697FFF 698000–69FFFF 6A0000–6A7FFF 6A8000–6AFFFF 6B0000–6B7FFF 6B8000–6BFFFF 6C0000–6C7FFF 6C8000–6CFFFF 6D0000–6D7FFF 6D8000–6DFFFF 6E0000–6E7FFF 6E8000–6EFFFF 6F0000–6F7FFF 6F8000–6FFFFF 700000–707FFF 708000–70FFFF 710000–717FFF 718000–71FFFF A22–A15 Sector Size* 8-bit Address Range E40000–E4FFFF E50000–E5FFFF E60000–E6FFFF E70000–E7FFFF E80000–E8FFFF E90000–E9FFFF EA0000–EAFFFF EB0000–EBFFFF EC0000–ECFFFF ED0000–EDFFFF EE0000–EEFFFF EF0000–EFFFFF F00000–F0FFFF F10000–F1FFFF F20000–F2FFFF F30000–F3FFFF F40000–F4FFFF F50000–F5FFFF F60000–F6FFFF F70000–F7FFFF F80000–F8FFFF F90000–F9FFFF FA0000–FAFFFF FB0000–FBFFFF FC0000–FCFFFF FD0000–FDFFFF FE0000–FEFFFF FF0000–FFFFFF 16-bit Address Range 720000–727FFF 728000–72FFFF 730000–737FFF 738000–73FFFF 740000–747FFF 748000–74FFFF 750000–757FFF 758000–75FFFF 760000–767FFF 768000–76FFFF 770000–777FFF 778000–77FFFF 780000–787FFF 788000–78FFFF 790000–797FFF 798000–79FFFF 7A0000–7A7FFF 7A8000–7AFFFF 7B0000–7B7FFF 7B8000–7BFFFF 7C0000–7C7FFF 7C8000–7CFFFF 7D0000–7D7FFF 7D8000–7DFFFF 7E0000–7E7FFF 7E8000–7EFFFF 7F0000–7F7FFF 7F8000–7FFFFF SA199 1 1 0 0 0 1 1 1 64/32 SA200 1 1 0 0 1 0 0 0 64/32 SA201 1 1 0 0 1 0 0 1 64/32 SA202 1 1 0 0 1 0 1 0 64/32 SA203 1 1 0 0 1 0 1 1 64/32 SA204 1 1 0 0 1 1 0 0 64/32 SA205 1 1 0 0 1 1 0 1 64/32 SA206 1 1 0 0 1 1 1 0 64/32 SA207 1 1 0 0 1 1 1 1 64/32 SA208 1 1 0 1 0 0 0 0 64/32 SA209 1 1 0 1 0 0 0 1 64/32 SA210 1 1 0 1 0 0 1 0 64/32 SA211 1 1 0 1 0 0 1 1 64/32 SA212 1 1 0 1 0 1 0 0 64/32 SA213 1 1 0 1 0 1 0 1 64/32 SA214 1 1 0 1 0 1 1 0 64/32 SA215 1 1 0 1 0 1 1 1 64/32 SA216 1 1 0 1 1 0 0 0 64/32 SA217 1 1 0 1 1 0 0 1 64/32 SA218 1 1 0 1 1 0 1 0 64/32 SA219 1 1 0 1 1 0 1 1 64/32 SA220 1 1 0 1 1 1 0 0 64/32 SA221 1 1 0 1 1 1 0 1 64/32 SA222 1 1 0 1 1 1 1 0 64/32 SA223 1 1 0 1 1 1 1 1 64/32 SA224 1 1 1 0 0 0 0 0 64/32 SA225 1 1 1 0 0 0 0 1 64/32 SA226 1 1 1 0 0 0 1 0 64/32 SA227 1 1 1 0 0 0 1 1 64/32 C70000–C7FFFF C80000–C8FFFF C90000–C9FFFF CA0000–CAFFFF CB0000–CBFFFF CC0000–CCFFFF CD0000–CDFFFF CE0000–CEFFFF CF0000–CFFFFF D00000–D0FFFF D10000–D1FFFF D20000–D2FFFF D30000–D3FFFF D40000–D4FFFF D50000–D5FFFF D60000–D6FFFF D70000–D7FFFF D80000–D8FFFF D90000–D9FFFF DA0000–DAFFFF DB0000–DBFFFF DC0000–DCFFFF DD0000–DDFFFF DE0000–DEFFFF DF0000–DFFFFF E00000–E0FFFF E10000–E1FFFF E20000–E2FFFF E30000–E3FFFF SA228 1 1 1 0 0 1 0 0 64/32 SA229 1 1 1 0 0 1 0 1 64/32 SA230 1 1 1 0 0 1 1 0 64/32 SA231 1 1 1 0 0 1 1 1 64/32 SA232 1 1 1 0 1 0 0 0 64/32 SA233 1 1 1 0 1 0 0 1 64/32 SA234 1 1 1 0 1 0 1 0 64/32 SA235 1 1 1 0 1 0 1 1 64/32 SA236 1 1 1 0 1 1 0 0 64/32 SA237 1 1 1 0 1 1 0 1 64/32 SA238 1 1 1 0 1 1 1 0 64/32 SA239 1 1 1 0 1 1 1 1 64/32 SA240 1 1 1 1 0 0 0 0 64/32 SA241 1 1 1 1 0 0 0 1 64/32 SA242 1 1 1 1 0 0 1 0 64/32 SA243 1 1 1 1 0 0 1 1 64/32 SA244 1 1 1 1 0 1 0 0 64/32 SA245 1 1 1 1 0 1 0 1 64/32 SA246 1 1 1 1 0 1 1 0 64/32 SA247 1 1 1 1 0 1 1 1 64/32 SA248 1 1 1 1 1 0 0 0 64/32 SA249 1 1 1 1 1 0 0 1 64/32 SA250 1 1 1 1 1 0 1 0 64/32 SA251 1 1 1 1 1 0 1 1 64/32 SA252 1 1 1 1 1 1 0 0 64/32 SA253 1 1 1 1 1 1 0 1 64/32 SA254 1 1 1 1 1 1 1 0 64/32 SA255 1 1 1 1 1 1 1 1 64/32 * Sector sizes are given in Kbytes/Kwords. 40 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 16. A23–A15 000000000 000000001 000000010 000000011 000000100 000000101 000000110 000000111 000001000 000001001 000001010 000001011 000001100 000001101 000001110 000001111 000010000 000010001 000010010 000010011 000010100 000010101 000010110 000010111 000011000 000011001 000011010 000011011 000011100 000011101 000011110 000011111 000100000 000100001 000100010 000100011 000100100 000100101 000100110 000100111 000101000 000101001 000101010 000101011 8-bit Address Range Sector S29GL256M Sector Address Table (Sheet 1 of 6) 16-bit Address Range 000000–007FFF 008000–00FFFF 010000–017FFF 018000–01FFFF 020000–027FFF 028000–02FFFF 030000–037FFF 038000–03FFFF 040000–047FFF 048000–04FFFF 050000–057FFF 058000–05FFFF 060000–067FFF 068000–06FFFF 070000–077FFF 078000–07FFFF 080000–087FFF 088000–08FFFF 090000–097FFF 098000–09FFFF 0A0000–0A7FFF 0A8000–0AFFFF 0B0000–0B7FFF 0B8000–0BFFFF 0C0000–0C7FFF 0C8000–0CFFFF 0D0000–0D7FFF 0D8000–0DFFFF 0E0000–0E7FFF 0E8000–0EFFFF 0F0000–0F7FFF 0F8000–0FFFFF 100000–107FFF 108000–10FFFF 110000–117FFF 118000–11FFFF 120000–127FFF 128000–12FFFF 130000–137FFF 138000–13FFFF 140000–147FFF 148000–14FFFF 150000–157FFF 158000–15FFFF A23–A15 000101100 8-bit Address Range 02C0000–02CFFFF 16-bit Address Range 160000–167FFF 168000–16FFFF 170000–177FFF 178000–17FFFF 180000–187FFF 188000–18FFFF 190000–197FFF 198000–19FFFF 1A0000–1A7FFF 1A8000–1AFFFF 1B0000–1B7FFF 1B8000–1BFFFF 1C0000–1C7FFF 1C8000–1CFFFF 1D0000–1D7FFF 1D8000–1DFFFF 1E0000–1E7FFF 1E8000–1EFFFF 1F0000–1F7FFF 1F8000–1FFFFF 200000–207FFF 208000–20FFFF 210000–217FFF 218000–21FFFF 220000–227FFF 228000–22FFFF 230000–237FFF 238000–23FFFF 240000–247FFF 248000–24FFFF 250000–257FFF 258000–25FFFF 260000–267FFF 268000–26FFFF 270000–277FFF 278000–27FFFF 280000–287FFF 288000–28FFFF 290000–297FFF 298000–29FFFF 2A0000–2A7FFF 2A8000–2AFFFF 2B0000–2B7FFF 2B8000–2BFFFF Sector SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 SA79 SA80 SA81 SA82 SA83 SA84 SA85 SA86 SA87 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 SA40 SA41 SA42 SA43 0000000–000FFFF 0010000–001FFFF 0020000–002FFFF 0030000–003FFFF 0040000–004FFFF 0050000–005FFFF 0060000–006FFFF 0070000–007FFFF 0080000–008FFFF 0090000–009FFFF 00A0000–00AFFFF 00B0000–00BFFFF 00C0000–00CFFFF 00D0000–00DFFFF 00E0000–00EFFFF 00F0000–00FFFFF 0100000–010FFFF 0110000–011FFFF 0120000–012FFFF 0130000–013FFFF 0140000–014FFFF 0150000–015FFFF 0160000–016FFFF 0170000–017FFFF 0180000–018FFFF 0190000–019FFFF 01A0000–01AFFFF 01B0000–01BFFFF 01C0000–01CFFFF 01D0000–01DFFFF 01E0000–01EFFFF 01F0000–01FFFFF 0200000–020FFFF 0210000–021FFFF 0220000–022FFFF 0230000–023FFFF 0240000–024FFFF 0250000–025FFFF 0260000–026FFFF 0270000–027FFFF 0280000–028FFFF 0290000–029FFFF 02A0000–02AFFFF 02B0000–02BFFFF 0 0 0 1 0 1 1 0 1 02D0000–02DFFFF 000101110 000101111 000110000 000110001 000110010 000110011 000110100 000110101 000110110 000110111 000111000 000111001 000111010 000111011 000111100 02E0000–02EFFFF 02F0000–02FFFFF 0300000–030FFFF 0310000–031FFFF 0320000–032FFFF 0330000–033FFFF 0340000–034FFFF 0350000–035FFFF 0360000–036FFFF 0370000–037FFFF 0380000–038FFFF 0390000–039FFFF 03A0000–03AFFFF 03B0000–03BFFFF 03C0000–03CFFFF 0 0 0 1 1 1 1 0 1 03D0000–03DFFFF 000111110 000111111 001000000 001000001 001000010 001000011 03E0000–03EFFFF 03F0000–03FFFFF 0400000–040FFFF 0410000–041FFFF 0420000–042FFFF 0430000–043FFFF 0 0 1 0 0 0 1 0 0 0440000–044FFFF 0 0 1 0 0 0 1 0 1 0450000–045FFFF 0 0 1 0 0 0 1 1 0 0460000–046FFFF 0 0 1 0 0 0 1 1 1 0470000–047FFFF 0 0 1 0 0 1 0 0 0 0480000–048FFFF 0 0 1 0 0 1 0 0 1 0490000–049FFFF 0 0 1 0 0 1 0 1 0 04A0000–04AFFFF 0 0 1 0 0 1 0 1 1 04B0000–04BFFFF 0 0 1 0 0 1 1 0 0 04C0000–04CFFFF 0 0 1 0 0 1 1 0 1 04D0000–04DFFFF 0 0 1 0 0 1 1 1 0 04E0000–04EFFFF 0 0 1 0 0 1 1 1 1 04F0000–04FFFFF 0 0 1 0 1 0 0 0 0 0500000–050FFFF 0 0 1 0 1 0 0 0 1 0510000–051FFFF 0 0 1 0 1 0 0 1 0 0520000–052FFFF 0 0 1 0 1 0 0 1 1 0530000–053FFFF 0 0 1 0 1 0 1 0 0 0540000–054FFFF 0 0 1 0 1 0 1 0 1 0550000–055FFFF 0 0 1 0 1 0 1 1 0 0560000–056FFFF 0 0 1 0 1 0 1 1 1 0570000–057FFFF October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 41 Data Sheet Table 16. A23–A15 001011000 001011001 001011010 001011011 001011100 8-bit Address Range Sector S29GL256M Sector Address Table (Sheet 2 of 6) 16-bit Address Range 2C0000–2C7FFF 2C8000–2CFFFF 2D0000–2D7FFF 2D8000–2DFFFF 2E0000–2E7FFF 2E8000–2EFFFF 2F0000–2F7FFF 2F8000–2FFFFF 300000–307FFF 308000–30FFFF 310000–317FFF 318000–31FFFF 320000–327FFF 328000–32FFFF 330000–337FFF 338000–33FFFF 340000–347FFF 348000–34FFFF 350000–357FFF 358000–35FFFF 360000–367FFF 368000–36FFFF 370000–377FFF 378000–37FFFF 380000–387FFF 388000–38FFFF 390000–397FFF 398000–39FFFF 3A0000–3A7FFF 3A8000–3AFFFF 3B0000–3B7FFF 3B8000–3BFFFF 3C0000–3C7FFF 3C8000–3CFFFF 3D0000–3D7FFF 3D8000–3DFFFF 3E0000–3E7FFF 3E8000–3EFFFF 3F0000–3F7FFF 3F8000–3FFFFF 400000–407FFF 408000–40FFFF 410000–417FFF 418000–41FFFF 420000–427FFF A23–A15 8-bit Address Range 16-bit Address Range 428000–42FFFF 430000–437FFF 438000–43FFFF 440000–447FFF 448000–44FFFF 450000–457FFF 458000–45FFFF 460000–467FFF 468000–46FFFF 470000–477FFF 478000–47FFFF 480000–487FFF 488000–48FFFF 490000–497FFF 498000–49FFFF 4A0000–4A7FFF 4A8000–4AFFFF 4B0000–4B7FFF 4B8000–4BFFFF 4C0000–4C7FFF 4C8000–4CFFFF 4D0000–4D7FFF 4D8000–4DFFFF 4E0000–4E7FFF 4E8000–4EFFFF 4F0000–4F7FFF 4F8000–4FFFFF 500000–507FFF 508000–50FFFF 510000–517FFF 518000–51FFFF 520000–527FFF 528000–52FFFF 530000–537FFF 538000–53FFFF 540000–547FFF 548000–54FFFF 550000–557FFF 558000–55FFFF 560000–567FFF 568000–56FFFF 570000–577FFF 578000–57FFFF 580000–587FFF 588000–58FFFF Sector SA88 SA89 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 SA115 SA116 SA117 SA118 SA119 SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 SA128 SA129 SA130 SA131 SA132 0580000–058FFFF 0590000–059FFFF 05A0000–05AFFFF 05B0000–05BFFFF 05C0000–05CFFFF SA133 0 1 0 0 0 0 1 0 1 0850000–085FFFF SA134 0 1 0 0 0 0 1 1 0 0860000–086FFFF SA135 0 1 0 0 0 0 1 1 1 0870000–087FFFF SA136 0 1 0 0 0 1 0 0 0 0880000–088FFFF SA137 0 1 0 0 0 1 0 0 1 0890000–089FFFF SA138 0 1 0 0 0 1 0 1 0 08A0000–08AFFFF SA139 0 1 0 0 0 1 0 1 1 08B0000–08BFFFF SA140 0 1 0 0 0 1 1 0 0 08C0000–08CFFFF SA141 0 1 0 0 0 1 1 0 1 08D0000–08DFFFF SA142 0 1 0 0 0 1 1 1 0 08E0000–08EFFFF SA143 0 1 0 0 0 1 1 1 1 08F0000–08FFFFF SA144 0 1 0 0 1 0 0 0 0 0900000–090FFFF SA145 0 1 0 0 1 0 0 0 1 0910000–091FFFF SA146 0 1 0 0 1 0 0 1 0 0920000–092FFFF SA147 0 1 0 0 1 0 0 1 1 0930000–093FFFF SA148 0 1 0 0 1 0 1 0 0 0940000–094FFFF SA149 0 1 0 0 1 0 1 0 1 0950000–095FFFF SA150 0 1 0 0 1 0 1 1 0 0960000–096FFFF SA151 0 1 0 0 1 0 1 1 1 0970000–097FFFF SA152 0 1 0 0 1 1 0 0 0 0980000–098FFFF SA153 0 1 0 0 1 1 0 0 1 0990000–099FFFF SA154 0 1 0 0 1 1 0 1 0 09A0000–09AFFFF SA155 0 1 0 0 1 1 0 1 1 09B0000–09BFFFF SA156 0 1 0 0 1 1 1 0 0 09C0000–09CFFFF SA157 0 1 0 0 1 1 1 0 1 09D0000–09DFFFF SA158 0 1 0 0 1 1 1 1 0 09E0000–09EFFFF SA159 0 1 0 0 1 1 1 1 1 09F0000–09FFFFF SA160 0 1 0 1 0 0 0 0 0 0A00000–0A0FFFF SA161 0 1 0 1 0 0 0 0 1 0A10000–0A1FFFF SA162 0 1 0 1 0 0 0 1 0 0A20000–0A2FFFF SA163 0 1 0 1 0 0 0 1 1 0A30000–0A3FFFF SA164 0 1 0 1 0 0 1 0 0 0A40000–0A4FFFF SA165 0 1 0 1 0 0 1 0 1 0A50000–0A5FFFF SA166 0 1 0 1 0 0 1 1 0 0A60000–0A6FFFF SA167 0 1 0 1 0 0 1 1 1 0A70000–0A7FFFF SA168 0 1 0 1 0 1 0 0 0 0A80000–0A8FFFF SA169 0 1 0 1 0 1 0 0 1 0A90000–0A9FFFF SA170 0 1 0 1 0 1 0 1 0 0AA0000–0AAFFFF SA171 0 1 0 1 0 1 0 1 1 0AB0000–0ABFFFF SA172 0 1 0 1 0 1 1 0 0 0AC0000–0ACFFFF SA173 0 1 0 1 0 1 1 0 1 0AD0000–0ADFFFF SA174 0 1 0 1 0 1 1 1 0 0AE0000–0AEFFFF SA175 0 1 0 1 0 1 1 1 1 0AF0000–0AFFFFF SA176 0 1 0 1 1 0 0 0 0 0B00000–0B0FFFF SA177 0 1 0 1 1 0 0 0 1 0B10000–0B1FFFF 0 0 1 0 1 1 1 0 1 05D0000–05DFFFF 001011110 001011111 001100000 001100001 001100010 001100011 001100100 001100101 001100110 001100111 001101000 001101001 001101010 001101011 001101100 05E0000–05EFFFF 05F0000–05FFFFF 0600000–060FFFF 0610000–061FFFF 0620000–062FFFF 0630000–063FFFF 0640000–064FFFF 0650000–065FFFF 0660000–066FFFF 0670000–067FFFF 0680000–068FFFF 0690000–069FFFF 06A0000–06AFFFF 06B0000–06BFFFF 06C0000–06CFFFF 0 0 1 1 0 1 1 0 1 06D0000–06DFFFF 001101110 001101111 001110000 001110001 001110010 001110011 001110100 001110101 001110110 001110111 001111000 001111001 001111010 001111011 001111100 06E0000–06EFFFF 06F0000–06FFFFF 0700000–070FFFF 0710000–071FFFF 0720000–072FFFF 0730000–073FFFF 0740000–074FFFF 0750000–075FFFF 0760000–076FFFF 0770000–077FFFF 0780000–078FFFF 0790000–079FFFF 07A0000–07AFFFF 07B0000–07BFFFF 07C0000–07CFFFF 0 0 1 1 1 1 1 0 1 07D0000–07DFFFF 001111110 001111111 010000000 010000001 010000010 010000011 010000100 07E0000–07EFFFF 07F0000–07FFFFF 0800000–080FFFF 0810000–081FFFF 0820000–082FFFF 0830000–083FFFF 0840000–084FFFF 42 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 16. A23–A15 010110010 010110011 010110100 010110101 010110110 010110111 010111000 010111001 010111010 010111011 8-bit Address Range Sector S29GL256M Sector Address Table (Sheet 3 of 6) 16-bit Address Range 590000–597FFF 598000–59FFFF 5A0000–5A7FFF 5A8000–5AFFFF 5B0000–5B7FFF 5B8000–5BFFFF 5C0000–5C7FFF 5C8000–5CFFFF 5D0000–5D7FFF 5D8000–5DFFFF 5E0000–5E7FFF 5E8000–5EFFFF 5F0000–5F7FFF 5F8000–5FFFFF 600000–607FFF 608000–60FFFF 610000–617FFF 618000–61FFFF 620000–627FFF 628000–62FFFF 630000–637FFF 638000–63FFFF 640000–647FFF 648000–64FFFF 650000–657FFF 658000–65FFFF 660000–667FFF 668000–66FFFF 670000–677FFF 678000–67FFFF 680000–687FFF 688000–68FFFF 690000–697FFF 698000–69FFFF 6A0000–6A7FFF 6A8000–6AFFFF 6B0000–6B7FFF 6B8000–6BFFFF 6C0000–6C7FFF 6C8000–6CFFFF 6D0000–6D7FFF 6D8000–6DFFFF 6E0000–6E7FFF 6E8000–6EFFFF 6F0000–6F7FFF A23–A15 8-bit Address Range 16-bit Address Range 6F8000–6FFFFF 700000–707FFF 708000–70FFFF 710000–717FFF 718000–71FFFF 720000–727FFF 728000–72FFFF 730000–737FFF 738000–73FFFF 740000–747FFF 748000–74FFFF 750000–757FFF 758000–75FFFF 760000–767FFF 768000–76FFFF 770000–777FFF 778000–77FFFF 780000–787FFF 788000–78FFFF 790000–797FFF 798000–79FFFF 7A0000–7A7FFF 7A8000–7AFFFF 7B0000–7B7FFF 7B8000–7BFFFF 7C0000–7C7FFF 7C8000–7CFFFF 7D0000–7D7FFF 7D8000–7DFFFF 7E0000–7E7FFF 7E8000–7EFFFF 7F0000–7F7FFF 7F8000–7FFFFF 800000–807FFF 808000–80FFFF 810000–817FFF 818000–81FFFF 820000–827FFF 828000–82FFFF 830000–837FFF 838000–83FFFF 840000–847FFF 848000–84FFFF 850000–857FFF 858000–85FFFF Sector SA178 SA179 SA180 SA181 SA182 SA183 SA184 SA185 SA186 SA187 SA188 SA189 SA190 SA191 SA192 SA193 SA194 SA195 SA196 SA197 SA198 SA199 SA200 SA201 SA202 SA203 SA204 SA205 SA206 SA207 SA208 SA209 SA210 SA211 SA212 SA213 SA214 SA215 SA216 SA217 SA218 SA219 SA220 SA221 SA222 0B20000–0B2FFFF 0B30000–0B3FFFF 0B40000–0B4FFFF 0B50000–0B5FFFF 0B60000–0B6FFFF 0B70000–0B7FFFF 0B80000–0B8FFFF 0B90000–0B9FFFF 0BA0000–0BAFFFF 0BB0000–0BBFFFF SA223 0 1 1 0 1 1 1 1 1 0DF0000–0DFFFFF SA224 0 1 1 1 0 0 0 0 0 0E00000–0E0FFFF SA225 0 1 1 1 0 0 0 0 1 0E10000–0E1FFFF SA226 0 1 1 1 0 0 0 1 0 0E20000–0E2FFFF SA227 0 1 1 1 0 0 0 1 1 0E30000–0E3FFFF SA228 0 1 1 1 0 0 1 0 0 0E40000–0E4FFFF SA229 0 1 1 1 0 0 1 0 1 0E50000–0E5FFFF SA230 0 1 1 1 0 0 1 1 0 0E60000–0E6FFFF SA231 0 1 1 1 0 0 1 1 1 0E70000–0E7FFFF SA232 0 1 1 1 0 1 0 0 0 0E80000–0E8FFFF SA233 0 1 1 1 0 1 0 0 1 0E90000–0E9FFFF SA234 0 1 1 1 0 1 0 1 0 0EA0000–0EAFFFF SA235 0 1 1 1 0 1 0 1 1 0EB0000–0EBFFFF SA236 0 1 1 1 0 1 1 0 0 0EC0000–0ECFFFF SA237 0 1 1 1 0 1 1 0 1 0ED0000–0EDFFFF SA238 0 1 1 1 0 1 1 1 0 0EE0000–0EEFFFF SA239 0 1 1 1 0 1 1 1 1 0EF0000–0EFFFFF SA240 0 1 1 1 1 0 0 0 0 0F00000–0F0FFFF SA241 0 1 1 1 1 0 0 0 1 0F10000–0F1FFFF SA242 0 1 1 1 1 0 0 1 0 0F20000–0F2FFFF SA243 0 1 1 1 1 0 0 1 1 0F30000–0F3FFFF SA244 0 1 1 1 1 0 1 0 0 0F40000–0F4FFFF SA245 0 1 1 1 1 0 1 0 1 0F50000–0F5FFFF SA246 0 1 1 1 1 0 1 1 0 0F60000–0F6FFFF SA247 0 1 1 1 1 0 1 1 1 0F70000–0F7FFFF SA248 0 1 1 1 1 1 0 0 0 0F80000–0F8FFFF SA249 0 1 1 1 1 1 0 0 1 0F90000–0F9FFFF SA250 0 1 1 1 1 1 0 1 0 0FA0000–0FAFFFF SA251 0 1 1 1 1 1 0 1 1 0FB0000–0FBFFFF SA252 0 1 1 1 1 1 1 0 0 0FC0000–0FCFFFF SA253 0 1 1 1 1 1 1 0 1 0FD0000–0FDFFFF SA254 0 1 1 1 1 1 1 1 0 0FE0000–0FEFFFF SA255 0 1 1 1 1 1 1 1 1 0FF0000–0FFFFFF SA256 1 0 0 0 0 0 0 0 0 1000000–100FFFF SA257 1 0 0 0 0 0 0 0 1 1010000–101FFFF SA258 1 0 0 0 0 0 0 1 0 1020000–102FFFF SA259 1 0 0 0 0 0 0 1 1 1030000–103FFFF SA260 1 0 0 0 0 0 1 0 0 1040000–104FFFF SA261 1 0 0 0 0 0 1 0 1 1050000–105FFFF SA262 1 0 0 0 0 0 1 1 0 1060000–106FFFF SA263 1 0 0 0 0 0 1 1 1 1070000–107FFFF SA264 1 0 0 0 0 1 0 0 0 1080000–108FFFF SA265 1 0 0 0 0 1 0 0 1 1090000–109FFFF SA266 1 0 0 0 0 1 0 1 0 10A0000–10AFFFF SA267 1 0 0 0 0 1 0 1 1 10B0000–10BFFFF 0 1 0 1 1 1 1 0 0 0BC0000–0BCFFFF 0 1 0 1 1 1 1 0 1 0BD0000–0BDFFFF 010111110 010111111 011000000 011000001 011000010 011000011 011000100 011000101 011000110 011000111 011001000 011001001 011001010 0BE0000–0BEFFFF 0BF0000–0BFFFFF 0C00000–0C0FFFF 0C10000–0C1FFFF 0C20000–0C2FFFF 0C30000–0C3FFFF 0C40000–0C4FFFF 0C50000–0C5FFFF 0C60000–0C6FFFF 0C70000–0C7FFFF 0C80000–0C8FFFF 0C90000–0C9FFFF 0CA0000–0CAFFFF 0 1 1 0 0 1 0 1 1 0CB0000–0CBFFFF 0 1 1 0 0 1 1 0 0 0CC0000–0CCFFFF 0 1 1 0 0 1 1 0 1 0CD0000–0CDFFFF 011001110 011001111 0CE0000–0CEFFFF 0CF0000–0CFFFFF 0 1 1 0 1 0 0 0 0 0D00000–0D0FFFF 0 1 1 0 1 0 0 0 1 0D10000–0D1FFFF 0 1 1 0 1 0 0 1 0 0D20000–0D2FFFF 0 1 1 0 1 0 0 1 1 0D30000–0D3FFFF 0 1 1 0 1 0 1 0 0 0D40000–0D4FFFF 0 1 1 0 1 0 1 0 1 0D50000–0D5FFFF 0 1 1 0 1 0 1 1 0 0D60000–0D6FFFF 0 1 1 0 1 0 1 1 1 0D70000–0D7FFFF 0 1 1 0 1 1 0 0 0 0D80000–0D8FFFF 0 1 1 0 1 1 0 0 1 0D90000–0D9FFFF 0 1 1 0 1 1 0 1 0 0DA0000–0DAFFFF 0 1 1 0 1 1 0 1 1 0DB0000–0DBFFFF 0 1 1 0 1 1 1 0 0 0DC0000–0DCFFFF 0 1 1 0 1 1 1 0 1 0DD0000–0DDFFFF 0 1 1 0 1 1 1 1 0 0DE0000–0DEFFFF October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 43 Data Sheet Table 16. A23–A15 100001100 8-bit Address Range Sector S29GL256M Sector Address Table (Sheet 4 of 6) 16-bit Address Range 860000–867FFF 868000–86FFFF 870000–877FFF 878000–87FFFF 880000–887FFF 888000–88FFFF 890000–897FFF 898000–89FFFF 8A0000–8A7FFF 8A8000–8AFFFF 8B0000–8B7FFF 8B8000–8BFFFF 8C0000–8C7FFF 8C8000–8CFFFF 8D0000–8D7FFF 8D8000–8DFFFF 8E0000–8E7FFF 8E8000–8EFFFF 8F0000–8F7FFF 8F8000–8FFFFF 900000–907FFF 908000–90FFFF 910000–917FFF 918000–91FFFF 920000–927FFF 928000–92FFFF 930000–937FFF 938000–93FFFF 940000–947FFF 948000–94FFFF 950000–957FFF 958000–95FFFF 960000–967FFF 968000–96FFFF 970000–977FFF 978000–97FFFF 980000–987FFF 988000–98FFFF 990000–997FFF 998000–99FFFF 9A0000–9A7FFF 9A8000–9AFFFF 9B0000–9B7FFF 9B8000–9BFFFF 9C0000–9C7FFF A23–A15 8-bit Address Range 16-bit Address Range 9C8000–9CFFFF 9D0000–9D7FFF 9D8000–9DFFFF 9E0000–9E7FFF 9E8000–9EFFFF 9F0000–9F7FFF 9F8000–9FFFFF A00000–A07FFF A08000–A0FFFF A10000–A17FFF A18000–A1FFFF A20000–A27FFF A28000–A2FFFF A30000–A37FFF A38000–A3FFFF A40000–A47FFF A48000–A4FFFF A50000–A57FFF A58000–A5FFFF A60000–A67FFF A68000–A6FFFF A70000–A77FFF A78000–A7FFFF A80000–A87FFF A88000–A8FFFF A90000–A97FFF A98000–A9FFFF AA0000–AA7FFF AA8000–AAFFFF AB0000–AB7FFF AB8000–ABFFFF AC0000–AC7FFF AC8000–ACFFFF AD0000–AD7FFF AD8000–ADFFFF AE0000–AE7FFF AE8000–AEFFFF AF0000–AF7FFF AF8000–AFFFFF B00000–B07FFF B08000–B0FFFF B10000–B17FFF B18000–B1FFFF B20000–B27FFF B28000–B2FFFF Sector SA268 SA269 SA270 SA271 SA272 SA273 SA274 SA275 SA276 SA277 SA278 SA279 SA280 SA281 SA282 SA283 SA284 SA285 SA286 SA287 SA288 SA289 SA290 SA291 SA292 SA293 SA294 SA295 SA296 SA297 SA298 SA299 SA300 SA301 SA302 SA303 SA304 SA305 SA306 SA307 SA308 SA309 SA310 SA311 SA312 10C0000–10CFFFF SA313 1 0 0 1 1 1 0 0 1 1390000–139FFFF SA314 1 0 0 1 1 1 0 1 0 13A0000–13AFFFF SA315 1 0 0 1 1 1 0 1 1 13B0000–13BFFFF SA316 1 0 0 1 1 1 1 0 0 13C0000–13CFFFF SA317 1 0 0 1 1 1 1 0 1 13D0000–13DFFFF SA318 1 0 0 1 1 1 1 1 0 13E0000–13EFFFF SA319 1 0 0 1 1 1 1 1 1 13F0000–13FFFFF SA320 1 0 1 0 0 0 0 0 0 1400000–140FFFF SA321 1 0 1 0 0 0 0 0 1 1410000–141FFFF SA322 1 0 1 0 0 0 0 1 0 1420000–142FFFF SA323 1 0 1 0 0 0 0 1 1 1430000–143FFFF SA324 1 0 1 0 0 0 1 0 0 1440000–144FFFF SA325 1 0 1 0 0 0 1 0 1 1450000–145FFFF SA326 1 0 1 0 0 0 1 1 0 1460000–146FFFF SA327 1 0 1 0 0 0 1 1 1 1470000–147FFFF SA328 1 0 1 0 0 1 0 0 0 1480000–148FFFF SA329 1 0 1 0 0 1 0 0 1 1490000–149FFFF SA330 1 0 1 0 0 1 0 1 0 14A0000–14AFFFF SA331 1 0 1 0 0 1 0 1 1 14B0000–14BFFFF SA332 1 0 1 0 0 1 1 0 0 14C0000–14CFFFF SA333 1 0 1 0 0 1 1 0 1 14D0000–14DFFFF SA334 1 0 1 0 0 1 1 1 0 14E0000–14EFFFF SA335 1 0 1 0 0 1 1 1 1 14F0000–14FFFFF SA336 1 0 1 0 1 0 0 0 0 1500000–150FFFF SA337 1 0 1 0 1 0 0 0 1 1510000–151FFFF SA338 1 0 1 0 1 0 0 1 0 1520000–152FFFF SA339 1 0 1 0 1 0 0 1 1 1530000–153FFFF SA340 1 0 1 0 1 0 1 0 0 1540000–154FFFF SA341 1 0 1 0 1 0 1 0 1 1550000–155FFFF SA342 1 0 1 0 1 0 1 1 0 1560000–156FFFF SA343 1 0 1 0 1 0 1 1 1 1570000–157FFFF SA344 1 0 1 0 1 1 0 0 0 1580000–158FFFF SA345 1 0 1 0 1 1 0 0 1 1590000–159FFFF SA346 1 0 1 0 1 1 0 1 0 15A0000–15AFFFF SA347 1 0 1 0 1 1 0 1 1 15B0000–15BFFFF SA348 1 0 1 0 1 1 1 0 0 15C0000–15CFFFF SA349 1 0 1 0 1 1 1 0 1 15D0000–15DFFFF SA350 1 0 1 0 1 1 1 1 0 15E0000–15EFFFF SA351 1 0 1 0 1 1 1 1 1 15F0000–15FFFFF SA352 1 0 1 1 0 0 0 0 0 1600000–160FFFF SA353 1 0 1 1 0 0 0 0 1 1610000–161FFFF SA354 1 0 1 1 0 0 0 1 0 1620000–162FFFF SA355 1 0 1 1 0 0 0 1 1 1630000–163FFFF SA356 1 0 1 1 0 0 1 0 0 1640000–164FFFF SA357 1 0 1 1 0 0 1 0 1 1650000–165FFFF 1 0 0 0 0 1 1 0 1 10D0000–10DFFFF 100001110 100001111 100010000 100010001 100010010 100010011 100010100 100010101 100010110 100010111 100011000 100011001 100011010 100011011 100011100 10E0000–10EFFFF 10F0000–10FFFFF 1100000–110FFFF 1110000–111FFFF 1120000–112FFFF 1130000–113FFFF 1140000–114FFFF 1150000–115FFFF 1160000–116FFFF 1170000–117FFFF 1180000–118FFFF 1190000–119FFFF 11A0000–11AFFFF 11B0000–11BFFFF 11C0000–11CFFFF 1 0 0 0 1 1 1 0 1 11D0000–11DFFFF 100011110 100011111 100100000 100100001 100100010 100100011 100100100 100100101 100100110 100100111 100101000 100101001 100101010 100101011 100101100 11E0000–11EFFFF 11F0000–11FFFFF 1200000–120FFFF 1210000–121FFFF 1220000–122FFFF 1230000–123FFFF 1240000–124FFFF 1250000–125FFFF 1260000–126FFFF 1270000–127FFFF 1280000–128FFFF 1290000–129FFFF 12A0000–12AFFFF 12B0000–12BFFFF 12C0000–12CFFFF 1 0 0 1 0 1 1 0 1 12D0000–12DFFFF 100101110 100101111 100110000 100110001 100110010 100110011 100110100 100110101 100110110 100110111 100111000 12E0000–12EFFFF 12F0000–12FFFFF 1300000–130FFFF 1310000–131FFFF 1320000–132FFFF 1330000–133FFFF 1340000–134FFFF 1350000–135FFFF 1360000–136FFFF 1370000–137FFFF 1380000–138FFFF 44 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 16. A23–A15 101100110 101100111 101101000 101101001 101101010 101101011 101101100 8-bit Address Range Sector S29GL256M Sector Address Table (Sheet 5 of 6) 16-bit Address Range B30000–B37FFF B38000–B3FFFF B40000–B47FFF B48000–B4FFFF B50000–B57FFF B58000–B5FFFF B60000–B67FFF B68000–B6FFFF B70000–B77FFF B78000–B7FFFF B80000–B87FFF B88000–B8FFFF B90000–B97FFF B98000–B9FFFF BA0000–BA7FFF BA8000–BAFFFF BB0000–BB7FFF BB8000–BBFFFF BC0000–BC7FFF BC8000–BCFFFF BD0000–BD7FFF BD8000–BDFFFF BE0000–BE7FFF BE8000–BEFFFF BF0000–BF7FFF BF8000–BFFFFF C00000–C07FFF C08000–C0FFFF C10000–C17FFF C18000–C1FFFF C20000–C27FFF C28000–C2FFFF C30000–C37FFF C38000–C3FFFF C40000–C47FFF C48000–C4FFFF C50000–C57FFF C58000–C5FFFF C60000–C67FFF C68000–C6FFFF C70000–C77FFF C78000–C7FFFF C80000–C87FFF C88000–C8FFFF C90000–C97FFF A23–A15 8-bit Address Range 16-bit Address Range C98000–C9FFFF CA0000–CA7FFF CA8000–CAFFFF CB0000–CB7FFF CB8000–CBFFFF CC0000–CC7FFF CC8000–CCFFFF CD0000–CD7FFF CD8000–CDFFFF CE0000–CE7FFF CE8000–CEFFFF CF0000–CF7FFF CF8000–CFFFFF D00000–D07FFF D08000–D0FFFF D10000–D17FFF D18000–D1FFFF D20000–D27FFF D28000–D2FFFF D30000–D37FFF D38000–D3FFFF D40000–D47FFF D48000–D4FFFF D50000–D57FFF D58000–D5FFFF D60000–D67FFF D68000–D6FFFF D70000–D77FFF D78000–D7FFFF D80000–D87FFF D88000–D8FFFF D90000–D97FFF D98000–D9FFFF DA0000–DA7FFF DA8000–DAFFFF DB0000–DB7FFF DB8000–DBFFFF DC0000–DC7FFF DC8000–DCFFFF DD0000–DD7FFF DD8000–DDFFFF DE0000–DE7FFF DE8000–DEFFFF DF0000–DF7FFF DF8000–DFFFFF Sector SA358 SA359 SA360 SA361 SA362 SA363 SA364 SA365 SA366 SA367 SA368 SA369 SA370 SA371 SA372 SA373 SA374 SA375 SA376 SA377 SA378 SA379 SA380 SA381 SA382 SA383 SA384 SA385 SA386 SA387 SA388 SA389 SA390 SA391 SA392 SA393 SA394 SA395 SA396 SA397 SA398 SA399 SA400 SA401 SA402 1660000–166FFFF 1670000–167FFFF 1680000–168FFFF 1690000–169FFFF 16A0000–16AFFFF 16B0000–16BFFFF 16C0000–16CFFFF SA403 1 1 0 0 1 0 0 1 1 1930000–193FFFF SA404 1 1 0 0 1 0 1 0 0 1940000–194FFFF SA405 1 1 0 0 1 0 1 0 1 1950000–195FFFF SA406 1 1 0 0 1 0 1 1 0 1960000–196FFFF SA407 1 1 0 0 1 0 1 1 1 1970000–197FFFF SA408 1 1 0 0 1 1 0 0 0 1980000–198FFFF SA409 1 1 0 0 1 1 0 0 1 1990000–199FFFF SA410 1 1 0 0 1 1 0 1 0 19A0000–19AFFFF SA411 1 1 0 0 1 1 0 1 1 19B0000–19BFFFF SA412 1 1 0 0 1 1 1 0 0 19C0000–19CFFFF SA413 1 1 0 0 1 1 1 0 1 19D0000–19DFFFF SA414 1 1 0 0 1 1 1 1 0 19E0000–19EFFFF SA415 1 1 0 0 1 1 1 1 1 19F0000–19FFFFF SA416 1 1 0 1 0 0 0 0 0 1A00000–1A0FFFF SA417 1 1 0 1 0 0 0 0 1 1A10000–1A1FFFF SA418 1 1 0 1 0 0 0 1 0 1A20000–1A2FFFF SA419 1 1 0 1 0 0 0 1 1 1A30000–1A3FFFF SA420 1 1 0 1 0 0 1 0 0 1A40000–1A4FFFF SA421 1 1 0 1 0 0 1 0 1 1A50000–1A5FFFF SA422 1 1 0 1 0 0 1 1 0 1A60000–1A6FFFF SA423 1 1 0 1 0 0 1 1 1 1A70000–1A7FFFF SA424 1 1 0 1 0 1 0 0 0 1A80000–1A8FFFF SA425 1 1 0 1 0 1 0 0 1 1A90000–1A9FFFF SA426 1 1 0 1 0 1 0 1 0 1AA0000–1AAFFFF SA427 1 1 0 1 0 1 0 1 1 1AB0000–1ABFFFF SA428 1 1 0 1 0 1 1 0 0 1AC0000–1ACFFFF SA429 1 1 0 1 0 1 1 0 1 1AD0000–1ADFFFF SA430 1 1 0 1 0 1 1 1 0 1AE0000–1AEFFFF SA431 1 1 0 1 0 1 1 1 1 1AF0000–1AFFFFF SA432 1 1 0 1 1 0 0 0 0 1B00000–1B0FFFF SA433 1 1 0 1 1 0 0 0 1 1B10000–1B1FFFF SA434 1 1 0 1 1 0 0 1 0 1B20000–1B2FFFF SA435 1 1 0 1 1 0 0 1 1 1B30000–1B3FFFF SA436 1 1 0 1 1 0 1 0 0 1B40000–1B4FFFF SA437 1 1 0 1 1 0 1 0 1 1B50000–1B5FFFF SA438 1 1 0 1 1 0 1 1 0 1B60000–1B6FFFF SA439 1 1 0 1 1 0 1 1 1 1B70000–1B7FFFF SA440 1 1 0 1 1 1 0 0 0 1B80000–1B8FFFF SA441 1 1 0 1 1 1 0 0 1 1B90000–1B9FFFF SA442 1 1 0 1 1 1 0 1 0 1BA0000–1BAFFFF SA443 1 1 0 1 1 1 0 1 1 1BB0000–1BBFFFF SA444 1 1 0 1 1 1 1 0 0 1BC0000–1BCFFFF SA445 1 1 0 1 1 1 1 0 1 1BD0000–1BDFFFF SA446 1 1 0 1 1 1 1 1 0 1BE0000–1BEFFFF SA447 1 1 0 1 1 1 1 1 1 1BF0000–1BFFFFF 1 0 1 1 0 1 1 0 1 16D0000–16DFFFF 101101110 101101111 101110000 101110001 101110010 101110011 101110100 101110101 101110110 101110111 101111000 101111001 101111010 101111011 101111100 16E0000–16EFFFF 16F0000–16FFFFF 1700000–170FFFF 1710000–171FFFF 1720000–172FFFF 1730000–173FFFF 1740000–174FFFF 1750000–175FFFF 1760000–176FFFF 1770000–177FFFF 1780000–178FFFF 1790000–179FFFF 17A0000–17AFFFF 17B0000–17BFFFF 17C0000–17CFFFF 1 0 1 1 1 1 1 0 1 17D0000–17DFFFF 101111110 101111111 110000000 110000001 110000010 110000011 110000100 110000101 110000110 110000111 110001000 110001001 110001010 110001011 110001100 17E0000–17EFFFF 17F0000–17FFFFF 1800000–180FFFF 1810000–181FFFF 1820000–182FFFF 1830000–183FFFF 1840000–184FFFF 1850000–185FFFF 1860000–186FFFF 1870000–187FFFF 1880000–188FFFF 1890000–189FFFF 18A0000–18AFFFF 18B0000–18BFFFF 18C0000–18CFFFF 1 1 0 0 0 1 1 0 1 18D0000–18DFFFF 110001110 110001111 110010000 110010001 110010010 18E0000–18EFFFF 18F0000–18FFFFF 1900000–190FFFF 1910000–191FFFF 1920000–192FFFF October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 45 Data Sheet Table 16. A23–A15 111000000 111000001 111000010 111000011 111000100 111000101 111000110 111000111 111001000 111001001 111001010 8-bit Address Range Sector S29GL256M Sector Address Table (Sheet 6 of 6) 16-bit Address Range E00000–E07FFF E08000–E0FFFF E10000–E17FFF E18000–E1FFFF E20000–E27FFF E28000–E2FFFF E30000–E37FFF E38000–E3FFFF E40000–E47FFF E48000–E4FFFF E50000–E57FFF E58000–E5FFFF E60000–E67FFF E68000–E6FFFF E70000–E77FFF E78000–E7FFFF E80000–E87FFF E88000–E8FFFF E90000–E97FFF E98000–E9FFFF EA0000–EA7FFF EA8000–EAFFFF EB0000–EB7FFF EB8000–EBFFFF EC0000–EC7FFF EC8000–ECFFFF ED0000–ED7FFF ED8000–EDFFFF EE0000–EE7FFF EE8000–EEFFFF EF0000–EF7FFF EF8000–EFFFFF A23–A15 8-bit Address Range 16-bit Address Range F00000–F07FFF F08000–F0FFFF F10000–F17FFF F18000–F1FFFF F20000–F27FFF F28000–F2FFFF F30000–F37FFF F38000–F3FFFF F40000–F47FFF F48000–F4FFFF F50000–F57FFF F58000–F5FFFF F60000–F67FFF F68000–F6FFFF F70000–F77FFF F78000–F7FFFF F80000–F87FFF F88000–F8FFFF F90000–F97FFF F98000–F9FFFF FA0000–FA7FFF FA8000–FAFFFF FB0000–FB7FFF FB8000–FBFFFF FC0000–FC7FFF FC8000–FCFFFF FD0000–FD7FFF FD8000–FDFFFF FE0000–FE7FFF FE8000–FEFFFF FF0000–FF7FFF FF8000–FFFFFF Sector SA448 SA449 SA450 SA451 SA452 SA453 SA454 SA455 SA456 SA457 SA458 SA459 SA460 SA461 SA462 SA463 SA464 SA465 SA466 SA467 SA468 SA469 SA470 SA471 SA472 SA473 SA474 SA475 SA476 SA477 SA478 SA479 1C00000–1C0FFFF 1C10000–1C1FFFF 1C20000–1C2FFFF 1C30000–1C3FFFF 1C40000–1C4FFFF 1C50000–1C5FFFF 1C60000–1C6FFFF 1C70000–1C7FFFF 1C80000–1C8FFFF 1C90000–1C9FFFF 1CA0000–1CAFFFF SA480 1 1 1 1 0 0 0 0 0 1E00000–1E0FFFF SA481 1 1 1 1 0 0 0 0 1 1E10000–1E1FFFF SA482 1 1 1 1 0 0 0 1 0 1E20000–1E2FFFF SA483 1 1 1 1 0 0 0 1 1 1E30000–1E3FFFF SA484 1 1 1 1 0 0 1 0 0 1E40000–1E4FFFF SA485 1 1 1 1 0 0 1 0 1 1E50000–1E5FFFF SA486 1 1 1 1 0 0 1 1 0 1E60000–1E6FFFF SA487 1 1 1 1 0 0 1 1 1 1E70000–1E7FFFF SA488 1 1 1 1 0 1 0 0 0 1E80000–1E8FFFF SA489 1 1 1 1 0 1 0 0 1 1E90000–1E9FFFF SA490 1 1 1 1 0 1 0 1 0 1EA0000–1EAFFFF SA491 1 1 1 1 0 1 0 1 1 1EB0000–1EBFFFF SA492 1 1 1 1 0 1 1 0 0 1EC0000–1ECFFFF SA493 1 1 1 1 0 1 1 0 1 1ED0000–1EDFFFF SA494 1 1 1 1 0 1 1 1 0 1EE0000–1EEFFFF SA495 1 1 1 1 0 1 1 1 1 1EF0000–1EFFFFF SA496 1 1 1 1 1 0 0 0 0 1F00000–1F0FFFF SA497 1 1 1 1 1 0 0 0 1 1F10000–1F1FFFF SA498 1 1 1 1 1 0 0 1 0 1F20000–1F2FFFF SA499 1 1 1 1 1 0 0 1 1 1F30000–1F3FFFF SA500 1 1 1 1 1 0 1 0 0 1F40000–1F4FFFF SA501 1 1 1 1 1 0 1 0 1 1F50000–1F5FFFF SA502 1 1 1 1 1 0 1 1 0 1F60000–1F6FFFF SA503 1 1 1 1 1 0 1 1 1 1F70000–1F7FFFF SA504 1 1 1 1 1 1 0 0 0 1F80000–1F8FFFF SA505 1 1 1 1 1 1 0 0 1 1F90000–1F9FFFF SA506 1 1 1 1 1 1 0 1 0 1FA0000–1FAFFFF SA507 1 1 1 1 1 1 0 1 1 1FB0000–1FBFFFF SA508 1 1 1 1 1 1 1 0 0 1FC0000–1FCFFFF SA509 1 1 1 1 1 1 1 0 1 1FD0000–1FDFFFF SA510 1 1 1 1 1 1 1 1 0 1FE0000–1FEFFFF SA511 1 1 1 1 1 1 1 1 1 1FF0000–1FFFFFF 1 1 1 0 0 1 0 1 1 1CB0000–1CBFFFF 1 1 1 0 0 1 1 0 0 1CC0000–1CCFFFF 1 1 1 0 0 1 1 0 1 1CD0000–1CDFFFF 111001110 111001111 1CE0000–1CEFFFF 1CF0000–1CFFFFF 1 1 1 0 1 0 0 0 0 1D00000–1D0FFFF 1 1 1 0 1 0 0 0 1 1D10000–1D1FFFF 1 1 1 0 1 0 0 1 0 1D20000–1D2FFFF 1 1 1 0 1 0 0 1 1 1D30000–1D3FFFF 1 1 1 0 1 0 1 0 0 1D40000–1D4FFFF 1 1 1 0 1 0 1 0 1 1D50000–1D5FFFF 1 1 1 0 1 0 1 1 0 1D60000–1D6FFFF 1 1 1 0 1 0 1 1 1 1D70000–1D7FFFF 1 1 1 0 1 1 0 0 0 1D80000–1D8FFFF 1 1 1 0 1 1 0 0 1 1D90000–1D9FFFF 1 1 1 0 1 1 0 1 0 1DA0000–1DAFFFF 1 1 1 0 1 1 0 1 1 1DB0000–1DBFFFF 1 1 1 0 1 1 1 0 0 1DC0000–1DCFFFF 1 1 1 0 1 1 1 0 1 1DD0000–1DDFFFF 1 1 1 0 1 1 1 1 0 1DE0000–1DEFFFF 111011111 1DF0000–1DFFFFF Note: All sectors are 64 Kbytes or 32 Kwords in size. 46 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Autoselect Mode The autoselect mode provides manufacturer and device identification, and sector group protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding programming algorithm. However, the autoselect codes can also be accessed in-system through the command register. When using programming equipment, the autoselect mode requires VID on address pin A9. Address pins A6, A3, A2, A1, and A0 must be as shown in Table 17. In addition, when verifying sector protection, the sector address must appear on the appropriate highest order address bits (see Table 6 through Table 16). Table 17 shows the remaining address bits that are don’t care. When all necessary bits are set as required, the programming equipment may then read the corresponding identifier code on DQ7–DQ0. To access the autoselect codes in-system, the host system can issue the autoselect command via the command register, as shown in Table 34 and Table 35. This method does not require VID. See Autoselect Command Sequence for more information. Table 17. Description CE# OE# WE# A22 to A15 Autoselect Codes, (High Voltage Method) A 0 DQ8 to DQ15 BYTE# = VIH 00 22 22 22 22 22 22 22 22 BYTE# = VIL X X X X X X X X X 7E h 13 h 00 h 7E h 1C h 00 h R1, R2, R0 R8, R9 01 h 01h 7Eh 12h 01h 7Eh 12h 00h 7Eh 0Ch 7Eh 10h 00h (-R4, bottom boot) 01h (-R3, top boot) 7Eh 1Ah 00h (-R4, bottom boot) 01h (-R3, top boot) 01h (protected), 00h (unprotected) 7Eh 13h DQ7 to DQ0 Model Number R3,R4 01h R5, R6, R7 01h A1 A AA 4 8 53 A A to A9 to to to 6 1 A1 A AA 0 7 42 X VI D Manufacturer ID: Spansion Products S29GL128M S29GL256M Cycle 1 Cycle 2 Cycle 3 Cycle 1 Cycle 2 Cycle 3 Cycle 1 S29GL064M Cycle 2 L L H X X L X L L L L H H L H H L H L H L H H L H H L L L H X X VI D X L X H H L L L H X X VI D X L X H H L L L H X X VI D X L X H Cycle 3 H H H 22 X 01h 01h Cycle 1 S29GL032M Cycle 2 VI D L H L H H L 22 22 X X 7Eh 1Dh 7Eh 1Ah L L H X X X L X Cycle 3 H H H 22 X 00h Sector Group Protection Verification Secured Silicon Sector Indicator Bit (DQ7), WP# protects highest address sector Secured Silicon Sector Indicator Bit (DQ7), WP# protects lowest address sector L L H SA X VI D X L X L H L X X L L H X X VI D X L X L H H X X 98h (factory locked), 18h (not factory locked) L L H X X VI D X L X L H H X X 88h (factory locked), 08h (not factory locked) Legend: L = Logic Low = VIL, H = Logic High = VIH, SA = Sector Address, X = Don’t care. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 47 Data Sheet Sector Group Protection and Unprotection The hardware sector group protection feature disables both program and erase operations in any sector group. In this device, a sector group consists of four adjacent sectors that are protected or unprotected at the same time (see Table 4). The hardware sector group unprotection feature re-enables both program and erase operations in previously protected sector groups. Sector group protection/unprotection can be implemented via two methods. Sector protection/unprotection requires VID on the RESET# pin only, and can be implemented either in-system or via programming equipment. Figure 2 shows the algorithms and Figure 24 shows the timing diagram. This method uses standard microprocessor bus cycle timing. For sector group unprotect, all unprotected sector groups must first be protected prior to the first sector group unprotect write cycle. The device is shipped with all sector groups unprotected. Spansion offers the option of programming and protecting sector groups at its factory prior to shipping the device through Spansion Programming Service. Contact a Spansion representative for details. It is possible to determine whether a sector group is protected or unprotected. See Autoselect Mode for details. Table 18. Sector Group SA0–SA3 SA4–SA7 SA8–SA11 SA12–SA15 S29GL032M (Model R0) Sector Group Protection/Unprotection Addresses Sector Group SA16–SA19 SA20–SA23 SA24–SA27 SA28–SA31 A22–A18 00100 00101 00110 00111 Sector Group SA32–SA35 SA36–SA39 SA40–SA43 SA44–SA47 A22–A18 01000 01001 01010 01011 Sector Group SA48–SA51 SA52–SA55 SA56–SA59 SA60–SA63 A22–A18 01100 01101 01110 01111 A22–A18 00000 00001 00010 00011 Note: All sector groups are 256 Kwords in size. Table 19. S29GL032M (Models R1, R2) Sector Group Protection/Unprotection Addresses Sector Group SA0 SA1 SA2 SA3 SA4–SA7 SA8–SA11 A20–A15 000000 000001 000010 000011 0001xx 0010xx Sector Group SA12–SA15 SA16–SA19 SA20–SA23 SA24–SA27 SA28–SA31 SA32–SA35 A20–A15 0011xx 0100xx 0101xx 0110xx 0111xx 1000xx Sector Group SA36–SA39 SA40–SA43 SA44–SA47 SA48–SA51 SA52–SA55 A20–A15 1001xx 1010xx 1011xx 1100xx 1101xx Sector Group SA56–SA59 SA60 SA61 SA62 SA63 A20–A15 1110xx 111100 111101 111110 111111 Table 20. S29GL032M (Model R3) Sector Group Protection/Unprotection Address Table Sector SA0-SA3 SA4-SA7 SA8-SA11 SA12-SA15 SA16-SA19 SA20-SA23 SA24-SA27 SA28-SA31 SA32–SA35 A20–A12 0000XXXXXh 0001XXXXXh 0010XXXXXh 0011XXXXXh 0100XXXXXh 0101XXXXXh 0110XXXXXh 0111XXXXXh 1000XXXXXh Sector/Sector Block Size (Kbytes) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) SA60-SA62 Sector SA36–SA39 SA40–SA43 SA44–SA47 SA48–SA51 SA52-SA55 SA56-SA59 A20–A12 1001XXXXXh 1010XXXXXh 1011XXXXXh 1100XXXXXh 1101XXXXXh 1110XXXXXh 111100XXXh 111101XXXh 111110XXXh 192 (3x64) Sector/Sector Block Size (Kbytes) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) Sector SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 A20–A12 111111000h 111111001h 111111010h 111111011h 111111100h 111111101h 111111110h 111111111h Sector/Sector Block Size (Kbytes) 8 8 8 8 8 8 8 8 48 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 21. Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 A20–A12 000000000h 000000001h 000000010h 000000011h 000000100h 000000101h 000000110h 000000111h S29GL032M (Model R4) Sector Group Protection/Unprotection Address Table Sector/Sector Block Size (Kbytes) 8 8 8 8 8 8 8 8 SA11–SA14 SA15–SA18 SA19–SA22 SA23–SA26 SA27-SA30 SA31-SA34 SA8–SA10 Sector A20–A12 000001XXXh 000010XXXh 000011XXXh 0001XXXXXh 0010XXXXXh 0011XXXXXh 0100XXXXXh 0101XXXXXh 0110XXXXXh 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 192 (3x64) Sector/Sector Block Size (Kbytes) Sector SA35-SA38 SA39-SA42 SA43-SA46 SA47-SA50 SA51-SA54 SA55–SA58 SA59–SA62 SA63–SA66 SA67–SA70 A20–A12 0111XXXXXh 1000XXXXXh 1001XXXXXh 1010XXXXXh 1011XXXXXh 1100XXXXXh 1101XXXXXh 1110XXXXXh 1111XXXXXh 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) l Table 22. S29GL064M (Model 00) Sector Group Protection/Unprotection Address Table Sector Group SA0–SA3 SA4–SA7 SA8–SA11 SA12–SA15 SA16–SA19 SA20–SA23 SA24–SA27 SA32–SA35 A22–A18 00000 00001 00010 00011 00100 00101 00110 01000 Sector Group SA36–SA39 SA40–SA43 SA44–SA47 SA48–SA51 SA52–SA55 SA56–SA59 SA60–SA63 SA64–SA67 A22–A18 01001 01010 01011 01100 01101 01110 01111 10000 Sector Group SA68–SA71 SA72–SA75 SA76–SA79 SA80–SA83 SA88–SA91 SA92–SA95 SA96–SA99 A22–A18 10001 10010 10011 10100 10110 10111 11000 Sector Group SA100–SA103 SA104–SA107 SA108–SA111 SA112–SA115 SA116–SA119 SA120–SA123 SA124–SA127 A22–A18 11001 11010 11011 11100 11101 11110 11111 Note: All sector groups are 256 Kwords in size. Table 23. S29GL064M (Models R1, R2, R8, R9) Sector Group Protection/Unprotection Addresses Sector Group SA0 SA1 SA2 SA3 SA4–SA7 SA8–SA11 SA12–SA15 SA16–SA19 SA20–SA23 SA24–SA27 A21–A15 0000000 0000001 0000010 0000011 00001xx 00010xx 00011xx 00100xx 00101xx 00110xx Sector Group SA28–SA31 SA32–SA35 SA36–SA39 SA40–SA43 SA44–SA47 SA48–SA51 SA52–SA55 SA56–SA59 SA60–SA63 SA28–SA31 A21–A15 00111xx 01000xx 01001xx 01010xx 01011xx 01100xx 01101xx 01110xx 01111xx 00111xx Sector Group SA64–SA67 SA68–SA71 SA72–SA75 SA76–SA79 SA80–SA83 SA84–SA87 SA88–SA91 SA92–SA95 SA96–SA99 SA100–SA103 A21–A15 10000xx 10001xx 10010xx 10011xx 10100xx 10101xx 10110xx 10111xx 11000xx 11001xx Sector Group SA104–SA107 SA108–SA111 SA112–SA115 SA116–SA119 SA120–SA123 SA124 SA125 SA126 SA127 A21–A15 11010xx 11011xx 11100xx 11101xx 11110xx 1111100 1111101 1111110 1111111 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 49 Data Sheet Table 24. S29GL064M (Model R3) Sector Group Protection/Unprotection Address Table Sector SA0-SA3 SA4-SA7 SA8-SA11 A21–A12 00000XXXXX 00001XXXXX 00010XXXXX Sector/ Sector Block Size (Kbytes) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) Sector SA56-SA59 SA60-SA63 SA64-SA67 SA68-SA71 SA72-SA75 SA76-SA79 SA80-SA83 SA84-SA87 SA88-SA91 SA92-SA95 SA96-SA99 A21–A12 01110XXXXX 01111XXXXX 10000XXXXX 10001XXXXX 10010XXXXX 10011XXXXX 10100XXXXX 10101XXXXX 10110XXXXX 10111XXXXX 11000XXXXX Sector/ Sector Block Size (Kbytes) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) SA127 SA128 SA129 SA130 SA131 SA132 SA133 SA134 SA124-SA126 Sector A21–A12 Sector/ Sector Block Size (Kbytes) 256 (4x64) 256 (4x64) 256 (4x64) SA112-SA115 11100XXXXX SA116-SA119 11101XXXXX SA120-SA123 11110XXXXX 1111100XXX 1111101XXX 1111110XXX 1111111000 1111111001 1111111010 1111111011 1111111100 1111111101 1111111110 1111111111 SA12-SA15 00011XXXXX SA16-SA19 00100XXXXX SA20-SA23 00101XXXXX SA24-SA27 00110XXXXX SA28-SA31 00111XXXXX SA32-SA35 01000XXXXX SA36-SA39 01001XXXXX SA40-SA43 01010XXXXX SA44-SA47 01011XXXXX SA48-SA51 01100XXXXX SA52-SA55 01101XXXXX 192 (3x64) 8 8 8 8 8 8 8 8 SA100-SA103 11001XXXXX SA104-SA107 11010XXXXX SA108-SA111 11011XXXXX Table 25. S29GL064M (Model R4) Sector Group Protection/Unprotection Addresses Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 A21–A12 0000000000 0000000001 0000000010 0000000011 0000000100 0000000101 0000000110 0000000111 0000001XXX SA8–SA10 0000010XXX 0000011XXX SA11–SA14 00001XXXXX SA15–SA18 00010XXXXX SA19–SA22 00011XXXXX 256 (4x64) 256 (4x64) 256 (4x64) 192 (3x64) Sector/Sector Block Size (Kbytes) 8 8 8 8 8 8 8 8 Sector A21–A12 Sector/Sector Block Size (Kbytes) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) Sector SA79–SA82 SA83–SA86 SA87–SA90 SA91–SA94 SA95–SA98 SA99–SA102 A21–A12 10010XXXXX 10011XXXXX 10100XXXXX 10101XXXXX 10110XXXXX 10111XXXXX Sector/Sector Block Size (Kbytes) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) 256 (4x64) SA23–SA26 00100XXXXX SA27-SA30 00101XXXXX SA31-SA34 00110XXXXX SA35-SA38 00111XXXXX SA39-SA42 01000XXXXX SA43-SA46 01001XXXXX SA47-SA50 01010XXXXX SA51-SA54 01011XXXXX SA55–SA58 01100XXXXX SA59–SA62 01101XXXXX SA63–SA66 01110XXXXX SA67–SA70 01111XXXXX SA71–SA74 10000XXXXX SA75–SA78 10001XXXXX SA103–SA106 11000XXXXX SA107–SA110 11001XXXXX SA111–SA114 11010XXXXX SA115–SA118 11011XXXXX SA119–SA122 11100XXXXX SA123–SA126 11101XXXXX SA127–SA130 11110XXXXX SA131–SA134 11111XXXXX 50 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 26. S29GL064M (Model R5) Sector Group Protection/Unprotection Addresses Sector Group SA0–SA3 SA4–SA7 SA8–SA11 SA12–SA15 SA16–SA19 SA20–SA23 SA24–SA27 A21–A17 00000 00001 00010 00011 00100 00101 00110 Sector Group SA28–SA31 SA32–SA35 SA36–SA39 SA40–SA43 SA44–SA47 SA48–SA51 SA52–SA55 A21–A17 00111 01000 01001 01010 01011 01100 01101 Sector Group SA56–SA59 SA60–SA63 SA64–SA67 SA68–SA71 SA72–SA75 SA76–SA79 A21–A17 01110 01111 10000 10001 10010 10011 Sector Group SA80–SA83 SA84–SA87 SA88–SA91 SA92–SA95 SA96–SA99 SA100–SA103 A21–A17 10100 10101 10110 10111 11000 11001 Sector Group SA104–SA107 SA108–SA111 SA112–SA115 SA116–SA119 SA120–SA123 SA124–SA127 A21–A17 11010 11011 11100 11101 11110 11111 Note: All sector groups are 128 Kwords in size. Table 27. S29GL064M (Models R6, R7) Sector Group Protection/Unprotection Address Sector Group SA0–SA3 SA4–SA7 SA8–SA11 SA12–SA15 SA16–SA19 SA20–SA23 SA24–SA27 A21–A17 00000 00001 00010 00011 00100 00101 00110 Sector Group SA28–SA31 SA32–SA35 SA36–SA39 SA40–SA43 SA44–SA47 SA48–SA51 SA52–SA55 A21–A17 00111 01000 01001 01010 01011 01100 01101 Sector Group SA56–SA59 SA60–SA63 SA64–SA67 SA68–SA71 SA72–SA75 SA76–SA79 A21–A17 01110 01111 10000 10001 10010 10011 Sector Group SA80–SA83 SA84–SA87 SA88–SA91 SA92–SA95 SA96–SA99 SA100–SA103 A21–A17 10100 10101 10110 10111 11000 11001 Sector Group SA104–SA107 SA108–SA111 SA112–SA115 SA116–SA119 SA120–SA123 SA124–SA127 A21–A17 11010 11011 11100 11101 11110 11111 Note: All sector groups are 128 Kwords in size. Table 28. Sector Group SA0 SA1 SA2 SA3 SA4–SA7 SA8–SA11 SA12–SA15 SA16–SA19 SA20–SA23 SA24–SA27 SA28–SA31 SA32–SA35 SA36–SA39 SA40–SA43 SA44–SA47 SA48–SA51 SA52–SA55 SA56–SA59 SA60–SA63 SA64–SA67 SA68–SA71 A22–A15 00000000 00000001 00000010 00000011 000001xx 000010xx 000011xx 000100xx 000101xx 000110xx 000111xx 001000xx 001001xx 001010xx 001011xx 001100xx 001101xx 001110xx 001111xx 010000xx 010001xx S29GL128M Sector Group Protection/Unprotection Addresses Sector Group SA72–SA75 SA76–SA79 SA80–SA83 SA84–SA87 SA88–SA91 SA92–SA95 SA96–SA99 SA100–SA103 SA104–SA107 SA108–SA111 SA112–SA115 SA116–SA119 SA120–SA123 SA124–SA127 SA128–SA131 SA132–SA135 SA136–SA139 SA140–SA143 SA144–SA147 SA148–SA151 SA152–SA155 A22–A15 010010xx 010011xx 010100xx 010101xx 010110xx 010111xx 011000xx 011001xx 011010xx 011011xx 011100xx 011101xx 011110xx 011111xx 100000xx 100001xx 100010xx 100011xx 100100xx 100101xx 100110xx Sector Group SA156–SA159 SA160–SA163 SA164–SA167 SA168–SA171 SA172–SA175 SA176–SA179 SA180–SA183 SA184–SA187 SA188–SA191 SA192–SA195 SA196–SA199 SA200–SA203 SA204–SA207 SA208–SA211 SA212–SA215 SA216–SA219 SA220–SA223 SA224–SA227 SA228–SA231 SA232–SA235 SA236–SA239 A22–A15 100111xx 101000xx 101001xx 101010xx 101011xx 101100xx 101101xx 101110xx 101111xx 110000xx 110001xx 110010xx 110011xx 110100xx 110101xx 110110xx 110111xx 111000xx 111001xx 111010xx 111011xx Sector Group SA240–SA243 SA244–SA247 SA248–SA251 SA252 SA253 SA254 SA255 A22–A15 111100xx 111101xx 111110xx 11111100 11111101 11111110 11111111 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 51 Data Sheet Table 29. Sector Group SA0 SA1 SA2 SA3 SA4–SA7 SA8–SA11 SA12–SA15 SA16–SA19 SA20–SA23 SA24–SA27 SA28–SA31 SA32–SA35 SA36–SA39 SA40–SA43 SA44–SA47 SA48–SA51 SA52–SA55 SA56–SA59 SA60–SA63 SA64–SA67 SA68–SA71 SA72–SA75 SA76–SA79 SA80–SA83 SA84–SA87 SA88–SA91 SA92–SA95 SA96–SA99 SA100–SA103 SA104–SA107 SA108–SA111 SA112–SA115 SA116–SA119 SA120–SA123 A23–A15 000000000 000000001 000000010 000000011 0000001xx 0000010xx 0000011xx 0000100xx 0000101xx 0000110xx 0000111xx 0001000xx 0001001xx 0001010xx 0001011xx 0001100xx 0001101xx 0001110xx 0001111xx 0010000xx 0010001xx 0010010xx 0010011xx 0010100xx 0010101xx 0010110xx 0010111xx 0011000xx 0011001xx 0011010xx 0011011xx 0011100xx 0011101xx 0011110xx S29GL256M Sector Group Protection/Unprotection Addresses Sector Group SA124–SA127 SA128–SA131 SA132–SA135 SA136–SA139 SA140–SA143 SA144–SA147 SA148–SA151 SA152–SA155 SA156–SA159 SA160–SA163 SA164–SA167 SA168–SA171 SA172–SA175 SA176–SA179 SA180–SA183 SA184–SA187 SA188–SA191 SA192–SA195 SA196–SA199 SA200–SA203 SA204–SA207 SA208–SA211 SA212–SA215 SA216–SA219 SA220–SA223 SA224–SA227 SA228–SA231 SA232–SA235 SA236–SA239 SA240–SA243 SA244–SA247 SA248–SA251 SA252–SA255 SA256–SA259 A23–A15 0011111xx 0100000xx 0100001xx 0100010xx 0100011xx 0100100xx 0100101xx 0100110xx 0100111xx 0101000xx 0101001xx 0101010xx 0101011xx 0101100xx 0101101xx 0101110xx 0101111xx 0110000xx 0110001xx 0110010xx 0110011xx 0110100xx 0110101xx 0110110xx 0110111xx 0111000xx 0111001xx 0111010xx 0111011xx 0111100xx 0111101xx 0111110xx 0111111xx 1000000xx Sector Group SA260–SA263 SA264–SA267 SA268–SA271 SA276–SA279 SA276–SA279 SA280–SA283 SA284–SA287 SA288–SA291 SA292–SA295 SA296–SA299 SA300–SA303 SA304–SA307 SA308–SA311 SA312–SA315 SA316–SA319 SA320–SA323 SA324–SA327 SA328–SA331 SA332–SA335 SA336–SA339 SA340–SA343 SA344–SA347 SA348–SA351 SA352–SA355 SA356–SA359 SA360–SA363 SA364–SA367 SA368–SA371 SA372–SA375 SA376–SA379 SA380–SA383 SA384–SA387 SA388–SA391 A23–A15 1000001xx 1000010xx 1000011xx 1000101xx 1000101xx 1000110xx 1000111xx 1001000xx 1001001xx 1001010xx 1001011xx 1001100xx 1001101xx 1001110xx 1001111xx 1010000xx 1010001xx 1010010xx 1010011xx 1010100xx 1010101xx 1010110xx 1010111xx 1011000xx 1011001xx 1011010xx 1011011xx 1011100xx 1011101xx 1011110xx 1011111xx 1100000xx 1100001xx Sector Group SA392–SA395 SA396–SA399 SA400–SA403 SA404–SA407 SA408–SA411 SA412–SA415 SA416–SA419 SA420–SA423 SA424–SA427 SA428–SA431 SA432–SA435 SA436–SA439 SA440–SA443 SA444–SA447 SA448–SA451 SA452–SA455 SA456–SA459 SA460–SA463 SA464–SA467 SA468–SA471 SA472–SA475 SA476–SA479 SA480–SA483 SA484–SA487 SA488–SA491 SA492–SA495 SA496–SA499 SA500–SA503 SA504–SA507 SA508 SA509 SA510 SA511 A23–A15 1100010xx 1100011xx 1100100xx 1100101xx 1100110xx 1100111xx 1101000xx 1101001xx 1101010xx 1101011xx 1101100xx 1101101xx 1101110xx 1101111xx 1110000xx 1110001xx 1110010xx 1110011xx 1110100xx 1110101xx 1110110xx 1110111xx 1111000xx 1111001xx 1111010xx 1111011xx 1111100xx 1111101xx 1111110xx 111111100 111111101 111111110 111111111 52 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Temporary Sector Group Unprotect This feature allows temporary unprotection of previously protected sector groups to change data in-system. The Sector Group Unprotect mode is activated by setting the RESET# pin to VID. During this mode, formerly protected sector groups can be programmed or erased by selecting the sector group addresses. Once VID is removed from the RESET# pin, all the previously protected sector groups are protected again. For this feature, Figure 1 shows the algorithm, and Figure 23 shows the timing diagrams. START RESET# = VID (Note 1) Perform Erase or Program Operations RESET# = VIH Temporary Sector Group Unprotect Completed (Note 2) Notes: 1. All protected sector groups unprotected (If WP# = VIL, the highest or lowest address sector remains protected for uniform sector devices, the top or bottom two address sectors remains protected for boot sector devices). 2. All previously protected sector groups are protected once again. Figure 1. Temporary Sector Group Unprotect Operation October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 53 Data Sheet START PLSCNT = 1 RESET# = VID Wait 1 μs Protect all sector groups: The indicated portion of the sector group protect algorithm must be performed for all unprotected sector groups prior to issuing the first sector group unprotect address START PLSCNT = 1 RESET# = VID Wait 1 μs Temporary Sector Group Unprotect Mode No First Write Cycle = 60h? First Write Cycle = 60h? No Temporary Sector Group Unprotect Mode Yes Set up sector group address No Yes All sector groups protected? Yes Set up first sector group address Sector Group Unprotect: Write 60h to sector group address with A6–A0 = 1xx0010 Reset PLSCNT = 1 Sector Group Protect: Write 60h to sector group address with A6–A0 = 0xx0010 Wait 150 µs Increment PLSCNT Verify Sector Group Protect: Write 40h to sector group address with A6–A0 = 0xx0010 Wait 15 ms Read from sector group address with A6–A0 = 0xx0010 No No PLSCNT = 25? Data = 01h? Increment PLSCNT Verify Sector Group Unprotect: Write 40h to sector group address with A6–A0 = 1xx0010 Yes Yes Protect another sector group? No Remove VID from RESET# Yes Read from sector group address with A6–A0 = 1xx0010 No Set up next sector group address Data = 00h? No PLSCNT = 1000? Yes Device failed Yes Device failed Write reset command Last sector group verified? Yes Remove VID from RESET# No Sector Group Protect Algorithm Sector Group Protect complete Sector Group Unprotect Algorithm Write reset command Sector Group Unprotect complete Figure 2. In-System Sector Group Protect/Sector Group Unprotect Algorithms 54 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Secured Silicon Sector Flash Memory Region The Secured Silicon Sector feature provides a Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). The Secured Silicon Sector is 256 bytes in length, and uses a Secured Silicon Sector Indicator Bit (DQ7) to indicate whether or not the Secured Silicon Sector is locked when shipped from the factory. This bit is permanently set at the factory and cannot be changed, which prevents cloning of a factory locked part. This ensures the security of the ESN once the product is shipped to the field. The factory offers the device with the Secured Silicon Sector either customer lockable (standard shipping option) or factory locked (contact a Spansion sales representative for ordering information). The customer-lockable version is shipped with the Secured Silicon Sector unprotected, allowing customers to program the sector after receiving the device. The customer-lockable version also has the Secured Silicon Sector Indicator Bit permanently set to a “0.” The factory-locked version is always protected when shipped from the factory, and has the Secured Silicon (Secured Silicon) Sector Indicator Bit permanently set to a “1.” Thus, the Secured Silicon Sector Indicator Bit prevents customer-lockable devices from being used to replace devices that are factory locked. Note: The ACC function and unlock bypass modes are not available when the Secured Silicon Sector is enabled. The Secured Silicon sector address space in this device is allocated as follows: Secured Silicon Sector Address Range x16 000000h – 000007h 000008h – 00007Fh x8 000000h – 00000Fh 000010h – 0000FFh Standard Factory Locked ESN Unavailable ExpressFlash Factory Locked ESN or determined by customer Determined by customer Customer Lockable Determined by customer The system accesses the Secured Silicon Sector through a command sequence (see Write Protect (WP#)). After the system writes the Enter Secured Silicon Sector command sequence, it may read the Secured Silicon Sector by using the addresses normally occupied by the first sector (SA0). This mode of operation continues until the system issues the Exit Secured Silicon Sector command sequence, or until power is removed from the device. On power-up, or following a hardware reset, the device reverts to sending commands to sector SA0. Customer Lockable: Secured Silicon Sector Not Programmed or Protected At the Factory Unless otherwise specified, the device is shipped such that the customer may program and protect the 256-byte Secured Silicon sector. The system may program the Secured Silicon Sector using the write-buffer, accelerated and/or unlock bypass methods, in addition to the standard programming command sequence (see Command Definitions). Programming and protecting the Secured Silicon Sector must be used with caution since, once protected, there is no procedure available for unprotecting the Secured Silicon Sector area and none of the bits in the Secured Silicon Sector memory space can be modified in any way. The Secured Silicon Sector area can be protected using one of the following procedures: Write the three-cycle Enter Secured Silicon Sector Region command sequence, and then follow the in-system sector protect algorithm as shown in Figure 2, except that RESET# may be at either VIH or VID. This allows in-system protection of the Secured Silicon Sector without raising any device pin to a high voltage. Note that this method is only applicable to the Secured Silicon Sector. Write the three-cycle Enter Secured Silicon Sector Region command sequence and then use the alternate method of sector protection described in the “Sector Group Protection and Unprotection” section. Once the Secured Silicon Sector is programmed, locked, and verified, the system must write the Exit Secured Silicon Sector Region command sequence to return to reading and writing within the remainder of the array. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 55 Data Sheet Factory Locked: Secured Silicon Sector Programmed and Protected At the Factory In devices with an ESN, the Secured Silicon Sector is protected when the device is shipped from the factory. The Secured Silicon Sector cannot be modified in any way. An ESN Factory Locked device has an 16-byte random ESN at addresses 000000h–000007h. Please contact your sales representative for details on ordering ESN Factory Locked devices. Customers may opt to have their code programmed by the factory through the Spansion programming service (Customer Factory Locked). The devices are then shipped from the factory with the Secured Silicon Sector permanently locked. Contact your sales representative for details on using the Spansion programming service. Write Protect (WP#) The Write Protect function provides a hardware method of protecting the first or last sector group without using VID. Write Protect is one of two functions provided by the WP#/ACC input. If the system asserts VIL on the WP#/ACC pin, the device disables program and erase functions in the first or last sector group independently of whether those sector groups were protected or unprotected. Note that if WP#/ACC is at VIL when the device is in the standby mode, the maximum input load current is increased (Table 29). Note: If the system asserts VIH on the WP#/ACC pin, the device reverts to whether the first or last sector was previously set to be protected or unprotected using the method described in “Sector Group Protection and Unprotection”. Note that WP# has an internal pullup; when unconnected, WP# is at VIH. Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (Table 34 and Table 35 contain command definitions). In addition, the following hardware data protection measures prevent accidental erasure or programming, which might otherwise be caused by spurious system level signals during VCC power-up and power-down transitions, or from system noise. Low VCC Write Inhibit When VCC is less than VLKO, the device does not accept any write cycles. This protects data during VCC power-up and power-down. The command register and all internal program/erase circuits are disabled, and the device resets to the read mode. Subsequent writes are ignored until VCC is greater than VLKO. The system must provide the proper signals to the control pins to prevent unintentional writes when VCC is greater than VLKO. Write Pulse “Glitch” Protection Noise pulses of less than 3 ns (typical) on OE#, CE# or WE# do not initiate a write cycle. Logical Inhibit Write cycles are inhibited by holding any one of OE# = VIL, CE# = VIH or WE# = VIH. To initiate a write cycle, CE# and WE# must be a logical zero while OE# is a logical one. Power-Up Write Inhibit If WE# = CE# = VIL and OE# = VIH during power up, the device does not accept commands on the rising edge of WE#. The internal state machine is automatically reset to the read mode on power-up. 56 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Common Flash Memory Interface (CFI) The Common Flash Interface (CFI) specification outlines device and host system software interrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices. Software support can then be device-independent, JEDEC ID-independent, and forward- and backward-compatible for the specified flash device families. Flash vendors can standardize their existing interfaces for long-term compatibility. This device enters the CFI Query mode when the system writes the CFI Query command, 98h, to address 55h, any time the device is ready to read array data. The system can read CFI information at the addresses given in Table 30 through Table 33. To terminate reading CFI data, the system must write the reset command. The system can also write the CFI query command when the device is in the autoselect mode. The device enters the CFI query mode, and the system can read CFI data at the addresses given in Table 30 through Table 33. The system must write the reset command to return the device to reading array data. For further information, please refer to the CFI Specification and CFI Publication 100. Alternatively, contact your sales representative for copies of these documents. Table 30. CFI Query Identification String Addresses(x16) 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah Addresses(x8) 20h 22h 24h 26h 28h 2Ah 2Ch 2Eh 30h 32h 34h Data Description 0051h 0052h Query Unique ASCII string “QRY” 0059h 0002h Primary OEM Command Set 0000h 0040h Address for Primary Extended Table 0000h 0000h Alternate OEM Command Set (00h = none exists) 0000h 0000h Address for Alternate OEM Extended Table 0000h (00h = none exists) Table 31. Addresses (x16) 1Bh 1Ch 1Dh 1Eh 1Fh 20h 21h 22h 23h 24h 25h 26h Addresses (x8) 36h 38h 3Ah 3Ch 3Eh 40h 42h 44h 46h 48h 4Ah 4Ch Data System Interface String Description VCC Min. (write/erase) 0027h D7–D4: volt, D3–D0: 100 millivolt 0036h VCC Max. (write/erase) D7–D4: volt, D3–D0: 100 millivolt 0000h VPP Min. voltage (00h = no VPP pin present) 0000h VPP Max. voltage (00h = no VPP pin present) 0007h Reserved for future use 0007h Typical timeout for Min. size buffer write 2N µs (00h = not supported) 000Ah Typical timeout per individual block erase 2N ms 0000h Typical timeout for full chip erase 2N ms (00h = not supported) 0001h Reserved for future use 0005h Max. timeout for buffer write 2N times typical 0004h Max. timeout per individual block erase 2N times typical 0000h Max. timeout for full chip erase 2N times typical (00h = not supported) Note: CFI data related to VCC and time-outs may differ from actual VCC and time-outs of the product. Please consult the Ordering Information tables to obtain the VCC range for particular part numbers. See the Erase and Programming Performance table for typical timeout specifications. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 57 Data Sheet Table 32. Addresses (x16) 27h Addresses (x8) 4Eh Data 0019h 0018h 0017h 0016h 000xh 0000h 0005h 0000h 0001h 0002h 00xxh 000xh 00x0h 000xh 00xxh 0000h 0000h 000xh 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h Device Geometry Definition Description Device Size = 2N byte 19 = 256 Mb, 18 = 128 Mb, 17 = 64 Mb, 16 = 32 Mb Flash Device Interface description (refer to CFI publication 100) 0000h = x8-only bus devices 0001h = x16-only bus devices 0002h = x8/x16 bus devices Max. number of byte in multi-byte write = 2N (00h = not supported) Number of Erase Block Regions within device (01h = uniform device, 02h = boot device) Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) 003Fh, 0000h, 0000h, 0001h = 32 Mb (-R0, -R1, -R2, R5, R6) 007Fh, 0000h, 0020h, 0000h = 32 Mb (-R3, -R4), 64 Mb (-R3, -R4) 007Fh, 0000h, 0000h, 0001h = 64 Mb (-R0, -R1, -R2, -R5, -R6, -R7) 00FFh, 0000h, 0000h, 0001h = 128 Mb 00FFh, 0001h, 0000h, 0001h = 256 Mb Erase Block Region 2 Information (refer to CFI publication 100) 003Eh, 0000h, 0000h, 0001h = 32 Mb (-R1, -R2) 007Eh, 0000h, 0000h, 0001h = 64 Mb (-R1, -R2) 0000h, 0000h, 0000h, 0000h = all others Erase Block Region 3 Information (refer to CFI publication 100) 28h 29h 2Ah 2Bh 2Ch 50h 52h 54h 56h 58h 2Dh 2Eh 2Fh 30h 31h 32h 33h 34h 35h 36h 37h 38h 39h 3Ah 3Bh 3Ch 5Ah 5Ch 5Eh 60h 60h 64h 66h 68h 6Ah 6Ch 6Eh 70h 72h 74h 76h 78h Erase Block Region 4 Information (refer to CFI publication 100) 58 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Table 33. Addresses (x16) 40h 41h 42h 43h 44h Addresses (x8) 80h 82h 84h 86h 88h Primary Vendor-Specific Extended Query Data 0050h 0052h 0049h 0031h 0033h Description Query-unique ASCII string “PRI” Major version number, ASCII Minor version number, ASCII Address Sensitive Unlock (Bits 1-0) 0 = Required, 1 = Not Required Process Technology (Bits 7-2) 0010b = 0.23 μm MirrorBit 0009h = x8-only bus devices 0008h = all other devices Erase Suspend 0 = Not Supported, 1 = To Read Only, 2 = To Read & Write Sector Protect 0 = Not Supported, X = Number of sectors in per group Sector Temporary Unprotect 00 = Not Supported, 01 = Supported Sector Protect/Unprotect scheme 0004h = Standard Mode (Refer to Text) Simultaneous Operation 00 = Not Supported, X = Number of Sectors in Bank Burst Mode Type 00 = Not Supported, 01 = Supported Page Mode Type 00 = Not Supported, 01 = 4 Word Page, 02 = 8 Word Page ACC (Acceleration) Supply Minimum 00h = Not Supported, D7-D4: Volt, D3-D0: 100 mV ACC (Acceleration) Supply Maximum 00h = Not Supported, D7-D4: Volt, D3-D0: 100 mV Top/Bottom Boot Sector Flag 00h = Uniform Device without WP# protect, 02h = Bottom Boot Device, 03h = Top Boot Device, 04h = Uniform sectors bottom WP# protect, 05h = Uniform sectors top WP# protect Program Suspend< 00h = Not Supported, 01h = Supported 45h 8Ah 000xh 46h 47h 48h 49h 4Ah 4Bh 4Ch 4Dh 4Eh 8Ch 8Eh 90h 92h 94h 96h 98h 9Ah 9Ch 0002h 0001h 0001h 0004h 0000h 0000h 0001h 00B5h 00C5h 4Fh 9Eh 00xxh 50h A0h 0001h October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 59 Data Sheet Command Definitions Writing specific address and data commands or sequences into the command register initiates device operations. Table 34 and Table 35 define the valid register command sequences. Writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. A reset command is then required to return the device to reading array data. All addresses are latched on the falling edge of WE# or CE#, whichever happens later. All data is latched on the rising edge of WE# or CE#, whichever happens first. See AC Characteristics for timing diagrams. Reading Array Data The device is automatically set to reading array data after device power-up. No commands are required to retrieve data. The device is ready to read array data after completing an Embedded Program or Embedded Erase algorithm. After the device accepts an Erase Suspend command, the device enters the erase-suspend-read mode, after which the system can read data from any non-erase-suspended sector. After completing a programming operation in the Erase Suspend mode, the system may once again read array data with the same exception. See Erase Suspend/Erase Resume Commands for more information. The system must issue the reset command to return the device to the read (or erase-suspendread) mode if DQ5 goes high during an active program or erase operation, or if the device is in the autoselect mode. See the next section, Reset Command, for more information. See also Requirements for Reading Array Data in the Device Bus Operations section for more information. The Read-Only Operations–AC Characteristics provides the read parameters, and Figure 13 shows the timing diagram. Reset Command Writing the reset command resets the device to the read or erase-suspend-read mode. Address bits are don’t cares for this command. The reset command may be written between the sequence cycles in an erase command sequence before erasing begins. This resets the device to the read mode. Once erasure begins, however, the device ignores reset commands until the operation is complete. The reset command may be written between the sequence cycles in a program command sequence before programming begins. This resets the device to the read mode. If the program command sequence is written while the device is in the Erase Suspend mode, writing the reset command returns the device to the erase-suspend-read mode. Once programming begins, however, the device ignores reset commands until the operation is complete. The reset command may be written between the sequence cycles in an autoselect command sequence. Once in the autoselect mode, the reset command must be written to return to the read mode. If the device entered the autoselect mode while in the Erase Suspend mode, writing the reset command returns the device to the erase-suspend-read mode. If DQ5 goes high during a program or erase operation, writing the reset command returns the device to the read mode (or erase-suspend-read mode if the device was in Erase Suspend). Note that if DQ1 goes high during a Write Buffer Programming operation, the system must write the Write-to-Buffer-Abort Reset command sequence to reset the device for the next operation. 60 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Autoselect Command Sequence The autoselect command sequence allows the host system to read several identifier codes at specific addresses: Identifier Code Manufacturer ID Device ID, Cycle 1 Device ID, Cycle 2 Device ID, Cycle 3 Secured Silicon Sector Factory Protect Sector Protect Verify Note: 3.The device ID is read over three cycles. SA = Sector Address A7:A0 (x16) 00h 01h 0Eh 0Fh 03h (SA)02h A6:A-1 (x8) 00h 02h 1Ch 1Eh 06h (SA)04h The autoselect command sequence is initiated by first writing two unlock cycles. This is followed by a third write cycle that contains the autoselect command. The device then enters the autoselect mode. The system may read at any address any number of times without initiating another autoselect command sequence: The system must write the reset command to return to the read mode (or erase-suspend-read mode if the device was previously in Erase Suspend). Enter/Exit Secured Silicon Sector Command Sequence The Secured Silicon Sector region provides a secured data area containing an 8-word/16-byte random Electronic Serial Number (ESN). The system can access the Secured Silicon Sector region by issuing the three-cycle Enter Secured Silicon Sector command sequence. The device continues to access the Secured Silicon Sector region until the system issues the four-cycle Exit Secured Silicon Sector command sequence. The Exit Secured Silicon Sector command sequence returns the device to normal operation. Table 34 and Table 35 show the address and data requirements for both command sequences. Also, see Secured Silicon Sector Flash Memory Region for further information. Note that the ACC function and unlock bypass modes are not available when the Secured Silicon Sector is enabled. Word Program Command Sequence Programming is a four-bus-cycle operation. The program command sequence is initiated by writing two unlock write cycles, followed by the program set-up command. The program address and data are written next, which in turn initiate the Embedded Program algorithm. The system is not required to provide further controls or timings. The device automatically provides internally generated program pulses and verifies the programmed cell margin. Table 34 and Table 35 show the address and data requirements for the word program command sequence, respectively. When the Embedded Program algorithm is complete, the device then returns to the read mode and addresses are no longer latched. The system can determine the status of the program operation by using DQ7 or DQ6. See Write Operation Status for information on these status bits. Any commands written to the device during the Embedded Program Algorithm are ignored. Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when a program operation is in progress. Note that a hardware reset immediately terminates the program operation. The program command sequence should be reinitiated once the device returns to the read mode, to ensure data integrity. Programming is allowed in any sequence of address locations and across sector boundaries. Programming to the same word address multiple times without intervening erases (incremental bit programming) requires a modified programming method. For such application requirements, please contact your local Spansion representative. Word programming is supported for backward compatibility with existing Flash driver software and for occasional writing of individual words. Use of write buffer programming (see below) is strongly recommended for general programming use when more than a few words are to be programmed. The effective word programming time using write buffer programming is approximately four times shorter than the single word programming time. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 61 Data Sheet Any bit in a word cannot be programmed from “0” back to a “1.” Attempting to do so may cause the device to set DQ5=1, or cause DQ7 and DQ6 status bits to indicate the operation was successful. However, a succeeding read shows that the data is still “0.” Only erase operations can convert a “0” to a “1.” Unlock Bypass Command Sequence The unlock bypass feature allows the system to program words to the device faster than using the standard program command sequence. The unlock bypass command sequence is initiated by first writing two unlock cycles. This is followed by a third write cycle containing the unlock bypass command, 20h. The device then enters the unlock bypass mode. A two-cycle unlock bypass mode command sequence is all that is required to program in this mode. The first cycle in this sequence contains the unlock bypass program command, A0h; the second cycle contains the program address and data. Additional data is programmed in the same manner. This mode dispenses with the initial two unlock cycles required in the standard program command sequence, resulting in faster total programming time. Table 34 and Table 35 show the requirements for the command sequence. During the unlock bypass mode, only the Unlock Bypass Program and Unlock Bypass Reset commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock bypass reset command sequence. The first cycle must contain the data 90h. The second cycle must contain the data 00h. The device then returns to the read mode. Write Buffer Programming Write Buffer Programming allows the system write to a maximum of 16 words/32 bytes in one programming operation. This results in faster effective programming time than the standard programming algorithms. The Write Buffer Programming command sequence is initiated by first writing two unlock cycles. This is followed by a third write cycle containing the Write Buffer Load command written at the Sector Address in which programming occurs. The fourth cycle writes the sector address and the number of word locations, minus one, to be programmed. For example, if the system programs six unique address locations, then 05h should be written to the device. This tells the device how many write buffer addresses are loaded with data and therefore when to expect the Program Buffer to Flash command. The number of locations to program cannot exceed the size of the write buffer or the operation aborts. The fifth cycle writes the first address location and data to be programmed. The write-buffer-page is selected by address bits AMAX–A4. All subsequent address/data pairs must fall within the selected-write-buffer-page. The system then writes the remaining address/data pairs into the write buffer. Write buffer locations may be loaded in any order. The write-buffer-page address must be the same for all address/data pairs loaded into the write buffer. (This means Write Buffer Programming cannot be performed across multiple write-buffer pages.) This also means that Write Buffer Programming cannot be performed across multiple sectors. If the system attempts to load programming data outside of the selected write-buffer page, the operation aborts. Note that if a Write Buffer address location is loaded multiple times, the address/data pair counter is decremented for every data load operation. The host system must therefore account for loading a write-buffer location more than once. The counter decrements for each data load operation, not for each unique write-buffer-address location. Note also that if an address location is loaded more than once into the buffer, the final data loaded for that address is programmed. Once the specified number of write buffer locations are loaded, the system must then write the Program Buffer to Flash command at the sector address. Any other address and data combination aborts the Write Buffer Programming operation. The device then begins programming. Data polling should be used while monitoring the last address location loaded into the write buffer. DQ7, DQ6, DQ5, and DQ1 should be monitored to determine the device status during Write Buffer Programming. The write-buffer programming operation can be suspended using the standard program suspend/ resume commands. Upon successful completion of the Write Buffer Programming operation, the device is ready to execute the next command. The Write Buffer Programming Sequence can be aborted in the following ways: Load a value that is greater than the page buffer size during the Number of Locations to Program step. 62 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Write to an address in a sector different than the one specified during the Write-Buffer-Load command. Write an Address/Data pair to a different write-buffer-page than the one selected by the Starting Address during the write buffer data loading stage of the operation. Write data other than the Confirm Command after the specified number of data load cycles. The abort condition is indicated by DQ1 = 1, DQ7 = DATA# (for the last address location loaded), DQ6 = toggle, and DQ5=0. A Write-to-Buffer-Abort Reset command sequence must be written to reset the device for the next operation. Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when a program operation is in progress. This flash device is capable of handling multiple write buffer programming operations on the same write buffer address range without intervening erases. For applications requiring incremental bit programming, a modified programming method is required; please contact your local Spansion representative. Any bit in a write buffer address range cannot be programmed from “0” back to a “1.” Attempting to do so can cause the device to set DQ5=1, of cause the DQ7 and DQ6 status bits to indicate the operation was successful. However, a succeeding read shows that the data is still “0.” Only erase operations can convert a “0” to a “1.” Accelerated Program The device offers accelerated program operations through the WP#/ACC or ACC pin depending on the particular product. When the system asserts VHH on the WP#/ACC or ACC pin. The device uses the higher voltage on the WP#/ACC or ACC pin to accelerate the operation. Note that the WP#/ACC pin must not be at VHH for operations other than accelerated programming, or device damage can result. WP# has an internal pullup; when unconnected, WP# is at VIH. Figure 3 illustrates the algorithm for the program operation. See Erase and Program Operations— S29GL032M Only and AC Characteristics for parameters, and Figure 14 for timing diagrams. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 63 Data Sheet Write “Write to Buffer” command and Sector Address Write number of addresses to program minus 1(WC) and Sector Address Part of “Write to Buffer” Command Sequence Write first address/data Yes WC = 0 ? No Abort Write to Buffer Operation? No Yes Write to buffer ABORTED. Must write “Write-to-buffer Abort Reset” command sequence to return to read mode. Write to a different sector address (Note 1) Write next address/data pair WC = WC - 1 Write program buffer to flash sector address Read DQ7 - DQ0 at Last Loaded Address DQ7 = Data? No No DQ1 = 1? Yes DQ5 = 1? Yes Read DQ7 - DQ0 with address = Last Loaded Address No Yes Notes: 1. When Sector Address is specified, any address in the selected sector is acceptable. However, when loading Write-Buffer address locations with data, all addresses must fall within the selected Write-Buffer Page. 2. DQ7 may change simultaneously with DQ5. Therefore, DQ7 should be verified. 3. If this flowchart location was reached because DQ5= “1”, then the device FAILED. If this flowchart location was reached because DQ1= “1”, then the Write to Buffer operation was ABORTED. In either case, the proper reset command must be written before the device can begin another operation. If DQ1=1, write the Write-Buffer-ProgrammingAbort-Reset command. if DQ5=1, write the Reset command. 4. See Table 34 and Table 35 for command sequences required for write buffer programming. (Note 2) DQ7 = Data? No Yes (Note 3) FAIL or ABORT PASS Figure 3. Write Buffer Programming Operation 64 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet START Write Program Command Sequence Embedded Program algorithm in progress Data Poll from System Verify Data? No Yes No Increment Address Last Address? Yes Programming Completed Note: See Table 34 and Table 35 for program command sequence Figure 4. Program Operation Program Suspend/Program Resume Command Sequence The Program Suspend command allows the system to interrupt a programming operation or a Write to Buffer programming operation so that data can be read from any non-suspended sector. When the Program Suspend command is written during a programming process, the device halts the program operation within 15 µs maximum (5 µs typical) and updates the status bits. Addresses are not required when writing the Program Suspend command. After the programming operation is suspended, the system can read array data from any nonsuspended sector. The Program Suspend command can also be issued during a programming operation while an erase is suspended. In this case, data can be read from any addresses not in Erase Suspend or Program Suspend. If a read is needed from the Secured Silicon Sector area (One-time Program area), then user must use the proper command sequences to enter and exit this region. Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when a program operation is in progress. The system can also write the autoselect command sequence when the device is in the Program Suspend mode. The system can read as many autoselect codes as required. When the device exits the autoselect mode, the device reverts to the Program Suspend mode, and is ready for another valid operation. See Autoselect Command Sequence for more information. After the Program Resume command is written, the device reverts to programming. The system can determine the status of the program operation using the DQ7 or DQ6 status bits, just as in the standard program operation. See Write Operation Status for more information. The system must write the Program Resume command (address bits are don’t care) to exit the Program Suspend mode and continue the programming operation. Further writes of the Resume command are ignored. Another Program Suspend command can be written after the device resumes programming. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 65 Data Sheet Program Operation or Write-to-Buffer Sequence in Progress Write address/data XXXh/B0h Write Program Suspend Command Sequence Command is also valid for Erase-suspended-program operations Wait 15 μs Read data as required Autoselect and SecSi Sector read operations are also allowed Data cannot be read from erase- or program-suspended sectors No Done reading? Yes Write address/data XXXh/30h Write Program Resume Command Sequence Device reverts to operation prior to Program Suspend Figure 5. Program Suspend/Program Resume Chip Erase Command Sequence Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the chip erase command, which in turn invokes the Embedded Erase algorithm. The device does not require the system to preprogram prior to erase. The Embedded Erase algorithm automatically preprograms and verifies the entire memory for an all zero data pattern prior to electrical erase. The system is not required to provide any controls or timings during these operations. Table 34 and Table 35 show the address and data requirements for the chip erase command sequence. When the Embedded Erase algorithm is complete, the device returns to the read mode and addresses are no longer latched. The system can determine the status of the erase operation by using DQ7, DQ6, or DQ2. See Write Operation Status for information on these status bits. Any commands written during the chip erase operation are ignored. However, note that a hardware reset immediately terminates the erase operation. If that occurs, the chip erase command sequence should be reinitiated once the device returns to reading array data, to ensure data integrity. Figure 6 illustrates the algorithm for the erase operation. See Erase and Programming Performance in AC Characteristics for parameters, and Figure 18 for timing diagrams. Sector Erase Command Sequence Sector erase is a six bus cycle operation. The sector erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock cycles are written, and are then followed by the address of the sector to be erased, and the sector erase command. Table 34 and Table 35 shows the address and data requirements for the sector erase command sequence. 66 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet The device does not require the system to preprogram prior to erase. The Embedded Erase algorithm automatically programs and verifies the entire memory for an all zero data pattern prior to electrical erase. The system is not required to provide any controls or timings during these operations. After the command sequence is written, a sector erase time-out of 50 µs occurs. During the timeout period, additional sector addresses and sector erase commands can be written. Loading the sector erase buffer can be done in any sequence, and the number of sectors can be from one sector to all sectors. The time between these additional cycles must be less than 50 µs, otherwise erasure may begin. Any sector erase address and command following the exceeded time-out can or cannot be accepted. It is recommended that processor interrupts be disabled during this time to ensure all commands are accepted. The interrupts can be re-enabled after the last Sector Erase command is written. Any command other than Sector Erase or Erase Suspend during the time-out period resets the device to the read mode. Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when an erase operation is in progress. The system must rewrite the command sequence and any additional addresses and commands. The system can monitor DQ3 to determine if the sector erase timer has timed out (See the section on DQ3: Sector Erase Timer.). The time-out begins from the rising edge of the final WE# pulse in the command sequence. When the Embedded Erase algorithm is complete, the device returns to reading array data and addresses are no longer latched. The system can determine the status of the erase operation by reading DQ7, DQ6, or DQ2 in the erasing sector. See Write Operation Status for information on these status bits. Once the sector erase operation starts, only the Erase Suspend command is valid. All other commands are ignored. However, note that a hardware reset immediately terminates the erase operation. If that occurs, the sector erase command sequence should be reinitiated once the device returns to reading array data, to ensure data integrity. Figure 6 illustrates the algorithm for the erase operation. See Erase and Programming Performance in AC Characteristics for parameters, and Figure 18 for timing diagrams. l START Write Erase Command Sequence (Notes 1, 2) Data Poll to Erasing Bank from System Embedded Erase algorithm in progress No Data = FFh? Yes Erasure Completed Notes: 1. See Table 34 and Table 35 for program command sequence. 2. See DQ3: Sector Erase Timer for information on the sector erase timer. Figure 6. Erase Operation October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 67 Data Sheet Erase Suspend/Erase Resume Commands The Erase Suspend command, B0h, allows the system to interrupt a sector erase operation and then read data from, or program data to, any sector not selected for erasure. This command is valid only during the sector erase operation, including the 50 µs time-out period during the sector erase command sequence. The Erase Suspend command is ignored if written during the chip erase operation or Embedded Program algorithm. When the Erase Suspend command is written during the sector erase operation, the device requires a typical of 5 µs (maximum of 20 µs) to suspend the erase operation. However, when the Erase Suspend command is written during the sector erase time-out, the device immediately terminates the time-out period and suspends the erase operation. After the erase operation is suspended, the device enters the erase-suspend-read mode. The system can read data from or program data to any sector not selected for erasure. (The device “erase suspends” all sectors selected for erasure.) Reading at any address within erase-suspended sectors produces status information on DQ7–DQ0. The system can use DQ7, or DQ6 and DQ2 together, to determine if a sector is actively erasing or is erase-suspended. See Write Operation Status for information on these status bits. After an erase-suspended program operation is complete, the device returns to the erase-suspend-read mode. The system can determine the status of the program operation using the DQ7 or DQ6 status bits, just as in the standard word program operation. See Write Operation Status for more information. In the erase-suspend-read mode, the system can also issue the autoselect command sequence. See Autoselect Mode and Autoselect Command Sequence for details. To resume the sector erase operation, the system must write the Erase Resume command. Further writes of the Resume command are ignored. Another Erase Suspend command can be written after the chip resumes erasing. Note: During an erase operation, this flash device performs multiple internal operations which are invisible to the system. When an erase operation is suspended, any of the internal operations that were not fully completed must be restarted. As such, if this flash device is continually issued suspend/resume commands in rapid succession, erase progress are impeded as a function of the number of suspends. The result is a longer cumulative erase time than without suspends. Note that the additional suspends do not affect device reliability or future performance. In most systems rapid erase/suspend activity occurs only briefly. In such cases, erase performance is not significantly impacted. 68 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Command Definitions Table 34. Command Sequence (Note 1) Read (6) Reset (7) Autoselect (Note 8) Manufacturer ID Device ID (9) Secured Silicon Sector Factory Protect (10) Sector Group Protect Verify (12) Cycles Command Definitions( x16 Mode, BYTE# = VIH) Bus Cycles (Notes 2–5) First Second Addr Data Third Addr Data Fourth Addr Data Fifth Addr Data Sixth Addr Data Addr RA XXX 555 555 555 555 555 555 555 555 SA 555 555 XXX XXX 555 555 XXX XXX 55 Data RD F0 AA AA AA AA AA AA AA AA 29 AA AA A0 90 AA AA B0 30 98 1 1 4 4 4 4 3 4 4 3 1 3 3 2 2 6 6 1 1 1 2AA 2AA 2AA 2AA 2AA 2AA 2AA 2AA 55 55 55 55 55 55 55 55 555 555 555 555 555 555 555 SA 90 90 90 90 88 90 A0 25 X00 X01 X03 (SA)X02 0001 227E (Note 10) 00/01 X0E (Note 18) X0F (Note 18) Enter Secured Silicon Sector Region Exit Secured Silicon Sector Region Program Write to Buffer (11) Program Buffer to Flash Write to Buffer Abort Reset (13) Unlock Bypass Unlock Bypass Program (14) Unlock Bypass Reset (15) Chip Erase Sector Erase Program/Erase Suspend (16) Program/Erase Resume (16) CFI Query (18) XXX PA SA 00 PD WC PA PD WBL PD 2AA 2AA PA XXX 2AA 2AA 55 55 PD 00 55 55 555 555 F0 20 555 555 80 80 555 555 AA AA 2AA 2AA 55 55 555 SA 10 30 Legend: X = Don’t care RA = Read Address of memory location to be read. RD = Read Data read from location RA during read operation. PA = Program Address. Addresses latch on falling edge of WE# or CE# pulse, whichever happens later. PD = Program Data for location PA. Data latches on rising edge of WE# or CE# pulse, whichever happens first. SA = Sector Address of sector to be verified (in autoselect mode) or erased. Address bits A21–A15 uniquely select any sector. WBL = Write Buffer Location. Address must be within same write buffer page as PA. WC = Word Count. Number of write buffer locations to load minus 1. 10. Data is 00h for an unprotected sector group and 01h for a protected sector group. 11. Total number of cycles in command sequence is determined by number of words written to write buffer. Maximum number of cycles in command sequence is 21, including “Program Buffer to Flash” command. 12. Command sequence resets device for next command after aborted write-to-buffer operation. 13. Unlock Bypass command is required prior to Unlock Bypass Program command. 14. Unlock Bypass Reset command is required to return to read mode when device is in unlock bypass mode. 15. System may read and program in non-erasing sectors, or enter autoselect mode, when in Erase Suspend mode. Erase Suspend command is valid only during a sector erase operation. 16. Erase Resume command is valid only during Erase Suspend mode. 17. Command is valid when device is ready to read array data or when device is in autoselect mode. 18. Refer to Table 17, AutoSelect Codes for individual Device IDs per device density and model number. Notes: 1. See Table 1 for description of bus operations. 2. All values are in hexadecimal. 3. Shaded cells indicate read cycles. All others are write cycles. 4. During unlock and command cycles, when lower address bits are 555 or 2AA as shown in table, address bits above A11 and data bits above DQ7 are don’t care. 5. No unlock or command cycles required when device is in read mode. 6. Reset command is required to return to read mode (or to erasesuspend-read mode if previously in Erase Suspend) when device is in autoselect mode, or if DQ5 goes high while device is providing status information. 7. Fourth cycle of the autoselect command sequence is a read cycle. Data bits DQ15–DQ8 are don’t care. Except for RD, PD and WC. See Autoselect Command Sequence for more information. 8. Device ID must be read in three cycles. 9. If WP# protects highest address sector, data is 98h for factory locked and 18h for not factory locked. If WP# protects lowest address sector, data is 88h for factory locked and 08h for not factor locked. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 69 Data Sheet Table 35. Command Definitions (x8 Mode, BYTE# = VIL) Command Sequence (Note 1) Read (6) Reset (7) Manufacturer ID Autoselect (Note 8) Device ID (9) Secured Silicon Sector Factory Protect (10) Sector Group Protect Verify (12) Enter Secured Silicon Sector Region Exit Secured Silicon Sector Region Write to Buffer (11) Program Buffer to Flash Write to Buffer Abort Reset (13) Chip Erase Sector Erase Program/Erase Suspend (14) Program/Erase Resume (15) CFI Query (16) Cycles Bus Cycles (Notes 2–5) First Second Third Addr Data Fourth Addr Data Addr Fifth Data Addr Sixth Data Addr Data Addr Data RA XXX AAA AAA AAA AAA AAA AAA AAA SA AAA AAA AAA XXX XXX AA RD F0 AA AA AA AA AA AA AA 29 AA AA AA B0 30 98 555 555 555 55 55 55 555 555 555 555 555 555 555 55 55 55 55 55 55 55 1 1 4 4 4 4 3 4 3 1 3 6 6 1 1 1 AAA AAA AAA AAA AAA AAA SA 90 90 90 90 88 90 25 X00 X02 X06 (SA)X04 01 7E (Note 10) 00/01 X1C (Note 17) X1E (Note 17) XXX SA 00 BC PA PD WBL PD AAA AAA AAA F0 80 80 AAA AAA AA AA 555 555 55 55 AAA SA 10 30 Legend: X = Don’t care RA = Read Address of memory location to be read. RD = Read Data read from location RA during read operation. PA = Program Address. Addresses latch on falling edge of WE# or CE# pulse, whichever happens later. PD = Program Data for location PA. Data latches on rising edge of WE# or CE# pulse, whichever happens first. SA = Sector Address of sector to be verified (in autoselect mode) or erased. Address bits A21–A15 uniquely select any sector. WBL = Write Buffer Location. Address must be within same write buffer page as PA. BC = Byte Count. Number of write buffer locations to load minus 1. 10. If WP# protects highest address sector, data is 98h for factory locked and 18h for not factory locked. If WP# protects lowest address sector, data is 88h for factory locked and 08h for not factor locked. 11. Data is 00h for an unprotected sector group and 01h for a protected sector group. 12. Total number of cycles in command sequence is determined by number of bytes written to write buffer. Maximum number of cycles in command sequence is 37, including “Program Buffer to Flash” command. 13. Command sequence resets device for next command after aborted write-to-buffer operation. 14. System may read and program in non-erasing sectors, or enter autoselect mode, when in Erase Suspend mode. Erase Suspend command is valid only during a sector erase operation. 15. Erase Resume command is valid only during Erase Suspend mode. 16. Command is valid when device is ready to read array data or when device is in autoselect mode. 17. Refer to Table 17, AutoSelect Codes for individual Device IDs per device density and model number. Notes: 1. 2. 3. 4. See Table 1 for description of bus operations. All values are in hexadecimal. Shaded cells indicate read cycles. All others are write cycles. During unlock and command cycles, when lower address bits are 555 or AAA as shown in table, address bits above A11 are don’t care. Unless otherwise noted, address bits A21–A11 are don’t cares. No unlock or command cycles required when device is in read mode. Reset command is required to return to read mode (or to erasesuspend-read mode if previously in Erase Suspend) when device is in autoselect mode, or if DQ5 goes high while device is providing status information. Fourth cycle of autoselect command sequence is a read cycle. Data bits DQ15–DQ8 are don’t care. See Autoselect Command Sequence section or more information. Device ID must be read in three cycles. 5. 6. 7. 8. 9. 70 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Write Operation Status The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 36 and the following subsections describe the function of these bits. DQ7 and DQ6 each offer a method for determining whether a program or erase operation is complete or in progress. The device also provides a hardware-based output signal, RY/BY#, to determine whether an Embedded Program or Erase operation is in progress or is completed. DQ7: Data# Polling The Data# Polling bit, DQ7, indicates to the host system whether an Embedded Program or Erase algorithm is in progress or completed, or whether the device is in Erase Suspend. Data# Polling is valid after the rising edge of the final WE# pulse in the command sequence. During the Embedded Program algorithm, the device outputs on DQ7 the complement of the datum programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend. When the Embedded Program algorithm is complete, the device outputs the datum programmed to DQ7. The system must provide the program address to read valid status information on DQ7. If a program address falls within a protected sector, Data# Polling on DQ7 is active for approximately 1 µs, then the device returns to the read mode. During the Embedded Erase algorithm, Data# Polling produces a “0” on DQ7. When the Embedded Erase algorithm is complete, or if the device enters the Erase Suspend mode, Data# Polling produces a “1” on DQ7. The system must provide an address within any of the sectors selected for erasure to read valid status information on DQ7. After an erase command sequence is written, if all sectors selected for erasing are protected, Data# Polling on DQ7 is active for approximately 100 µs, then the device returns to the read mode. If not all selected sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the selected sectors that are protected. However, if the system reads DQ7 at an address within a protected sector, the status may not be valid. Just prior to the completion of an Embedded Program or Erase operation, DQ7 can change asynchronously with DQ0–DQ6 while Output Enable (OE#) is asserted low. That is, the device can change from providing status information to valid data on DQ7. Depending on when the system samples the DQ7 output, it can read the status or valid data. Even if the device has completed the program or erase operation and DQ7 has valid data, the data outputs on DQ0–DQ6 may be still invalid. Valid data on DQ0–DQ7 appears on successive read cycles. Table 36 shows the outputs for Data# Polling on DQ7. Figure 7 shows the Data# Polling algorithm. Figure 17 shows the Data# Polling timing diagram. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 71 Data Sheet START Read DQ15–DQ0 Addr = VA DQ7 = Data? Yes No No DQ5 = 1? Yes Read DQ15–DQ0 Addr = VA DQ7 = Data? Yes No FAIL PASS Notes: 1. VA = Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 can change simultaneously with DQ5. Figure 7. Data# Polling Algorithm RY/BY#: Ready/Busy# The RY/BY# is a dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since RY/BY# is an open-drain output, several RY/BY# pins can be tied together in parallel with a pull-up resistor to VCC. If the output is low (Busy), the device is actively erasing or programming. (This includes programming in the Erase Suspend mode.) If the output is high (Ready), the device is in the read mode, the standby mode, or in the erase-suspend-read mode. Table 36 shows the outputs for RY/BY#. DQ6: Toggle Bit I Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or whether the device entered the Erase Suspend mode. Toggle Bit I may be read at any address, and is valid after the rising edge of the final WE# pulse in the command sequence (prior to the program or erase operation), and during the sector erase time-out. During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause DQ6 to toggle. The system may use either OE# or CE# to control the read cycles. When the operation is complete, DQ6 stops toggling. 72 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6 toggles for approximately 100 µs, then returns to reading array data. If not all selected sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the selected sectors that are protected. The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is erase-suspended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6 toggles. When the device enters the Erase Suspend mode, DQ6 stops toggling. However, the system must also use DQ2 to determine which sectors are erasing or erasesuspended. Alternatively, the system can use DQ7 (see the subsection on DQ7: Data# Polling). If a program address falls within a protected sector, DQ6 toggles for approximately 1 µs after the program command sequence is written, then returns to reading array data. DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program algorithm is complete. Table 36 shows the outputs for Toggle Bit I on DQ6. Figure 8 shows the toggle bit algorithm. Figure 20 shows the toggle bit timing diagrams. Figure 21 shows the differences between DQ2 and DQ6 in graphical form. Also, see DQ2: Toggle Bit II. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 73 Data Sheet START Read DQ7–DQ0 Read DQ7–DQ0 Toggle Bit = Toggle? Yes No No DQ5 = 1? Yes Read DQ7–DQ0 Twice Toggle Bit = Toggle? Yes Program/Erase Operation Not Complete, Write Reset Command No Program/Erase Operation Complete Note: The system should recheck the toggle bit even if DQ5 = “1” because the toggle bit may stop toggling as DQ5 changes to “1.” See the subsections on DQ6 and DQ2 for more information. Figure 8. Toggle Bit Algorithm DQ2: Toggle Bit II The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is erasesuspended. Toggle Bit II is valid after the rising edge of the final WE# pulse in the command sequence. DQ2 toggles when the system reads at addresses within those sectors that are selected for erasure. (The system may use either OE# or CE# to control the read cycles.) But DQ2 cannot distinguish whether the sector is actively erasing or is erase-suspended. DQ6, by comparison, indicates whether the device is actively erasing, or is in Erase Suspend, but cannot distinguish which sectors are selected for erasure. Thus, both status bits are required for sector and mode information. Refer to Table 36 to compare outputs for DQ2 and DQ6. 74 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Figure 8 shows the toggle bit algorithm in flowchart form, and the section “DQ2: Toggle Bit II” explains the algorithm, also see RY/BY#: Ready/Busy#. Figure 20 shows the toggle bit timing diagram. Figure 21 shows the differences between DQ2 and DQ6 in graphical form. Whenever the system initially begins reading toggle bit status, it must read DQ7–DQ0 at least twice in a row to determine whether a toggle bit is toggling. Typically, the system would note and store the value of the toggle bit after the first read. After the second read, the system would compare the new value of the toggle bit with the first. If the toggle bit is not toggling, the device has completed the program or erase operation. The system can read array data on DQ7–DQ0 on the following read cycle. However, if after the initial two read cycles, the system determines that the toggle bit is still toggling, the system also should note whether the value of DQ5 is high (see the section on DQ5). If it is, the system should then determine again whether the toggle bit is toggling, since the toggle bit may have stopped toggling just as DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed the program or erase operation. If it is still toggling, the device did not completed the operation successfully, and the system must write the reset command to return to reading array data. The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ5 did not go high. The system may continue to monitor the toggle bit and DQ5 through successive read cycles, determining the status as described in the previous paragraph. Alternatively, it may choose to perform other system tasks. In this case, the system must start at the beginning of the algorithm when it returns to determine the status of the operation (top of Figure 6). DQ5: Exceeded Timing Limits DQ5 indicates whether the program, erase, or write-to-buffer time exceeded a specified internal pulse count limit. Under these conditions DQ5 produces a “1,” indicating that the program or erase cycle was not successfully completed. The device may output a “1” on DQ5 if the system tries to program a “1” to a location that was previously programmed to “0.” Only an erase operation can change a “0” back to a “1.” Under this condition, the device halts the operation, and when the timing limit is exceeded, DQ5 produces a “1.” In all these cases, the system must write the reset command to return the device to the reading the array (or to erase-suspend-read if the device was previously in the erase-suspend-program mode). DQ3: Sector Erase Timer After writing a sector erase command sequence, the system may read DQ3 to determine whether or not erasure started. (The sector erase timer does not apply to the chip erase command.) If additional sectors are selected for erasure, the entire time-out also applies after each additional sector erase command. When the time-out period is complete, DQ3 switches from a “0” to a “1.” If the time between additional sector erase commands from the system can be assumed to be less than 50 µs, the system need not monitor DQ3(see Sector Erase Command Sequence). After the sector erase command is written, the system should read the status of DQ7 (Data# Polling) or DQ6 (Toggle Bit I) to ensure that the device accepted the command sequence, and then reads DQ3. If DQ3 is “1,” the Embedded Erase algorithm started; all further commands (except Erase Suspend) are ignored until the erase operation is complete. If DQ3 is “0,” the device accepts additional sector erase commands. To ensure the command was accepted, the system software should check the status of DQ3 prior to and following each subsequent sector erase command. If DQ3 is high on the second status check, the last command might not have been accepted. Table 36 shows the status of DQ3 relative to the other status bits. DQ1: Write-to-Buffer Abort DQ1 indicates whether a Write-to-Buffer operation was aborted. Under these conditions DQ1 produces a “1”. The system must issue the Write-to-Buffer-Abort-Reset command sequence to return the device to reading array data. See Write Buffer for more details. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 75 Data Sheet Table 36. Write Operation Status Status Standar Embedded Program Algorithm d Mode Embedded Erase Algorithm Program ProgramSuspend Suspend Mode Read Program-Suspended Sector Non-Program Suspended Sector 1 No toggle DQ7 (Note 2 ) DQ7# 0 DQ6 Toggle Toggle DQ5 (Note 1) 0 0 DQ3 N/A 1 DQ2 (Note 2) No toggle Toggle DQ1 0 N/A RY/BY# 0 0 1 1 N/A Toggle N/A 1 1 N/A N/A N/A N/A N/A N/A N/A 0 1 0 0 0 Invalid (not allowed) Data 0 Data DQ7# DQ7# DQ7# Toggle Toggle Toggle 0 0 0 Erase-Suspended Sector EraseSuspend Non-Erase Suspended Erase Suspend Read Sector Mode Erase-Suspend-Program (Embedded Program) WritetoBuffer Busy (Note 3) Abort (Note 4) Notes: 1. DQ5 switches to ‘1’ when an Embedded Program, Embedded Erase, or Write-to-Buffer operation exceeded the maximum timing limits. Refer to the section on DQ5 for more information. 2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details. 3. The Data# Polling algorithm should be used to monitor the last loaded write-buffer address location. 4. DQ1 switches to ‘1’ when the device aborts the write-to-buffer operation 76 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Absolute Maximum Ratings Storage Temperature, Plastic Packages . . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied . . . . . . . . . . . . . . –65°C to +125°C Voltage with Respect to Ground: VCC (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.5 V to +4.0 V . . . . . . . . . . . . A9, OE#, ACC and RESET# (Note 2)–0.5 V to +12.5 V All other pins (Note 1) . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC+0.5 V Output Short Circuit Current (Note 3). . . . . . . . . . . . . . . . . . . . . . . . 200 mA Notes: 1. Minimum DC voltage on input or I/Os is –0.5 V. During voltage transitions, inputs or I/Os may overshoot VSS to –2.0 V for periods of up to 20 ns. See Figure 9, Maximum Negative Overshoot Waveform. Maximum DC voltage on input or I/Os is VCC + 0.5 V. During voltage transitions, input or I/O pins may overshoot to VCC + 2.0 V for periods up to 20 ns. See Figure 10. Minimum DC input voltage on pins A9, OE#, ACC, and RESET# is –0.5 V. During voltage transitions, A9, OE#, ACC, and RESET# may overshoot VSS to –2.0 V for periods of up to 20 ns. See Figure 9. Maximum DC input voltage on pin A9, OE#, ACC, and RESET# is +12.5 V which may overshoot to +14.0V for periods up to 20 ns. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability. 2. 3. 4. 20 ns +0.8 V –0.5 V –2.0 V 20 ns 20 ns Figure 9. Maximum Negative Overshoot Waveform 20 ns VCC +2.0 V VCC +0.5 V 2.0 V 20 ns 20 ns Figure 10. Maximum Positive Overshoot Waveform Industrial (I) Devices Ambient Temperature (TA) . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Supply Voltages VCC for full voltage range . . . . . . . . . . . . . . . . . . . . . . . . . +2.7 V to +3.6 V VCC for regulated voltage range . . . . . . . . . . . . . . . . . . . . . +3.0 V to +3.6 V VIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC Note: Operating ranges define those limits between which the functionality of the device is guaranteed. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 77 Data Sheet DC Characteristics CMOS Compatible Parameter Symbol ILI ILIT ILR ILO Parameter Description (Notes) Input Load Current (1) A9, ACC Input Load Current Reset Leakage Current Output Leakage Current Test Conditions VIN = VSS to VCC, VCC = VCC max VCC = VCC max; A9 = 12.5 V VCC = VCC max; RESET# = 12.5 V VOUT = VSS to VCC, VCC = VCC max 1 MHz 5 MHz (4) ICC1 VCC Initial Read Current (2, 3) CE# = VIL, OE# = VIH 5 MHz (5) 10 MHz (4) 10 MHz (5) ICC2 ICC3 ICC4 ICC5 ICC6 VIL VIH VHH VID VOL VOH1 VOH2 VLKO VCC Intra-Page Read Current (2, 3) VCC Active Write Current (3, 4) VCC Standby Current (3) VCC Reset Current (3) Automatic Sleep Mode (3, 7) Input Low Voltage (1, 8) Input High Voltage 1, 8) Voltage for ACC Program Acceleration Voltage for Autoselect and Temporary Sector Unprotect Output Low Voltage (8) Output High Voltage Low VCC Lock-Out Voltage (9) VCC = 2.7 –3.6 V VCC = 2.7 –3.6 V IOL = 4.0 mA, VCC = VCC min IOH = –2.0 mA, VCC = VCC min IOH = –100 µA, VCC = VCC min 0.85 VCC VCC–0.4 2.3 2.5 CE# = VIL, OE# = VIH CE# = VIL, OE# = VIH CE#, RESET# = VCC ± 0.3 V, WP# = VIH RESET# = VSS ± 0.3 V, WP# = VIH VIH = VCC ± 0.3 V; -0.1< VIL ≤ 0.3 V, WP# = VIH –0.5 0.7 VCC 11.5 11.5 12.0 12.0 10 MHz 40 MHz 5 18 25 35 40 5 10 50 1 1 1 Min Typ Max ±1.0 35 35 ±1.0 20 25 35 50 60 20 40 60 5 5 5 0.8 VCC + 0.5 12.5 12.5 0.45 mA mA µA µA µA V V V V V V V V mA Uni t µA µA µA µA Notes: 1. On the WP#/ACC pin only, the maximum input load current when WP# = VIL is ±5.0 µA. 2. The ICC current listed is typically less than 3.5 mA/MHz, with OE# at VIH. 3. Maximum ICC specifications are tested with VCC = VCCmax. 4. S29GL032M, S29GL064M 5. S29GL128M, S29GL256M 6. ICC active while Embedded Erase or Embedded Program is in progress. 7. Automatic sleep mode enables the low power mode when addresses remain stable for tACC + 30 ns. 8. VCC voltage requirements. 9. Not 100% tested. 78 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Test Conditions 3.3 V Device Under Test CL 6.2 kΩ 2.7 kΩ Note: Diodes are IN3064 or equivalent Figure 11. Table 37. Test Condition Output Load Output Load Capacitance, CL (including jig capacitance) Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels (See Note) Output timing measurement reference levels Test Setup Test Specifications All Speeds 1 TTL gate 30 5 0.0 or VCC 0.5 VCC 0.5 VCC pF ns V V V Unit Key to Switching Waveforms WAVEFORM INPUTS Steady OUTPUTS Changing from H to L Changing from L to H Don’t Care, Any Change Permitted Does Not Apply Changing, State Unknown Center Line is High Impedance State (High Z) VCC 0.0 V Input 0.5 VCC Measurement Level 0.5 VCC Output Figure 12. Input Waveforms and Measurement Levels October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 79 Data Sheet AC Characteristics Read-Only Operations—S29GL256M Only Parameter JEDEC tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX Std. tRC tCE tOE tDF tDF tOH Description Read Cycle Time (Note 1) CE#, OE# = VIL OE# = VIL Test Setup Min Max Max Max Max Max Max Min Min Min Speed Options 10 100 100 100 30 30 16 16 0 0 10 11 100 100 100 30 30 Unit ns ns ns ns ns ns ns ns ns ns tACC Address to Output Delay Chip Enable to Output Delay tPACC Page Access Time Output Enable to Output Delay Chip Enable to Output High Z (Note 1) Output Enable to Output High Z (Note 1) Output Hold Time From Addresses, CE# or OE#, Whichever Occurs First Read tOEH Output Enable Hold Time (Note 1) Toggle and Data# Polling Notes: 1. Not 100% tested. 2. See Figure 11 and Table 37 for test specifications. Read-Only Operations—S29GL128M only Parameter JEDEC tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX Std. tRC tCE tOE tDF tDF tOH Description Read Cycle Time (Note 1) CE#, OE# = VIL OE# = VIL Test Setup Min Max Max Max Max Max Max Min Min Min Speed Options 90 90 90 90 25 25 16 16 0 0 10 10 100 100 100 30 30 Unit ns ns ns ns ns ns ns ns ns ns tACC Address to Output Delay Chip Enable to Output Delay tPACC Page Access Time Output Enable to Output Delay Chip Enable to Output High Z (Note 1) Output Enable to Output High Z (Note 1) Output Hold Time From Addresses, CE# or OE#, Whichever Occurs First Read tOEH Output Enable Hold Time (Note 1) Toggle and Data# Polling Notes: 1. Not 100% tested. 2. See Figure 11 and Table 37 for test specifications. 80 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Read-Only Operations—S29GL064M Only Parameter JEDEC tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX Std. tRC tCE tOE tDF tDF tOH Description Read Cycle Time (Note 1) CE#, OE# = VIL OE# = VIL Test Setup Min Max Max Max Max Max Max Min Min Min Speed Options 90 90 90 90 25 25 10 100 100 100 30 30 16 16 0 0 10 11 110 110 110 30 30 Unit ns ns ns ns ns ns ns ns ns ns tACC Address to Output Delay Chip Enable to Output Delay tPACC Page Access Time Output Enable to Output Delay Chip Enable to Output High Z (See Note) Output Enable to Output High Z (See Note) Output Hold Time From Addresses, CE# or OE#, Whichever Occurs First Read tOEH Output Enable Hold Time (See Note) Toggle and Data# Polling Note: Not 100% tested. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 81 Data Sheet AC Characteristics Read-Only Operations—S29GL032M only Parameter JEDEC tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX Std. tRC tCE tOE tDF tDF tOH Description Read Cycle Time (Note 1) CE#, OE# = VIL OE# = VIL Test Setup Min Max Max Max Max Max Max Min Min Min Speed Options 90 90 90 90 25 25 10 100 100 100 30 30 16 16 0 0 10 11 110 110 110 30 30 Unit ns ns ns ns ns ns ns ns ns ns tACC Address to Output Delay Chip Enable to Output Delay tPACC Page Access Time Output Enable to Output Delay Chip Enable to Output High Z (Note 1) Output Enable to Output High Z (Note 1) Output Hold Time From Addresses, CE# or OE#, Whichever Occurs First Read tOEH Output Enable Hold Time (Note 1) Toggle and Data# Polling Notes: 1. Not 100% tested. 2. See Figure 11 and Table 37 for test specifications. tRC Addresses CE# tRH tRH OE# tOEH WE# HIGH Z Outputs RESET# RY/BY# Output Valid tCE tOH HIGH Z tOE tDF Addresses Stable tACC 0V Figure 13. Read Operation Timings 82 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet AC Characteristics A23-A2 Same Page A1-A0* Aa tACC Ab tPACC Ac tPACC tPACC Ad Data Bus CE# OE# Qa Qb Qc Qd Note: Figure shows device in word mode. Addresses are A1–A-1 for byte mode. Figure 14. Page Read Timings Hardware Reset (RESET#) Parameter JEDEC Std. tReady tReady tRP tRH tRPD tRB Note: Not 100% tested. Description RESET# Pin Low (During Embedded Algorithms) to Read Mode (See Note) RESET# Pin Low (NOT During Embedded Algorithms) to Read Mode (See Note) RESET# Pulse Width Reset High Time Before Read (See Note) RESET# Input Low to Standby Mode (See Note) RY/BY# Output High to CE#, OE# pin Low Max Max Min Min Min Min All Speed Options 20 500 500 50 20 0 Unit µs ns ns ns µs ns October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 83 Data Sheet AC Characteristics RY/BY# CE#, OE# tRH RESET# tRP tReady Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms tReady RY/BY# tRB CE#, OE# tRH RESET# tRP Figure 15. Reset Timings 84 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet AC Characteristics Erase and Program Operations—S29GL256M Only Parameter JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX Std. tWC tAS tASO tAH tAHT tDS tDH tCEPH tOEPH tGHWL tELWL tWHEH tWLWH tWHDL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH tWHWH1 tWHWH2 tVHH tVCS tBUSY tPOLL Write Cycle Time (Note 1) Address Setup Time Address Setup Time to OE# low during toggle bit polling Address Hold Time Description Min Min Min Min Speed Options 10 100 0 15 45 0 45 0 20 20 0 0 0 35 30 240 60 54 0.5 250 50 100 4 110 sec ns µs ns µs µs 11 110 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns Address Hold Time From CE# or OE# high during toggle bit polling Min Data Setup Time Data Hold Time CE# High during toggle bit polling OE# High during toggle bit polling Read Recovery Time Before Write (OE# High to WE# Low) CE# Setup Time CE# Hold Time Write Pulse Width Write Pulse Width High Write Buffer Program Operation (Notes 2, 3) Single Word Program Operation (Note 2) Accelerated Single Word Program Operation (Note 2) Sector Erase Operation (Note 2) VHH Rise and Fall Time (Note 1) VCC Setup Time (Note 1) WE# High to RY/BY# Low Program Valid before Status Polling Min Min Min Min Min Min Min Min Min Typ Typ Typ Typ Min Min Min Ma x Notes: 1. Not 100% tested. 2. See Erase and Programming Performance for more information. 3. For 1–16 words/1–32 bytes programmed. 4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resumes (that is, the program resume command is written). If the suspend command was issued after tPOLL, status data is available immediately after programming resumes. See Figure 16. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 85 Data Sheet AC Characteristics Erase and Program Operations—S29GL128M Only Parameter JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX Std. tWC tAS tASO tAH tAHT tDS tDH tCEPH tOEPH tGHWL tELWL tWHEH tWLWH tWHDL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH tWHWH1 tWHWH2 tVHH tVCS tBUSY tPOLL Write Cycle Time (Note 1) Address Setup Time Address Setup Time to OE# low during toggle bit polling Address Hold Time Address Hold Time From CE# or OE# high during toggle bit polling Data Setup Time Data Hold Time CE# High during toggle bit polling OE# High during toggle bit polling Read Recovery Time Before Write (OE# High to WE# Low) CE# Setup Time CE# Hold Time Write Pulse Width Write Pulse Width High Write Buffer Program Operation (Notes 2, 3) Single Word Program Operation (Note 2) Accelerated Single Word Program Operation (Note 2) Sector Erase Operation (Note 2) VHH Rise and Fall Time (Note 1) VCC Setup Time (Note 1) WE# High to RY/BY# Low Program Valid before Status Polling Description Min Min Min Min Min Min Min Min Min Min Min Min Min Min Typ Typ Typ Typ Min Min Min Max 90 4 Speed Options 90 90 0 15 45 0 45 0 20 20 0 0 0 35 30 240 60 54 0.5 250 50 100 sec ns µs ns µs µs 10 100 Uni t ns ns ns ns ns ns ns ns ns ns ns ns ns ns Notes: 1. Not 100% tested. 2. See Erase and Programming Performance for more information 3. For 1–16 words/1–32 bytes programmed. 4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resumes (that is, the program resume command has been written). If the suspend command was issued after tPOLL, status data is available immediately after programming resumes. See Figure 16. 86 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet AC Characteristics Erase and Program Operations—S29GL064M Only Parameter JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX Std. tWC tAS tASO tAH tAHT tDS tDH tCEPH tOEPH tGHWL tELWL tWHEH tWLWH tWHDL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH Write Cycle Time (Note 1) Address Setup Time Address Setup Time to OE# low during toggle bit polling Address Hold Time Address Hold Time From CE# or OE# high during toggle bit polling Data Setup Time Data Hold Time CE# High during toggle bit polling OE# High during toggle bit polling Read Recovery Time Before Write (OE# High to WE# Low) CE# Setup Time CE# Hold Time Write Pulse Width Write Pulse Width High Write Buffer Program Operation (Notes 2, 3) tWHWH1 Single Word Program Operation (Note 2) Accelerated Single Word Program Operation (Note 2) tWHWH2 Sector Erase Operation (Note 2) tVHH tVCS tBUSY tPOLL VHH Rise and Fall Time (Note 1) VCC Setup Time (Note 1) WE# High to RY/BY# Low Program Valid before Status Polling Description Min Min Min Min Min Min Min Min Min Min Min Min Min Min Typ Typ Typ Typ Min Min Min Max 90 Speed Options 90 90 10 100 0 15 45 0 35 0 20 20 0 0 0 35 30 240 60 54 0.5 250 50 100 4 110 sec ns µs ns µs µs 11 110 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns Notes: 1. Not 100% tested. 2. See Erase and Programming Performance for more information 3. For 1–16 words/1–32 bytes programmed. 4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resumes (that is, the program resume command has been written). If the suspend command was issued after tPOLL, status data is available immediately after programming resumes. See Figure 16. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 87 Data Sheet AC Characteristics Erase and Program Operations—S29GL032M Only Parameter JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX Std. tWC tAS tASO tAH tAHT tDS tDH tCEPH tOEPH tGHWL tELWL tWHEH tWLWH tWHDL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH tWHWH1 tWHWH2 tVHH tVCS tBUSY tPOLL Write Cycle Time (Note 1) Address Setup Time Address Setup Time to OE# low during toggle bit polling Address Hold Time Description Min Min Min Min Speed Options 90 90 10 100 0 15 45 0 35 0 20 20 0 0 0 35 30 240 60 54 0.5 250 50 90 100 4 110 sec ns µs ns µs µs 11 110 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns Address Hold Time From CE# or OE# high during toggle bit polling Min Data Setup Time Data Hold Time CE# High during toggle bit polling OE# High during toggle bit polling Read Recovery Time Before Write (OE# High to WE# Low) CE# Setup Time CE# Hold Time Write Pulse Width Write Pulse Width High Write Buffer Program Operation (Notes 2, 3) Single Word Program Operation (Note 2) Accelerated Single Word Program Operation (Note 2) Sector Erase Operation (Note 2) VHH Rise and Fall Time (Note 1) VCC Setup Time (Note 1) WE# High to RY/BY# Low Program Valid before Status Polling Min Min Min Min Min Min Min Min Min Typ Typ Typ Typ Min Min Min Max Notes: 1. Not 100% tested. 2. See Erase and Programming Performance for more information 3. For 1–16 words/1–32 bytes programmed. 4. Effective write buffer specification is based upon a 16-word/32-byte write buffer operation. 5. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resumes (that is, the program resume command has been written). If the suspend command was issued after tPOLL, status data is available immediately after programming resumes. See Figure 16. 88 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet AC Characteristics Program Command Sequence (last two cycles) tWC Addresses 555h tAS PA tAH CE# OE# tWP WE# tCS tDS Data tDH PD tBUSY RY/BY# Status DOUT tRB tWPH tWHWH1 tPOLL PA PA Read Status Data (last two cycles) tCH A0h VCC tVCS Notes: 1. PA = program address, PD = program data, DOUT is the true data at the program address. 2. Illustration shows device in word mode. Figure 16. Program Operation Timings VHH HH ACC VIL or VIH IL IH tVHH VHH tVHH VHH VIL or VIH IL IH Figure 17. Accelerated Program Timing Diagram October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 89 Data Sheet AC Characteristics Erase Command Sequence (last two cycles) tWC Addresses 2AAh tAS SA 555h for chip erase Read Status Data VA tAH VA CE# OE# tWP WE# tCS tDS tCH tWPH tWHWH2 tDH Data 55h 30h 10 for Chip Erase In Progress Complete tBUSY RY/BY# tVCS VCC Notes: 1. SA = sector address (for Sector Erase), VA = Valid Address for reading status data (see Write Operation Status). 2. Illustration shows device in word mode. tRB Figure 18. tRC Addresses tPOLL CE# tCH OE# tOEH WE# VA tACC tCE Chip/Sector Erase Operation Timings VA VA tOE tDF tOH DQ7 High Z Complement Complement True Valid Data High Z DQ0–DQ6 tBUSY RY/BY# Status Data Status Data True Valid Data Note: VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle. Figure 19. Data# Polling Timings (During Embedded Algorithms) 90 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet AC Characteristics tAHT Addresses tAHT tASO CE# tOEH WE# tOEPH OE# tDH DQ6 / DQ2 Valid Data Valid Status tAS tCEPH tOE Valid Status Valid Status Valid Data (first read) RY/BY# (second read) (stops toggling) Note: VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array data read cycle. Figure 20. Toggle Bit Timings (During Embedded Algorithms) Enter Embedded Erasing WE# Erase Suspend Erase Enter Erase Suspend Program Erase Suspend Program Erase Resume Erase Suspend Read Erase Erase Complete Erase Suspend Read DQ6 DQ2 Note: DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE# to toggle DQ2 and DQ6. Figure 21. DQ2 vs. DQ6 Temporary Sector Unprotect Parameter JEDEC Std tVIDR tRSP Description VID Rise and Fall Time (See Note) RESET# Setup Time for Temporary Sector Unprotect Min Min All Speed Options 500 4 Unit ns µs Note: Not 100% tested. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 91 Data Sheet AC Characteristics VID RESET# VSS, VIL, or VIH tVIDR Program or Erase Command Sequence CE# tVIDR VID VSS, VIL, or VIH WE# tRSP RY/BY# tRRB Figure 22. Temporary Sector Group Unprotect Timing Diagram VID VIH RESET# SA, A6, A3, A2, A1, A0 Data 60h Valid* Sector Group Protect or Unprotect 60h Sector Group Protect: 150 µs, Sector Group Unprotect: 15 ms Valid* Verify 40h Valid* Status 1 µs CE# WE# OE# Note: For sector group protect, A6:A0 = 0xx0010. For sector group unprotect, A6:A0 = 1xx0010. Figure 23. Sector Group Protect and Unprotect Timing Diagram 92 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Alternate CE# Controlled Erase and Program Operations—S29GL256M Parameter JEDEC tAVAV tAVWL tELAX tDVEH tEHDX tGHEL tWLEL tEHWH tELEH tEHEL tWHWH1 tWHWH2 Std. tWC tAS tAH tDS tDH tGHEL tWS tWH tCP tCPH tWHWH1 tWHWH2 tRH tPOLL Description Write Cycle Time (Note 1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Read Recovery Time Before Write (OE# High to WE# Low) WE# Setup Time WE# Hold Time CE# Pulse Width CE# Pulse Width High Write Buffer Program Operation (Notes 2, 3) Single Word Program Operation (Note 2) Accelerated Single Word Program Operation (Note 2) Sector Erase Operation (Note 2) RESET# High Time Before Write Program Valid before Status Polling Min Min Min Min Min Min Min Min Min Min Typ Typ Typ Typ Min Max Speed Options 10 100 0 45 45 0 0 0 0 35 25 240 60 54 0.5 50 4 sec ns µs µs 11 110 Unit ns ns ns ns ns ns ns ns ns ns Notes: 1. Not 100% tested. 2. See Erase and Programming Performance for more information 3. For 1–16 words/1–32 bytes programmed. 4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resume (that is, the program resume command has been written). If the suspend command was issued after tPOLL, status data is available immediately after programming resumes. See Figure 24. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 93 Data Sheet Alternate CE# Controlled Erase and Program Operations—S29GL128M Parameter JEDEC tAVAV tAVWL tELAX tDVEH tEHDX tGHEL tWLEL tEHWH tELEH tEHEL tWHWH1 tWHWH2 Std. tWC tAS tAH tDS tDH tGHEL tWS tWH tCP tCPH tWHWH1 tWHWH2 tRH tPOLL Description Write Cycle Time (Note 1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Read Recovery Time Before Write (OE# High to WE# Low) WE# Setup Time WE# Hold Time CE# Pulse Width CE# Pulse Width High Write Buffer Program Operation (Notes 2, 3) Single Word Program Operation (Note 2) Accelerated Single Word Program Operation (Note 2) Sector Erase Operation (Note 2) RESET# High Time Before Write Program Valid before Status Polling (Note 4) Min Min Min Min Min Min Min Min Min Min Typ Typ Typ Typ Min Max Speed Options 10 100 0 45 45 0 0 0 0 35 25 240 60 54 0.5 50 4 sec ns µs µs 11 110 Unit ns ns ns ns ns ns ns ns ns ns Notes: 1. Not 100% tested. 2. See See Erase and Programming Performance for more information 3. For 1–16 words/1–32 bytes programmed. 4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resumes (that is, the program resume command has been written). If the suspend command was issued after tPOLL, status data is available immediately after programming resumes. See Figure 24. 94 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Alternate CE# Controlled Erase and Program Operations—S29GL064M Parameter JEDEC tAVAV tAVWL tELAX tDVEH tEHDX tGHEL tWLEL tEHWH tELEH tEHEL tWHWH1 tWHWH2 Std. tWC tAS tAH tDS tDH tGHEL tWS tWH tCP tCPH tWHWH1 tWHWH2 tRH tPOLL Write Cycle Time (Note 1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Read Recovery Time Before Write (OE# High to WE# Low) WE# Setup Time WE# Hold Time CE# Pulse Width CE# Pulse Width High Write Buffer Program Operation (Notes 2, 3) Single Word Program Operation (Note 2) Accelerated Single Word Program Operation (Note 2) Sector Erase Operation (Note 2) RESET# High Time Before Write Program Valid before Status Polling (Note 5) Description Min Min Min Min Min Min Min Min Min Min Typ Typ Typ Typ Min Ma x Speed Options 90 90 10 100 0 45 35 0 0 0 0 35 25 240 60 54 0.5 50 4 sec ns µs µs 11 110 Unit ns ns ns ns ns ns ns ns ns ns Notes: 1. Not 100% tested. 2. See Erase and Programming Performance for more information 3. For 1–16 words/1–32 bytes programmed. 4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resumes (that is, the program resume command has been written). If the suspend command was issued after tPOLL, status data is available immediately after programming resumes. See Figure 24. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 95 Data Sheet Alternate CE# Controlled Erase and Program Operations—S29GL032M Parameter JEDEC tAVAV tAVWL tELAX tDVEH tEHDX tGHEL tWLEL tEHWH tELEH tEHEL tWHWH1 tWHWH2 Std. tWC tAS tAH tDS tDH tGHEL tWS tWH tCP tCPH tWHWH1 tWHWH2 tRH tPOLL Write Cycle Time (Note 1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Read Recovery Time Before Write (OE# High to WE# Low) WE# Setup Time WE# Hold Time CE# Pulse Width CE# Pulse Width High Write Buffer Program Operation (Notes 2, 3) Single Word Program Operation (Note 2) Accelerated Single Word Program Operation (Note 2) Sector Erase Operation (Note 2) RESET# High Time Before Write Program Valid before Status Polling (Note 4) Description Min Min Min Min Min Min Min Min Min Min Typ Typ Typ Typ Min Max Speed Options 90 90 10 100 0 45 35 0 0 0 0 35 25 240 60 54 0.5 50 4 sec ns µs µs 11 110 Unit ns ns ns ns ns ns ns ns ns ns Notes: 1. Not 100% tested. 2. See Erase and Programming Performance for more information 3. For 1–16 words/1–32 bytes programmed. 4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resumes (that is, the program resume command has been written). If the suspend command was issued after tPOLL, status data is available immediately after programming resumes. See Figure 24. 96 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet PBA for program 2AA for erase SA for program buffer to flash SA for sector erase 555 for chip erase Data# Polling PA Addresses tWC tWH WE# tGHEL OE# tCP CE# tWS tCPH tDS tDH Data tRH PBD for program 55 for erase 29 for program buffer to flash 30 for sector erase 10 for chip erase tAS tAH tPOLL tWHWH1 or 2 tBUSY DQ7# DOUT RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation. 2. PA = program address, SA = sector address, PD = program data. 3. DQ7# is the complement of the data written to the device. DOUT is the data written to the device. 4. Illustration shows device in word mode. Figure 24. Alternate CE# Controlled Write (Erase/Program) Operation Timings October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 97 Data Sheet Erase and Programming Performance Parameter (Notes) Sector Erase Time S29GL032M Chip Erase Time S29GL064M S29GL128M S29GL256M Total Write Buffer Program Time (3, 5) Total Accelerated Effective Write Buffer Program Time ( 4, 5) S29GL032M Chip Program Time S29GL064M S29GL128M S29GL256M Typ (Note 1) 0.5 32 64 128 256 240 200 31.5 63 126 252 sec Max (Note 2) 3.5 64 128 256 512 µs µs Excludes system level overhead (Note 7) sec Unit sec Excludes 00h programming prior to erasure (Note 6) Comments Notes: 1. Typical program and erase times assume the following conditions: 25°C, VCC = 3.0V, 10,000 cycles; checkerboard data pattern. 2. Under worst case conditions of 90°C; Worst case VCC, 100,000 cycles. 3. Effective programming time (typ) is 15 μs (per word), 7.5 μs (per byte). 4. Effective accelerated programming time (typ) is 12.5 μs (per word), 6.3 μs (per byte). 5. Effective write buffer specification is calculated on a per-word/per-byte basis for a 16-word/32byte write buffer operation. 6. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure. 7. System-level overhead is the time required to execute the command sequence(s) for the program command. See Table 34 and Table 35 for further information on command definitions. TSOP Pin and BGA Package Capacitance For package types TA, TF, BA, BF, FA, FF (refer to Ordering Information Pages): Parameter Symbol CIN COUT CIN2 Parameter Description Input Capacitance Test Setup VIN = 0 VOUT = 0 VIN = 0 TSOP BGA TSOP BGA TSOP BGA Typ 6 4.2 8.5 5.4 7.5 3.9 Max 7.5 5.0 12 6.5 9 4.7 Unit pF pF pF pF pF pF Output Capacitance Control Pin Capacitance For package types TB, TC, BB, BC, (refer to Ordering Information Pages): Parameter Symbol CIN COUT CIN2 CIN3 Parameter Description Input Capacitance Test Setup VIN = 0 VOUT = 0 VIN = 0 VIN = 0 TSOP BGA TSOP BGA TSOP BGA TSOP BGA Typ 8 8 8.5 8.5 8 8 20 15 Max 10 10 12 12 10 10 25 20 Unit pF pF pF pF pF pF pF pF Output Capacitance Control Pin Capacitance RESET# and WP#/ACC Pin Capacitance Notes: 1. Sampled, not 100% tested. 2. Test conditions TA = 25°C, f = 1.0 MHz. 98 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Physical Dimensions TS040—40-Pin Standard Thin Small Outline Package (TSOP) Dwg rev AA; 10/99 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 99 Data Sheet Physical Dimensions TSR040—40-Pin Standard and Reverse Thin Small Outline Package (TSOP) REVERSE PIN OUT (TOP VIEW) A2 3 1 N 0.10 C -A- SEE DETAIL B -BE5 e N 2 N +1 2 9 A1 C SEATING PLANE A 0.08MM (0.0031") M C A-B S D1 D 5 4 B B SEE DETAIL A 7 b 6 7 WITH PLATING (c) c1 b1 R c GAGE LINE e/2 BASE METAL SECTION B-B 0˚ PARALLEL TO SEATING PLANE 0.25MM (0.0098") BSC -X- L X = A OR B DETAIL A DETAIL B Package Jedec Symbol A A1 A2 b1 b c1 c D D1 E e L 0 R N MIN TSR 040 MO-142 (B) EC MAX 1.20 0.15 0.05 1.00 0.95 1.05 0.20 0.23 0.17 0.22 0.17 0.27 0.10 0.16 0.10 0.21 19.80 20.00 20.20 18.30 18.40 18.50 9.90 10.00 10.10 0.50 BASIC 0.50 0.70 0.60 3˚ 0˚ 5˚ 0.08 0.20 40 NOM NOTES: 1 2 3 4 CONTROLLING DIMENSIONS ARE IN MILLIMETERS (MM). (DIMENSIONING AND TOLERANCING CONFORMS TO ANSI Y14.5M-1982) NOT APPLICABLE. PIN 1 IDENTIFIER FOR REVERSE PIN OUT (DIE DOWN), INK OR LASER MARK. TO BE DETERMINED AT THE SEATING PLANE -C- . THE SEATING PLANE IS DEFINED AS THE PLANE OF CONTACT THAT IS MADE WHEN THE PACKAGE LEADS ARE ALLOWED TO REST FREELY ON A FLAT HORIZONTAL SURFACE. DIMENSIONS D1 AND E DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE MOLD PROTUSION IS 0.15MM (.0059") PER SIDE. DIMENSION b DOES NOT INCLUDE DAMBAR PROTUSION. ALLOWABLE DAMBAR PROTUSION SHALL BE 0.08 (0.0031") TOTAL IN EXCESS OF b DIMENSION AT MAX. MATERIAL CONDITION. MINIMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD TO BE 0.07 (0.0028"). THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.10MM (.0039") AND 0.25MM (0.0098") FROM THE LEAD TIP. LEAD COPLANARITY SHALL BE WITHIN 0.10MM (0.004") AS MEASURED FROM THE SEATING PLANE. DIMENSION "e" IS MEASURED AT THE CENTERLINE OF THE LEADS. 3324 \ 16-038.10a 5 6 7 8 9 100 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Physical Dimensions TS048—48-Pin Standard and Reverse Thin Small Outline Package (TSOP) STANDARD PIN OUT (TOP VIEW) A2 2 1 N 0.10 C -A- SEE DETAIL B -BE5 e N 2 N +1 2 9 A1 C SEATING PLANE A 0.08MM (0.0031") M C A-B S D1 D 5 4 B B SEE DETAIL A 7 b 6 7 WITH PLATING (c) c1 b1 R c GAGE LINE e/2 BASE METAL SECTION B-B 0˚ PARALLEL TO SEATING PLANE 0.25MM (0.0098") BSC -X- L X = A OR B DETAIL A DETAIL B Package Jedec Symbol A A1 A2 b1 b c1 c D D1 E e L 0 R N MIN TS 048 MO-142 (B) EC MAX 1.20 0.15 0.05 1.00 0.95 1.05 0.20 0.23 0.17 0.22 0.17 0.27 0.10 0.16 0.10 0.21 19.80 20.00 20.20 18.30 18.40 18.50 11.90 12.00 12.10 0.50 BASIC 0.50 0.70 0.60 3˚ 0˚ 5˚ 0.08 0.20 48 NOM NOTES: 1 2 3 4 CONTROLLING DIMENSIONS ARE IN MILLIMETERS (MM). (DIMENSIONING AND TOLERANCING CONFORMS TO ANSI Y14.5M-1982) PIN 1 IDENTIFIER FOR STANDARD PIN OUT (DIE UP). NOT APPLICABLE. TO BE DETERMINED AT THE SEATING PLANE -C- . THE SEATING PLANE IS DEFINED AS THE PLANE OF CONTACT THAT IS MADE WHEN THE PACKAGE LEADS ARE ALLOWED TO REST FREELY ON A FLAT HORIZONTAL SURFACE. DIMENSIONS D1 AND E DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE MOLD PROTUSION IS 0.15MM (.0059") PER SIDE. DIMENSION b DOES NOT INCLUDE DAMBAR PROTUSION. ALLOWABLE DAMBAR PROTUSION SHALL BE 0.08 (0.0031") TOTAL IN EXCESS OF b DIMENSION AT MAX. MATERIAL CONDITION. MINIMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD TO BE 0.07 (0.0028"). THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.10MM (.0039") AND 0.25MM (0.0098") FROM THE LEAD TIP. LEAD COPLANARITY SHALL BE WITHIN 0.10MM (0.004") AS MEASURED FROM THE SEATING PLANE. DIMENSION "e" IS MEASURED AT THE CENTERLINE OF THE LEADS. 3325 \ 16-038.10a 5 6 7 8 9 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 101 Data Sheet Physical Dimensions TSR048—48-Pin Standard and Reverse Thin Small Outline Package (TSOP) REVERSE PIN OUT (TOP VIEW) A2 3 1 N 0.10 C -A- SEE DETAIL B -BE5 e N 2 N +1 2 9 A1 C SEATING PLANE A 0.08MM (0.0031") M C A-B S D1 D 5 4 B B SEE DETAIL A 7 b 6 7 WITH PLATING (c) c1 b1 R c GAGE LINE e/2 BASE METAL SECTION B-B 0˚ PARALLEL TO SEATING PLANE 0.25MM (0.0098") BSC -X- L X = A OR B DETAIL A DETAIL B Package Jedec Symbol A A1 A2 b1 b c1 c D D1 E e L 0 R N MIN TSR 048 MO-142 (B) EC MAX 1.20 0.15 0.05 1.00 0.95 1.05 0.20 0.23 0.17 0.22 0.17 0.27 0.10 0.16 0.10 0.21 19.80 20.00 20.20 18.30 18.40 18.50 11.90 12.00 12.10 0.50 BASIC 0.50 0.70 0.60 3˚ 0˚ 5˚ 0.08 0.20 48 NOM NOTES: 1 2 3 4 CONTROLLING DIMENSIONS ARE IN MILLIMETERS (MM). (DIMENSIONING AND TOLERANCING CONFORMS TO ANSI Y14.5M-1982) NOT APPLICABLE. PIN 1 IDENTIFIER FOR REVERSE PIN OUT (DIE DOWN), INK OR LASER MARK. TO BE DETERMINED AT THE SEATING PLANE -C- . THE SEATING PLANE IS DEFINED AS THE PLANE OF CONTACT THAT IS MADE WHEN THE PACKAGE LEADS ARE ALLOWED TO REST FREELY ON A FLAT HORIZONTAL SURFACE. DIMENSIONS D1 AND E DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE MOLD PROTUSION IS 0.15MM (.0059") PER SIDE. DIMENSION b DOES NOT INCLUDE DAMBAR PROTUSION. ALLOWABLE DAMBAR PROTUSION SHALL BE 0.08 (0.0031") TOTAL IN EXCESS OF b DIMENSION AT MAX. MATERIAL CONDITION. MINIMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD TO BE 0.07 (0.0028"). THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.10MM (.0039") AND 0.25MM (0.0098") FROM THE LEAD TIP. LEAD COPLANARITY SHALL BE WITHIN 0.10MM (0.004") AS MEASURED FROM THE SEATING PLANE. DIMENSION "e" IS MEASURED AT THE CENTERLINE OF THE LEADS. 3326 \ 16-038.10a 5 6 7 8 9 102 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Physical Dimensions TS056/TSR056—56-Pin Standard and Reverse Thin Small Outline Package (TSOP) PACKAGE JEDEC SYMBOL A A1 A2 b1 b c1 c D D1 E e L O TS/TSR 56 MO-142 (B) EC MIN. --0.05 0.95 0.17 0.17 0.10 0.10 19.90 18.30 13.90 0.50 0˚ 0.08 NOM. ----1.00 0.20 0.22 ----20.00 18.40 14.00 0.50 BASIC 0.60 3˚ --56 0.70 5˚ 0.20 MAX. 1.20 0.15 1.05 0.23 0.27 0.16 0.21 20.20 18.50 14.10 NOTES: 1 2 3 4 CONTROLLING DIMENSIONS ARE IN MILLIMETERS (mm). (DIMENSIONING AND TOLERANCING CONFORMS TO ANSI Y14.5M-1982.) PIN 1 IDENTIFIER FOR STANDARD PIN OUT (DIE UP). PIN 1 IDENTIFIER FOR REVERSE PIN OUT (DIE DOWN), INK OR LASER MARK. TO BE DETERMINED AT THE SEATING PLANE -C- . THE SEATING PLANE IS DEFINED AS THE PLANE OF CONTACT THAT IS MADE WHEN THE PACKAGE LEADS ARE ALLOWED TO REST FREELY ON A FLAT HORIZONTAL SURFACE. DIMENSIONS D1 AND E DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE MOLD PROTUSION IS 0.15 mm PER SIDE. DIMENSION b DOES NOT INCLUDE DAMBAR PROTUSION. ALLOWABLE DAMBAR PROTUSION SHALL BE 0.08 mm TOTAL IN EXCESS OF b DIMENSION AT MAX MATERIAL CONDITION. MINIMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD TO BE 0.07 mm. THESE DIMESIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.10 mm AND 0.25 mm FROM THE LEAD TIP. LEAD COPLANARITY SHALL BE WITHIN 0.10 mm AS MEASURED FROM THE SEATING PLANE. DIMENSION "e" IS MEASURED AT THE CENTERLINE OF THE LEADS. 3160\38.10A 5 6 7 8. 9 R N October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 103 Data Sheet Physical Dimensions LAA064—64-Ball Fortified Ball Grid Array (FBGA) 104 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Physical Dimensions LAC064—64-Pin 18 x 12 mm Package 0.20 C 2X D A D1 eD H G F E D C B A 8 7 6 7 SE eE 5 E 4 3 E1 1.00±0.5 .50 2 1 A1 CORNER ID. (INK OR LASER) φ0 1.00±0.5 B TOP VIEW A1 CORNER 0.20 C 2X 6 NXφb φ 0.25 M C A B φ 0.10 M C SD 7 A1 CORNER BOTTOM VIEW A A2 A1 SEATING PLANE C 0.25 C 0.15 C SIDE VIEW NOTES: PACKAGE JEDEC LAC 064 N/A 18.00 mm x 12.00 mm PACKAGE SYMBOL A A1 A2 D E D1 E1 MD ME N φb eD eE SD / SE 0.50 MIN --0.40 0.60 NOM ------18.00 BSC. 12.00 BSC. 7.00 BSC. 7.00 BSC. 8 8 64 0.60 1.00 BSC. 1.00 BSC. 0.50 BSC. NONE 0.70 MAX 1.40 ----NOTE PROFILE HEIGHT STANDOFF BODY THICKNESS BODY SIZE BODY SIZE MATRIX FOOTPRINT MATRIX FOOTPRINT MATRIX SIZE D DIRECTION MATRIX SIZE E DIRECTION BALL COUNT BALL DIAMETER BALL PITCH - D DIRECTION BALL PITCH - E DIRECTION SOLDER BALL PLACEMENT DEPOPULATED SOLDER BALLS 6 7 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. 3. BALL POSITION DESIGNATION PER JESD 95-1, SPP-010 (EXCEPT AS NOTED). 4. e REPRESENTS THE SOLDER BALL GRID PITCH. 5. SYMBOL "MD" IS THE BALL ROW MATRIX SIZE IN THE "D" DIRECTION. SYMBOL "ME" IS THE BALL COLUMN MATRIX SIZE IN THE "E" DIRECTION. N IS THE TOTAL NUMBER OF SOLDER BALLS. DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW PARALLEL TO THE D OR E DIMENSION, RESPECTIVELY, SD OR SE = 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 8. NOT USED. 9. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. 3243 \ 16-038.12d October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 105 Data Sheet Physical Dimensions FBA048—48-Pin 6.15 x 8.15 mm Package Dwg rev AF; 10/99 106 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Physical Dimensions FBC048—48-Pin 8 x 9 mm Package Dwg rev AF; 10/99 October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 107 Data Sheet Physical Dimensions FBE063—63-Pin 12 x 11 mm Package Dwg rev AF; 10/99 108 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Physical Dimensions FPT -48P-M19 LEAD No. 1 48 INDEX Details of "A" part 0.25(.010) 0~8˚ 0.60±0.15 (.024±.006) 24 25 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) * 12.00±0.20 (.472±.008) 1.10 –0.05 +0.10 +.004 .043 –.002 (Mounting height) 0.50(.020) "A" 0.10(.004) 0.17 –0.08 .007 –.003 +0.03 +.001 0.10±0.05 (.004±.002) (Stand off height) 0.22±0.05 (.009±.002) 0.10(.004) M FPT -56P-M01 LEAD No. 1 56 0.10±0.05 (.004±.002) (Stand off) INDEX 0.22±0.05 (.009±.002) *1 14.00±0.10 (.551±.004) 0.10(.004) M 0.50(.020) 28 29 Details of "A" part 20.00±0.20(.787±.008) *2 18.40±0.10(.724±.004) 0.17±0.03 .007±.001 1.10 –0.05 +0.10 +.004 .043 –.002 (Mounting height) 0˚~8˚ 0.60±0.15 (.024±.006) 0.25(.010) 0.08(.003) "A" October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 109 Data Sheet Revision Summary Revision A (January 29, 2004) Initial Release. Revision A1 (February 23, 2004) Connection Diagrams Removed 80-ball Fine-pitch BGA pinout. Ordering Information Added additional packing type. Removed frame description from package material set. Updated valid combinations to reflect the addition of new package type. Added marking descriptions to all valid combination tables. Word Program Command Sequence and Unlock Bypass Command Sequence Added these sections. Figure 3, Write Buffer Programming Operation, Figure 4, Program Operation Updated figure. Table 34, “Command Definitions( x16 Mode, BYTE# = VIH),” on page 69 Updated table. Added note 19. Table 35, “Command Definitions (x8 Mode, BYTE# = VIL),” on page 70 Updated table. Added note 17. Figure 7, Data# Polling Algorithm Updated figure. Erase and Program Operations and Alternate CE# Controlled Erase and Program Operations Updated TWHWHI description Added Note 4. Figure 16, Figure 18, Figure 20, Figure 24 Updated figure. Physical Dimensions Removed BGA-63P-M02 and BGA-80P-M01 Added the TS040 package 110 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Revision A2 (February 25, 2004) Connection Diagrams Removed the 40-pin reverse TSOP diagram. Updated the 48-pin standard TSOP diagram. Removed the 48-pin reverse TSOP diagram. Removed the 56-pin reverse TSOP diagram. Ordering Information Removed all references to package type R. Table 17 Autoselect Codes, (High Voltage Method) Updated the R3, R4 column replacing -04 and -03 designators with -R4 and -R3 respectively. Word Program Command Sequence Included statements documenting word programming support for backward compatibility with existing Flash drivers. Physical Dimensions Removed the BGA-80P-M02 diagram. Revision A3 (February 26, 2004) Distinctive Characteristics Corrected typo in the Flexible Sector Architecture section. Revision A4 (March 24, 2004) CMOS Compatible Removed VCC from Max for VOL. Erase and Program Operations-S29GL256M only Corrected unit typos. Erase and Program Operations-S29GL128M only Corrected the minimum Data Setup Time. Alternate CE# Controlled Erase and Program Operations-S29GL128M Corrected the minimum CE# Pulse width. TSOP Pin and BGA Package Capacitance: Pkg types TB, TC, BB, BC Added CIN3. Connection Diagrams 40-pin standard TSOP: Corrected pin 30 to be VIO. 48-pin standard TSOP: Added superscripts to designators for pin 9, 13, 14, 15 and 47. Changed pin 13 to A21. Added two notes below illustration. 56-pin standard TSOP: Added superscripts to designators for pin 1, 2 and 12. Changed pin 56 to NC. Added three notes below illustration. 64-ball Fortified BGA: Corrected ball D8 to be VIO. Added superscripts to designators for ball D8, F7, and F1. Added two notes below illustration. 63-ball Fine-pitch BGA: Added superscript to designator for Ball H7. Added one note below illustration. Added connection diagrams for S29GL064M (model R0) and S29GL032M (model R0). Pin Description Added VIO description. Logic Symbols Added VIO on all models except R3 and R4. Figure 3 Write Buffer Programming Operation Corrected the DQ locations and added callouts to notes one through three. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 111 Data Sheet DC Characteristics Corrected test conditions for ICC6. Revision A5 (April 30, 2004) Ordering Information - S29GL032M Added R5 and R6 model numbers to the breakout table. Updated the Valid Combinations for BGA packages table to reflect model numbers R5 and R6. Ordering Information - S29GL064M Revised R8 and R9 model numbers on the breakout table. Updated the Valid Combinations for TSOP packages table. Ordering Information - S29GL0128M Added R8 and R9 model numbers to the breakout table. Revised the Package Material Set options on the breakout table. Updated the Valid Combinations for TSOP packages table. Ordering Information - S29GL256M Revised the Package Material Set options on the breakout table. Connection Diagrams (56-Pin TSOP) Added a callout to Note 3 for pin 15. Device Geometry Definition table Revised the data and description information for addresses: 28h/50h and 29h/52h. Primary Vendor Specific Extended Query table Revised the data and description information for addresses: 45h/8Ah (x16/x8) Revised the data information for addresses: 4Ch/98h (x16/x8) Erase and Programming Performance table Revised notes 1 and 2 below the table. Revision B0 (May 24, 2004) Global Converted to full datasheet status. Figure 17, Autoselect Codes, (High Voltage Method) Corrected typos in description. Added values for R5, R6, R7 description for cycle 1-3. Added R8 and R9 to Model Number. Revision B1 (August 2, 2004) Ordering Information-S29GL032M Added the following temperature range: “C = Commercial (0°C to +70°C)'. Commercial temperature range options added for 90ns speeds. Global Change S29GL032M, S29GL064M, S29GL128M, S29GL236M ordering options pages: Updated note 3 with the following “...TSOPs can be packed in Types 0 and 3; BGAs can be packed in Types 0, 2, or 3. Revision B2 (September 8, 2004) Connection Diagram - 64-ball Fortified BGA Modified note 4. 112 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006 Data Sheet Logic Symbol-S29GL032M (Models R3, R4) Added models R5 and R6 to the logic symbol. Logic Symbol-S29GL064M (Models R1, R2) Added models R8 & R9 to the logic symbol. S29GL032M Valid Combinations Corrected ordering part numbers for LAA064 packages. Physical Dimensions Renamed the BGA-48P-M20 package as the FBG048 package. Ordering Information Added footnotes to indicate TSOP Pb-free leadframe plating. Revision B3 (October 9, 2004) General Updated all references to Figures, Tables, and Headings to reflect page number (active link) Updated tables 20, 21, and 22 Updated tables 24, 25, and 26 S29GL064M Valid combination Corrected ordering part numbers for TS056 packages S29GL032M Sector Protection/Uprotection Address Tables Corrected table titles S29GL064M Sector Protection/Uprotection Address Tables Corrected table titles Primary Vendor-Specific Extended Query Corrected CFI data at address 48h/90h to be 0001h DC Characteristics Updated note 2 Figure 15, Reset Timing Added tRH Revision B4 (January 10, 2005) Secured Sector Flash Memory Region Updated Secured Silicon Sector address table with addresses in x8-mode DC Characteristics, CMOS Compatible Corrected WP#/ACC input load current footnote Document Updated cross-references and format. Valid Combination Tables Added notes to the 128 Mb and 256 Mb combination tables. Revision B5 (December 13, 2005) Added Supersession text. Corrected typos on connection diagrams and in CFI table. October 10, 2006 S29GL-M_00_B6 S29GL-M MirrorBitTM Flash Family 113 Data Sheet Revision B6 (October 10, 2006) Global Deleted FBG048 package from S29GL032M device. Added “retired product” status text to cover page, and first page and Ordering Information sections of data sheet. Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by Spansion Inc. Spansion Inc. reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion Inc. assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2004–2006 Spansion Inc. All rights reserved. Spansion, the Spansion logo, MirrorBit, ORNAND, HD-SIM, and combinations thereof, are trademarks of Spansion Inc. Other company and product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 114 S29GL-M MirrorBitTM Flash Family S29GL-M_00_B6 October 10, 2006