SL23EP04SI-1HT

Preliminary SL23EP04 Low Jitter and Skew 10 to 220 MHz Zero Delay Buffer (ZDB) Key Features 10 to 220 MHz operating frequency range Low output clock skew: 60ps-typ Low output clock Jitter: - 35 ps-typ at 166MHz, CL=15pF and VDD=3.3V - 45 ps-typ at 166MHz, CL=15pF and VDD=2.5V Low part-to-part output skew: 150 ps-typ 3.3V to 2.5V power supply range Low power dissipation: - 12 mA-typ at 66MHz and VDD=3.3V - 10 mA-typ at 66MHz and VDD=2.5V One input drives 4 outputs Multiple configurations and drive options SpreadThru™ PLL that allows use of SSCG Available in 8-pin SOIC package Available in Commercial and Industrial grades Description The SL23EP04 is a low skew, low jitter and low power Zero Delay Buffer (ZDB) designed to produce up to four (4) clock outputs from one (1) reference input clock, for high speed clock distribution applications. The product has an on-chip PLL and a feedback pin (FBK) which can be used to obtain feedback from any one of the 4 output clocks. The SL23EP04 offers X/2,1X and 2X frequency options at the output with respect to input reference clock. Refer to the “Product Configuration Table” for the details of these options. The SL23EP04-1H and -2H High Drive version operates up to 220 MHz and 200MHz at 3.3 and 2.5V power supplies respectively. The standard versions -1 and -2 operate up to 167MHz and 135MHz at 3.3V and 2.5V power supplies respectively with CL=15pF output load. The SL23EP04 enter into Power Down (PD) mode if the input at CLKIN is DC (GND to VDD). In this state all 4 output clocks are tri-stated and the PLL is turned off, leading to 8 A-typ power supply current draw. Applications Printers, MFPs and Digital Copiers PCs and Work Stations Routers, Switchers and Servers Datacom and Telecom High-Speed Digital Embeded Systems Benefits Up to four (4) distribution of input clock Standard and High-Drive levels to control impedance level, frequency range and EMI Low skew, jitter and power dissipation Block Diagram Rev 1.1, May 25, 2007 Page 1 of 14 2200 Laurelwood Road, Santa Clara, CA 95054 Tel: (408) 855-0555 Fax: (408) 855-0550 www.SpectraLinear.com SL23EP04 Pin Configuration 8-Pin SOIC Pin Description Pin Number 1 2 3 4 5 6 7 8 Pin Name CLKIN CLKA1 CLKA2 GND CLKB1 CLKB2 VDD FBK Pin Type Input Output Output Power Output Output Power Input Pin Description Reference Frequency Clock Input. Weak pull-down (250k ). Buffered Clock Output Weak pull-down (250k ). Buffered Clock Output. Weak pull-down (250k ). Power Ground. Buffered Clock Output. Weak pull-down (250k ). Buffered Clock Output. Weak pull-down (250k ). 2.5V to 3.3V Power Supply. PLL Feedback Input. This pin must be connected to one of the clock outputs. Rev 1.1, May 25, 2007 Page 2 of 14 SL23EP04 General Description High and Low-Drive Product Options The SL23EP04 is a low skew, low jitter Zero Delay Buffer All SL23EP04 products are offered with the high drive with very low operating current. “-1H” and “-2H” as well as the standard drive “-1” and “-2” options. These drive options enable the user to control The product includes an on-chip high performance PLL load levels, frequency range and EMI levels. Refer to the that locks into the input reference clock and produces electrical tables for the details of the drive levels. four (4) output clock drivers tracking the input reference clock for systems requiring clock distribution. Skew and Zero Delay in addition to FBK pin used for internal PLL feedback, All outputs should drive the similar load to achieve outputthere are two (2) banks with two (2) outputs in each bank, to-output skew and input-to-output delay specifications as bringing the number of total available output clocks to given in the switching electrical tables. However, the delay four (4). between input and outputs can be adjusted by changing the load at FBK pin relative to the banks A and B clocks Input and output Frequency Range since FBK pin is the feedback to the internal PLL. The input and output frequency is the same (1x) for SL23EP04-1 and -1H versions. For SL23EP04-2 and In addition, the input reference clock rise and fall time 2H versions, the output frequency is 1/2x, 1x or 2x of should be similar to the output rise and fall time to obtain the CLKIN as given in the “Available SL23EP04 the best skew results. Configurations” Table 1. But, the frequency range depends on VDD, drive levels and CL (Load Power Supply Range (VDD) Capacitance) as given in the electrical specifications tables. The SL23EP04 is designed to operate from 3.3V (3.63Vmax) to 2.5V (2.25V-min) VDD power supply range. An When the input clock frequency is DC (from GND to internal on-chip voltage regulator is used to provide to VDD), this input state is detected by an input level detection circuitry and all four (4) clock outputs are forced PLL constant power supply of 1.8V internally. This leads to a consistent and stable PLL electrical performance in to Hi-Z. The PLL is shutdown to save power. In this terms of skew, jitter and power dissipation. The shutdown state, the product draws less than 12 A SL23EP04 I/O is powered by using VDD. (8 A –typ) supply current. SpreadThru™ Feature If a Spread Spectrum Clock (SSC) were to be used as an input clock, the SL23EP04 is designed to pass the modulated Spread Spectrum Clock (SSC) signal from its reference CLKIN input to the output clocks. The same spread spectrum characteristics at the input are passed through the PLL and drivers without any degradation in spread percent (%), spread profile and modulation frequency. Contact SLI for 1.8V power supply ZDB called SL23EPL04. Device SL23EP04-1 and 1H SL23EP04-2 and -2H SL23EP04-2 and -2H Feedback From Bank-A or Bank-B Bank-A Bank-B Bank-A Frequency Reference Reference 2 x Reference Bank-B Frequency Reference Reference / 2 Reference Table 1. Available SL23EP04 Configurations Rev 1.1, May 25, 2007 Page 3 of 14 SL23EP04 Absolute Maximum Ratings (All Products) Description Supply voltage, VDD All Inputs and Outputs Ambient Operating Temperature Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature ESD Rating (Human Body Model) MIL-STD-883, Method 3015 In operation, C-Grade In operation, I-Grade No power is applied In operation, power is applied Condition Min -0.5 -0.5 0 -40 -65 2000 Max 4.6 VDD+0.5 70 85 150 125 260 - Unit V V °C °C °C °C °C V Operating Conditions (C-Grade and VDD=3.3V) Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C Description Operating Voltage Operating Temperature Input Capacitance Symbol VDD TA VIH Condition VDD+/-10% Ambient Temperature Pins 1 and 8 Min 2.97 0 - Typ 3.3 5 Max 3.63 70 7 Unit V °C pF DC Electrical Characteristics (C-Grade and VDD=3.3V) Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C Description Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Symbol VINL VINH IINL IINH VINL VINH IINL IINH Condition CLKIN and FBK CLKIN and FBK 0 < VIN < 0.8V CLKIN and FBK 2.4V < VIN < VDD CLKIN and FBK CLKIN and FBK CLKIN and FBK 0 < VIN < 0.8V CLKIN and FBK 2.4V < VIN < VDD CLKIN and FBK IOL = 8 mA ( -1, -2 drives) IOL = 12 mA (-1H, -2H drives) Min – 2.0 – – – 2.0 – – – – Typ – – 20 20 – – 20 20 – – Max 0.8 VDD+0.3 50 50 0.8 VDD+0.3 50 50 0.4 0.4 Unit V V µA µA V V µA µA V V Output LOW Voltage VOL Rev 1.1, May 25, 2007 Page 4 of 14 SL23EP04 DC Electrical Characteristics (C-Grade and VDD=3.3V – Cont.) Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C Description Output HIGH Voltage Power Down Supply Current Power Supply Current Power Supply Current Power Supply Current Power Supply Current Pull-down Resistors Symbol VOH Condition IOH = –8 mA (-1, -2 drives) IOH = –12 mA (-1H, -2H drives) Min 2.4 2.4 – – – – – 150 Typ – – 8 10 12 14 16 250 Max – – 12 14 17 20 23 350 Unit V V µA mA mA mA mA k IDDPD IDD1 IDD2 IDD3 IDD4 RPD Measured when CLKIN= GND to VDD or floating All Outputs CL=0, 33.3 MHz CLKIN All versions All Outputs CL=0, 66.6 MHz CLKIN All versions All Outputs CL=0, 133.3 MHz CLKIN All versions All Outputs CL=0, 166.6 MHz CLKIN All versions Pin-1, 2, 3, 5, and 6 Switching Electrical Characteristics (C-Grade and VDD=3.3V) Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C Description Symbol FOUT1 FOUT2 Condition CL=15pf, -1H and -2H versions CL=22pf, -1H and -2H versions CL=30pf, -1H and -2H versions CL=15pf, -1, and -2 versions CL=22pf, -1 and -2 versions CL=30pf, -1 and -2 versions Measured at VDD/2, all versions CL=30pF, Fout=66 MHz, all versions Measured at 1.4V CL=15pF, Fout=66 MHz, all versions Measured at VDD/2 CL=15pF, Fout=133 MHz, all versions Measured at VDD/2 CL=15pF, Fout=166 MHz, all versions Measured at VDD/2 CL=15pF, -1 and -2 versions CL=15pF, -1 and -2 versions CL=30pF -1H and -2H version Min 10 10 10 10 10 10 30 40 45 45 45 - Typ 50 50 50 50 50 - Max 220 200 135 200 135 100 70 60 55 55 55 2.2 1.5 1.5 Page 5 of 14 Unit MHz MHz MHz MHz MHz MHz % % % % % ns ns ns Output Frequency Range FOUT3 FOUT4 FOUT5 FOUT6 Input Duty Cycle Output Duty Cycle Output Duty Cycle Output Duty Cycle Output Duty Cycle Output Rise/Fall Time Output Rise/Fall Time Output Rise/Fall Time Rev 1.1, May 25, 2007 DC1 DC2 DC3 DC4 DC5 tr/f1 tr/f2 tr/f3 SL23EP04 Switching Electrical Characteristics (C-Grade and VDD=3.3V) Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C Output Rise/Fall Time Output-to-Output Skew on Same Bank Output-to-Output Skew on Same Bank Output-to-Output Skew Between Bank A and B Output-to-Output Skew Between Bank A and B Device-to-Device Skew tr/f4 SKW1 SKW2 SKW3 SKW4 SKW5 CL=15pF -1H and -2H version -1 and -2 measured at VDD/2 and outputs are equally loaded -1H and -2H measured at VDD/2 and outputs are equally loaded -1 and -2 measured at VDD/2 and outputs are equally loaded -1H and -2H measured at VDD/2 and outputs are equally loaded All versions, measured at VDD/2 and outputs are equally loaded All versions, CLKIN to FBK rising edge, measured at VDD/2 and outputs are equally loaded Fout=66.6 MHz and CL=15pF Cycle-to-Cycle Jitter (-1 and, -2 Versions) CCJ1 Fout=66.6MHz and CL=30PF Fout=133.3MHz and CL=15pF Fout=66.6 MHz and CL=15pF Cycle-to-Cycle Jitter (-1H and -2H Versions) CCJ2 Fout=66.6MHz and CL=30PF Fout=166.6MHz and CL=15pF PLL Lock Time tLOCK From 0.95VDD and valid clock presented at CLKIN 70 60 110 90 150 1.2 150 125 250 200 400 ns ps ps ps ps ps Input-to-Output Delay Dt -200 - +/-70 50 70 40 40 60 35 - 200 100 150 80 80 130 70 1.0 ps ps ps ps ps ps ps ms Operating Conditions (I-Grade and VDD=3.3V) Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C Description Operating Voltage Operating Temperature Input Capacitance Symbol VDD TA VIH Condition VDD+/-10% Ambient Temperature Pins 1 and 8 Min 2.97 -40 - Typ 3.3 5 Max 3.63 85 8 Unit V °C pF Rev 1.1, May 25, 2007 Page 6 of 14 SL23EP04 DC Electrical Characteristics (I-Grade and VDD=3.3V) Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85° Description Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Symbol VINL VINH IINL IINH Condition CLKIN and FBK CLKIN and FBK 0 < VIN < 0.8V CLKIN and FBK 2.4V < VIN < VDD CLKIN and FBK IOL = 8 mA ( -1, -2 drives) Min – 2.0 – – – – 2.4 2.4 – – – – – 125 Typ – – 25 25 – – – – 12 12 14 16 18 250 Max 0.8 VDD+0.3 50 50 0.4 0.4 – – 18 17 20 22 25 375 Unit V V µA µA V V V V µA mA mA mA mA k Output LOW Voltage VOL IOL = 12 mA ( -1H, -2H drives) IOH = –8 mA (-1, -2 drives) Output HIGH Voltage Power Down Supply Current Power Supply Current Power Supply Current Power Supply Current Power Supply Current Pull-down Resistors VOH IOH = –12 mA ( -1H, -2H drives) IDDPD IDD1 IDD2 IDD3 IDD4 RPD Measured when CLKIN= GND to VDD or floating All Outputs CL=0, 33.3 MHz CLKIN All versions All Outputs CL=0, 66.6 MHz CLKIN All versions All Outputs CL=0, 133.3 MHz CLKIN All versions All Outputs CL=0, 166.6 MHz CLKIN All versions Pin-1, 2, 3, 5 and 6 Rev 1.1, May 25, 2007 Page 7 of 14 SL23EP04 DC Electrical Characteristics (C-Grade and VDD=2.5V) Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C Description Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Symbol VINL VINH IINL IINH Condition CLKIN and FBK CLKIN and FBK 0 < VIN < 0.8V CLKIN and FBK 2.4V < VIN < VDD CLKIN and FBK IOL = 6 mA, -1 and -2 versions Min – 1.7 – – – – 2.0 2.0 Typ – – 20 20 – – – – Max 0.7 VDD+0.3 50 50 0.3 0.3 – – Unit V V µA µA V V V V Output LOW Voltage VOL IOL = 8 mA, -1H and -2H versions IOH = –6 mA, -1 and -2 versions Output HIGH Voltage VOH IOH = –8 mA, -1H and -2H versions Power Down Supply Current IDDPD Measured when CLKIN= GND to VDD or floating – 10 18 µA Power Supply Current Power Supply Current Power Supply Current Power Supply Current Pull-down Resistors IDD1 IDD2 IDD3 IDD4 RPD All Outputs CL=0, 33.3 MHz CLKIN All versions All Outputs CL=0, 66.6 MHz CLKIN All versions All Outputs CL=0, 133.3 MHz CLKIN All versions All Outputs CL=0, 166.6 MHz CLKIN All versions Pin-1, 2, 3, 5 and 6 – – – – 150 8 10 12 14 250 11 14 17 20 350 mA mA mA mA k Switching Electrical Characteristics (C-Grade and VDD=2.5V) Unless otherwise stated VDD= 2.5+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C Description Symbol FOUT1 FOUT2 Condition CL=15pf, -1H and -2H versions CL=22pf, -1H and -2H versions CL=30pf, -1H and -2H versions CL=15pf, -1 and -2 versions CL=22pf, -1 and -2 versions CL=30pf, -1 and -2 versions Min 10 10 10 10 10 10 Typ - Max 175 135 100 135 100 75 Unit MHz MHz MHz MHz MHz MHz Output Frequency Range FOUT1 FOUT4 FOUT5 FOUT6 Rev 1.1, May 25, 2007 Page 8 of 14 SL23EP04 Input Duty Cycle Output Duty Cycle Output Duty Cycle Output Duty Cycle Output Rise/Fall Time Output Rise/Fall Time Output Rise/Fall Time Output Rise/Fall Time Output-to-Output Skew on Same Bank Output-to-Output Skew on Same Bank Output-to-Output Skew Between Bank A and B Output-to-Output Skew Between Bank A and B Device-to-Device Skew DC1 DC2 DC3 DC4 tr/f1 tr/f2 tr/f3 tr/f4 SKW1 SKW2 SKW3 SKW4 SKW5 Measured at VDD/2, all versions CL=15pF, Fout=66 MHz, all versions Measured at VDD/2 CL=15pF, Fout=133 MHz, all versions Measured at VDD/2 CL=15pF, Fout=166 MHz, all versions Measured at VDD/2 CL=30pF, -1 and -2 versions Measured at 0.6 to 1.8V CL=15pF, -1 and -2 versions Measured at 0.6 to 1.8V CL=30pF, -1H and -2H versions Measured at 0.6 to 1.8V CL=15pF, -1H and -2H versions Measured at 0.6 to 1.8V -1 and -2, measured at VDD/2 and outputs are equally loaded -1H and -2H, measured at VDD/2 and outputs are equally loaded -1 and -2, measured at VDD/2 and outputs are equally loaded -1H and -2H, measured at VDD/2 and outputs are equally loaded All versions, measured at VDD/2 and outputs are equally loaded All versions, CLKIN to FBK rising edge, measured at VDD/2 and outputs are equally loaded Fout=66.6 MHz and CL=15pF Fout=133.3 MHz and CL=15pF 40 45 45 40 50 50 50 50 80 70 125 110 175 60 55 55 60 2.4 1.7 1.7 1.4 175 150 300 250 450 % % % % ns ns ns ns ps ps ps ps ps Input-to-Output Delay Cycle-to-Cycle Jitter (-1 and -2 Versions) Dt -250 - +/-90 70 60 250 140 120 ps ps ps CCJ1 Switching Electrical Characteristics (C-Grade and VDD=2.5V) Unless otherwise stated VDD= 2.5+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C Cycle-to-Cycle Jitter (-1H and -2H Versions) PLL Lock Time CCJ2 tLOCK Fout=66.6 MHz and CL=15pF Fout=166.6 MHz and CL=15pF From 0.95VDD and valid clock presented at CLKIN 60 50 120 100 1.0 ps ps ms Rev 1.1, May 25, 2007 Page 9 of 14 SL23EP04 Operating Conditions (I-Grade and VDD=2.5V) Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C Description Operating Voltage Operating Temperature Input Capacitance Symbol VDD TA VIH Condition VDD+/-10% Ambient Temperature Pins 1 and 8 Min 2.25 -40 - Typ 2.5 5 Max 2.75 85 8 Unit V °C pF DC Electrical Characteristics (I-Grade and VDD=2.5V) Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85° Description Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Symbol VINL VINH IINL IINH Condition CLKIN and FBK CLKIN and FBK 0 < VIN < 0.8V CLKIN and FBK 2.4V < VIN < VDD CLKIN and FBK IOL = 6 mA, -1 and -2 versions Min – 1.7 – – – – 2.0 2.0 – – – – – 125 Typ – – 30 30 – – – – 15 10 12 14 16 250 Max 0.7 VDD+0.3 60 60 0.3 0.3 – – 25 14 17 20 24 375 Unit V V µA µA V V V V µA mA mA mA mA k Output LOW Voltage VOL IOL = 8 mA, -1H and -2H versions IOH = –6 mA, -1 and -2 versions Output HIGH Voltage Power Down Supply Current Power Supply Current Power Supply Current Power Supply Current Power Supply Current Pull-down Resistors VOH IOH = –8 mA, -1H and -2H versions IDDPD IDD1 IDD2 IDD3 IDD4 RPUD Measured when CLKIN= GND to VDD or floating All Outputs CL=0, 33.3 MHz CLKIN All versions All Outputs CL=0, 66.6 MHz CLKIN All versions All Outputs CL=0, 133.3 MHz CLKIN All versions All Outputs CL=0, 133.3 MHz CLKIN All versions Pin-1, 2, 3, 5 and 6 Rev 1.1, May 25, 2007 Page 10 of 14 SL23EP04 Switching Electrical Characteristics (I-Grade and VDD=2.5V) Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C Description Symbol FOUT1 FOUT2 Output Frequency Range FOU3 FOUT4 FOUT5 FOUT6 Input Duty Cycle Output Duty Cycle Output Duty Cycle Output Duty Cycle Output Duty Cycle Output Rise/Fall Time Output Rise/Fall Time Output Rise/Fall Time Output Rise/Fall Time Output-to-Output Skew on Same Bank Output-to-Output Skew on Same Bank Output-to-Output Skew Between Bank A and B Output-to-Output Skew Between Bank A and B Device-to-Device Skew DC1 DC2 DC3 DC4 DC5 tr/f1 tr/f2 tr/f3 tr/f4 SKW1 SKW2 SKW3 SKW4 SKW5 Condition CL=15pf, -1H and -2H versions CL=22pf, -1H and -2H versions CL=30pF, -1H and -2H versions CL=15pf, -1 and -2 versions CL=22pf, -1 and -2 versions CL=30pf, -1 and -2 versions Measured at VDD/2, all versions CL=30pF, Fout=66 MHz, all versions Measured at VDD/2 CL=15pF, Fout=66 MHz, all versions Measured at VDD/2 CL=15pF, Fout=133 MHz, all versions Measured at VDD/2 CL=15pF, Fout=166 MHz, all versions Measured at VDD/2 CL=30pF, -1 and -2 versions Measured at 0.6 to 1.8V CL=15pF, -1 and -2 versions Measured at 0.6 to 1.8V CL=30pF, -1H and -2H versions Measured at 0.6 to 1.8V CL=15pF, -1H and -2H version Measured at 0.6 to 1.8V -1 and -2, measured at VDD/2, and outputs are equally loaded -1H and -2H, measured at VDD/2 and outputs are equally loaded -1 and -2, measured at VDD/2, and outputs are equally loaded -1H and -2H, measured at VDD/2 and outputs are equally loaded All versions, measured at VDD/2 and outputs are equally loaded All versions, CLKIN to FBK rising edge, measured at VDD/2 and outputs are equally loaded Min 10 10 10 10 10 10 40 40 45 45 40 - Typ 50 50 50 50 50 100 100 100 180 225 Max 175 135 100 135 100 75 60 60 55 55 60 2.5 1.8 1.8 1.5 220 220 220 375 550 Unit MHz MHz MHz MHz MHz MHz % % % % % ns ns ns ns ps ps ps ps ps Input-to-Output Delay Dt -300 +/-125 300 ps Rev 1.1, May 25, 2007 Page 11 of 14 SL23EP04 Switching Electrical Characteristics (I-Grade and VDD=2.5V – Cont.) Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C Cycle-to-Cycle Jitter (-1 and -2 Versions) Cycle-to-Cycle Jitter (-1H and -2H Versions) PLL Lock Time CCJ1 Fout=66.6 MHz and CL=15pF Fout=133.3 MHz and CL=15pF CCJ2 tLOCK Fout=66.6 MHz and CL=15pF Fout=166.6 MHz and CL=15pF From 0.95VDD and valid CLKIN 80 70 70 60 160 140 140 120 1.0 ps ps ps ps ms External Components & Design Considerations Typical Application Schematic Comments and Recommendations Decoupling Capacitor: A decoupling capacitor of 0.1 F must be used between VDD and VSS pins. Place the capacitor on the component side of the PCB as close to the VDD pin as possible. The PCB trace to the VDD pin and to the GND via should be kept as short as possible. Do not use vias between the decoupling capacitor and the VDD pin. Series Termination Resistor: A series termination resistor is recommended if the distance between the output clocks and the load is over 1 ½ inch. Place the series termination resistors as close to the clock outputs as possible. Zero Delay and Skew Control: All outputs and CLKIN pins should be loaded with the same load to achieve “Zero Delay” between the CLKIN and the outputs. The FBK pin is connected to PLL internally on-chip for feedback and should be connected to one of to output clocks externally. For applications requiring zero input/output delay, the load at the all output pins including the FBK pin must be the same. If any delay adjustment is required, the capacitance at the FBK pin could be increased or decreased to increase or decrease the delay between Bank A and B clocks relative to CLKIN. For minimum pin-to-pin skew, the external load at all the Bank A and B clocks must be the same. In addition, the rise and fall time of the reference clock at CLKIN pin should be similar to rise and fall times at the CLKA and CLK B bank outputs. Rev 1.1, May 25, 2007 Page 12 of 14 SL23EP04 Package Outline and Package Dimensions 8-Pin SOIC (150 Mil) Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Symbol JA JA JA JC Still air 1m/s air flow 3m/s air flow Independent of air flow Condition Min Typ 150 140 120 40 Max Unit °C/W °C/W °C/W °C/W Rev 1.1, May 25, 2007 Page 13 of 14 SL23EP04 Ordering Information [3] Ordering Number SL23EP04SC-1 SL23EP04SC-1T SL23EP04SI-1 SL23EP04SI-1T SL23EP04SC-1H SL23EP04SC-1HT SL23EP04SI-1H SL23EP04SI-1HT SL23EP04SC-2 SL23EP04SC-2T SL23EP04SI-2 SL23EP04SI-2T SL23EP04SC-2H SL23EP04SC-2HT SL23EP04SI-2H SL23EP04SI-2HT Marking SL23EP04SC-1 SL23EP04SC-1 SL23EP04SI-1 SL23EP04SI-1 SL23EP04SC-1H SL23EP04SC-1H SL23EP04SI-1H SL23EP04SI-1H SL23EP04SC-2 SL23EP04SC-2 SL23EP04SI-2 SL23EP04SI-2 SL23EP04SC-2H SL23EP04SC-2H SL23EP04SI-2H SL23EP04SI-2H Shipping Package Tube Tape and Reel Tube Tape and Reel Tube Tape and Reel Tube Tape and Reel Tube Tape and Reel Tube Tape and Reel Tube Tape and Reel Tube Tape and Reel Package 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC Temperature 0 to 70°C 0 to 70°C -40 to 85°C -40 to 85°C 0 to 70°C 0 to 70°C -40 to 85°C -40 to 85°C 0 to 70°C 0 to 70°C -40 to 85°C -40 to 85°C 0 to 70°C 0 to 70°C -40 to 85°C -40 to 85°C Notes: 3. The SL23EP04 products are RoHS compliant. While SLI has reviewed all information herein for accuracy and reliability, Spectra Linear Inc. assumes no responsibility for the use of any circuitry or for the infringement of any patents or other rights of third parties which would result from each use. This product is intended for use in normal commercial applications and is not warranted not is it intended for use in life support, critical medical instruments, or any other application requiring extended temperature range, high reliability, or any other extraordinary environmental requirements unless pursuant to additional processing by Spectra Linear Inc., and an expressed written agreement by Spectra Linear Inc. Spectra Linear Inc. reserves the right to change any circuitry or specification without notice. Rev 1.1, May 25, 2007 Page 14 of 14