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SL38000ZC-XXXT

SL38000ZC-XXXT

  • 厂商:

    SPECTRALINEAR

  • 封装:

  • 描述:

    SL38000ZC-XXXT - Programmable 4-PLL CG with VCXO and SSCG - SpectraLinear Inc

  • 数据手册
  • 价格&库存
SL38000ZC-XXXT 数据手册
SL38000 Programmable 4-PLL CG with VCXO and SSCG Key Features • • • • • • • • • • • • • • • 4 Programmable PLLs with up to 9 Clock Outputs and 2 REFCLKs Wide 2.5V to 3.3V +/-10% power supply range CLKOUTs support 3.3V to 2.5V or 1.8V +/-10% Low power dissipation and low jitter Programmable VCXO and SSCG options EEPROM or I2C Programmability Programmable Center or Down Spread Modulation from 0.25 to 5.0% 8 to 48 MHz external crystal range 8 to 166 MHz external clock input range Programmable 1 to 200 MHz clock output range Integrated internal voltage regulator Programmable PD#/OE/SSON#/FS functions Programmable CL at XIN and XOUT pins Programmable output rise and fall times 28-pin TSSOP package with commercial and industrial temperature ranges Description The SL38000 a fully integrated 4 PLL programmable low power Clock Generator with SSCG and VCXO functions used for reducing Electromagnetic Interference (EMI) and general purpose frequency synthesizing. The product is designed using SpectraLinear proprietary programmable EProClock™ phase-locked loop (PLL) and Spread Spectrum Clock (SSC) technology to synthesize and modulate the input clock. The modulated clock can significantly reduce the measured EMI levels, and leading to the compliance with regulatory agency requirements. Up to 9 output clock frequencies and 2 REFOUT clocks, Spread %, output rise and fall times for each clock outputs, crystal load, modulation frequency and PD#/OE/SSON#/FS functions can be programmed to meet the needs of wide range of applications. The SL38000 operates from 2.5V to 3.3V power supply voltage range. The output clocks (CLKOUTs) can support 3.3 to 2.5V or 1.8V +/-10%. The product is offered in 28-pin TSSOP package with commercial and industrial grades. Benefits • • • • • Peak EMI reduction of 8 to 16 dB Fast time-to-market Cost Reduction Reduction of PCB layers Eleminates the need for XOs and VCXOs Applications • • • Printers, MFPs, Digital Copiers DTV, HDTV, DVD-R/W and STB General Purpose Frequency Synthesising Block Diagram VDDO CLKOUT-1 or MF-1 XIN/CLKIN XOUT VIN VDDA XTAL OSCILLATOR (XO or VXCO) (Optional) PLL-1 Output Drivers with Multi Function I/O and Output Drivers Drive Strength Control CLKOUT-2 or MF-2 CLKOUT-3 or MF-3 CLKOUT-4 or MF-4 CLKOUT-5 or MF-5 CLKOUT-6 or MF-6 CLKOUT-7 or MF-7 REFOUT-1 or MF-9 PLL-2 Voltage Regulator-1 To PLLs Input Mux and Control Logic 5 VSSA VDDX Voltage Regulator-2 VSSX SS-PLL-3 To XO and Core SS-PLL-4 REFOUT-2 or MF-13 VSSO SS Logic Control CLKOUT-8, SDATA or MF-10 CLKOUT-9, SCLK or MF-11 Mux and Div Control I2C Interface Input Logic MEMORY Configuration Configuration Logic MF-8 or MF13 Rev 1.1, August 7, 2008 Page 1 of 12 2200 Laurelwood Road, Santa Clara, CA 95054 Tel: (408) 855-0555 Fax: (408) 855-0550 www.SpectraLinear.com SL38000 Pin Configuration 28-Pin TSSOP Package Rev 1.1, August 7, 2008 Page 2 of 12 SL38000 Pin Description Pin Number 1 2 3 4 11 Pin Name XIN/CLKIN MF-8 MF-9 VIN CLKOUT-1 or MF-1 Pin Type Input Input I/O Input I/O Pin Description Crystal oscillator or external clock input. Multi function input/output. Programmed as OE, FS. There is no programmable pull-up/down resistor. Multi function input/output. Programmed as REFOUT-1, OE, PD#, SSON# or FS. Only programmable pull-up resistor available. VCXO control pin VIN. Programmable Clock Output-1. This pin can be programmed as OE, PD#, SSON# or FS. Programmable pull-up/down resistor is available. Programmed as Clock Output-8 or Serial Data Input or multi function input. This pin can be programmed as OE, PD#, SSON# or FS. Programmable pullup/down resistor is available. Programmable Clock Output-2. This pin can be programmed as OE, PD#, SSON# or FS. This pin can be programmed as OE, PD#, SSON# or FS. Programmable pull-up/down resistor is available. Programmable Clock Output-9, Serial Data Input Clock or multi function input. This pin can be programmed as OE, PD#, SSON# or FS. Programmable pullup/down resistor is available. Programmable Clock Output-3. This pin can be programmed as OE, PD#, SSON# or FS. Programmable pull-up/down resistor is available. Programmable Clock Output-4. This pin can be programmed as OE, PD#, SSON# or FS. Programmable pull-up/down resistor is available. Programmable Clock Output-5. This pin can be programmed as OE, PD#, SSON# or FS. Programmable pull-up/down resistor is available. Programmable Clock Output-6. This pin can be programmed as OE, PD#, SSON# or FS. Programmable pull-up/down resistor is available. Programmable Clock Output-7. This pin can be programmed as OE, PD#, SSON# or FS. Programmable pull-up/down resistor is available. Multi function input. Programmed as OE, PD#, SSON# or FS. Programmable pull-up/down resistor is available. 12 CLKOUT-8, SDATA or MF-10 CLKOUT-2 or MF-2 CLKOUT-9, SCLK or MF-11 CLKOUT-3 or MF-3 CLKOUT-4 or MF-4 CLKOUT-5 or MF-5 CLKOUT-6 or MF-6 CLKOUT-7 or MF-7 MF-12 I/O 13 I/O 14 I/O 15 16 17 18 19 24 I/O I/O I/O I/O I/O Input 25 26 27 7 8 5 6 MF-13 VDDA VDDX VSSX VSSA VDDO-1 VDDO-2 I/O Power Power Power Power Power Power Multi function input/output. Programmed as REFOUT-2, OE, PD#, SSON# or FS. Programmable pull-up/down resistor is available. Power supply, 3.3V to 2.5V, for PLLs. Power supply, 3.3V to 2.5V, for oscillator and core logic. Power supply ground for oscillator and core logic. Power supply ground for PLLs. Power supply for CLKOUT-3, 3.3V to 2.5V or 1.8V, VDDO ≤ VDD. Power supply for CLKOUT-1/2/8/9, 3.3V to 2.5V or 1.8V, VDDO ≤ VDD. Rev 1.1, August 7, 2008 Page 3 of 12 SL38000 22 23 9 10 20 21 28 VDDO-3 VDDO-4 VSSO-1 VSSO-2 VSSO-3 VSSO-4 XOUT Power Power Power Power Power Power Output Power supply for CLKOUT-5/6/7, 3.3V to 2.5V or 1.8V, VDDO ≤ VDD. Power supply for CLKOUT-4, 3.3V to 2.5V or 1.8V, VDDO ≤ VDD. Power ground for CLKOUT-3. Power ground for CLKOUT-1/2/8/9. Power ground for CLKOUT-5/6/7. Power ground for CLKOUT-4. Leave unconnected when external clock is used. Absolute Maximum Ratings Description Supply voltage, VDD Supply voltage, VDDO All Inputs and Outputs Ambient Operating Temperature Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature ESD Rating (Human Body Model) ESD Rating (Charge Device Model) ESD Rating (Machine Model) JEDEC22-A114D JEDEC22-C101C JEDEC22-A115D In operation, C-Grade In operation, I-Grade No power is applied In operation, power is applied Condition VDDA and VDDX VDDO≤VDDA=VDDX Min -0.5 -0.5 0 -40 -65 -4,000 -1,500 -250 Max 4.2 VDD VDD+0.5 70 85 150 125 260 4,000 1,500 250 Unit V V V °C °C °C °C °C V V V DC Electrical Characteristics (C-Grade) Unless otherwise stated VDDA=VDDX=2.5V to 3.3V+/-10%, CL=15pF and Ambient Temperature range 0 to +70 Deg C Description Operating Voltage Input Low Voltage Input High Voltage Output High Voltage Output Low Voltage Output High Voltage Output Low Voltage Symbol VDD VIL VIH VOH1 VOL1 VOH2 VOL2 VDD+/-10% Condition CMOS Level, Pins programmed as PD#, OE, SSON# or FS CMOS Level, Pins programmed as PD#, OE, SSON# or FS IOH=-6mA , Pins programmed as CLKOUT/REFOUT IOL=6mA , Pins programmed as CLKOUT/REFOUT IOH=-4mA , Pins programmed as CLKOUT/REFOUT IOL=4mA , Pins programmed as CLKOUT/REFOUT Min 2.97 0 0.7VDD VDDO0.5 VDDO0.4 - Typ 3.3 - Max 3.63 0.3VDD VDD 0.5 0.4 Unit V V V V V V V Rev 1.1, August 7, 2008 Page 4 of 12 SL38000 Input High Current IIH VIN=VDD, Input Pins are programmed as PD#, OE, SSON# or FS, and no pull-up/down resister used VIN=GND, Input Pins are programmed as PD#, OE, SSON# or FS, and no pull-up/down resister used If Programmed at pins PD#, OE, SSON#, FS and CLKOUT FIN=27MHz and all 7 clocks are at 33MHz and CL=0 FIN=27MHz and all 9 clocks are at 66MHz and CL=0 PD#=GND OE=GND at CLKOUT pins Minimum setting value Maximum setting value Resolution (programming steps) CIN2 CL Pins 4 and 8 if programmed as PD#, OE, SSON or FS All CLKOUT outputs -10 10 μA Input Low Current Pull-up or Down Resistors Operating Supply Current Operating Supply Current Standby Current Output Leakage Current Programmable Input Capacitance at Pins 1 and 28 Input Capacitance Load Capacitance IIL -10 - 10 μA RPU/D IDD1 IDD2 ISBC IOL Cin Cout 100 -10 - 175 16 22 90 8 40 0.5 4 - 250 TBD TBD 120 10 6 15 kΩ mA mA μA μA pF pF pF pF pF AC Electrical Characteristics (C-Grade) Unless otherwise stated VDDA=VDDX= 2.5V to 3.3V+/-10%, CL=15pF and Ambient Temperature range 0 to +70 Deg C Parameter Input Frequency Range Input Frequency Range Symbol FIN1 FIN2 Condition Crystal or Ceramic Resonator External Clock CLKOUT, VDDO=3.3V to 2.5V CLKOUT, VDDO=1.8V REFCLK, crystal or resonator input SSCLK REFCLK , Xtal input REFCLK, clock input Clock Input, Pin 3 FIN=27MHz, all 7 clocks are programmed at 66MHz, CL=15pF FIN=27MHz, all 9 clocks are programmed at 66MHz, CL=15pF Time for VDD reaching minimum specified value and monolitic power supply ramp Min 8 3 3 3 0.25 45 45 40 40 - Typ 50 50 50 50 180 220 - Max 48 166 200 166 48 55 55 60 60 TBD TBD 12 Unit MHz MHz MHz MHz MHz % % % % ps ps ms Output Frequency Range FOUT1 Output Frequency Range FOUT2 Output Frequency Range FOUT3 Output Duty Cycle Output Duty Cycle Output Duty Cycle Input Duty Cycle Cycle-to-Cycle Jitter (SSCLK – Pins 4/6/7/8) Cycle-to-Cycle Jitter (SSCLK – Pins 4/6/7/8) Power supply Ramp Time DC1 DC2 DC3 DCIN CCJ1 CCJ2 tPSR Rev 1.1, August 7, 2008 Page 5 of 12 SL38000 tPLL PLL Lock Time PD# Power-up Time (Crystal or Clock) Output Enable Time Output Disable Time Spread Percent Range Spread Percent Range Modulation Frequency tPU2 tOE tOD SPR-1 SPR-2 FMOD Time from VDD reaching minimum specified value to valid output frequencies at all outputs Time from PD# rising edge to valid frequency at outputs Time from OE falling edge to Hi-Z at outputs Time from OE falling edge to Hi-Z at outputs Center Spread Down Spread Programmable, 31.5 kHz standard 7.8 9.0 ms +/-0.125 -5.0 26 5.0 200 200 31.5 7.0 350 350 +/-2.5 -0.25 120 ms ns ns % % kHz DC Electrical Characteristics (C-Grade) Unless otherwise stated VDDA=VDDX=2.5V to 3.3V+/-10%, CL=15pF and Ambient Temperature range -40 to +85 Deg C Description Operating Voltage Input Low Voltage Input High Voltage Output High Voltage Output Low Voltage Output High Voltage Output Low Voltage Symbol VDD VIL VIH VOH1 VOL1 VOH2 VOL2 VDD+/-10% Condition CMOS Level, Pins programmed as PD#, OE, SSON# or FS CMOS Level, Pins programmed as PD#, OE, SSON# or FS IOH=-6mA , Pins programmed as CLKOUT/REFOUT IOL=6mA , Pins programmed as CLKOUT/REFOUT IOH=-4mA , Pins programmed as CLKOUT/REFOUT IOL=4mA , Pins programmed as CLKOUT/REFOUT VIN=VDD, Input Pins are programmed as PD#, OE, SSON# or FS, and no pull-up/down resister used VIN=GND, Input Pins are programmed as PD#, OE, SSON# or FS, and no pull-up/down resister used If Programmed at pins PD#, OE, SSON#, FS and CLKOUT FIN=27MHz and all 7 clocks are at 33MHz and CL=0 FIN=27MHz and all 9 clocks are at 66MHz and CL=0 PD#=GND Min 2.97 0 0.7VDD VDDO0.5 VDDO0.4 - Typ 3.3 - Max 3.63 0.3VDD VDD 0.5 0.4 Unit V V V V V V V Input High Current IIH -15 - 15 μA Input Low Current Pull-up or Down Resistors Operating Supply Current Operating Supply Current Standby Current IIL -15 - 15 μA RPU/D IDD1 IDD2 ISBC 100 - 175 20 28 140 250 TBD TBD 200 kΩ mA mA μA Rev 1.1, August 7, 2008 Page 6 of 12 SL38000 Output Leakage Current Programmable Input Capacitance at Pins 1 and 28 Input Capacitance Load Capacitance IOL Cin Cout CIN2 CL OE=GND at CLKOUT pins Minimum setting value Maximum setting value Resolution (programming steps) Pins 4 and 8 if programmed as PD#, OE, SSON or FS All CLKOUT outputs -15 8 40 0.5 4 15 6 15 μA pF pF pF pF pF AC Electrical Characteristics (C-Grade) Unless otherwise stated VDDA=VDDX= 2.5V to 3.3V+/-10%, CL=15pF and Ambient Temperature range -40 to +85 Deg C Parameter Input Frequency Range Input Frequency Range Symbol FIN1 FIN2 Condition Crystal or Ceramic Resonator External Clock CLKOUT, VDDO=3.3V to 2.5V CLKOUT, VDDO=1.8V REFCLK, crystal or resonator input SSCLK REFCLK , Xtal input REFCLK, clock input Clock Input, Pin 3 FIN=27MHz, all 7 clocks are programmed at 66MHz, CL=15pF FIN=27MHz, all 9 clocks are programmed at 66MHz, CL=15pF Time for VDD reaching minimum specified value and monolitic power supply ramp Time from VDD reaching minimum specified value to valid output frequencies at all outputs Time from PD# rising edge to valid frequency at outputs Time from OE falling edge to Hi-Z at outputs Time from OE falling edge to Hi-Z at outputs Center Spread Down Spread Programmable, 31.5 kHz standard Min 8 3 3 3 0.25 45 45 40 40 - Typ 50 50 50 50 200 250 - Max 48 166 200 166 48 55 55 60 60 TBD TBD 12 Unit MHz MHz MHz MHz MHz % % % % ps ps ms Output Frequency Range FOUT1 Output Frequency Range FOUT2 Output Frequency Range FOUT3 Output Duty Cycle Output Duty Cycle Output Duty Cycle Input Duty Cycle Cycle-to-Cycle Jitter (SSCLK – Pins 4/6/7/8) Cycle-to-Cycle Jitter (SSCLK – Pins 4/6/7/8) Power supply Ramp Time PLL Lock Time PD# Power-up Time (Crystal or Clock) Output Enable Time Output Disable Time Spread Percent Range Spread Percent Range Modulation Frequency tPU2 tOE tOD SPR-1 SPR-2 FMOD DC1 DC2 DC3 DCIN CCJ1 CCJ2 tPSR tPLL - 7.8 9.0 ms +/-0.125 -5.0 25 5.5 250 250 31.5 8.0 400 400 +/-2.5 -0.25 120 ms ns ns % % kHz Rev 1.1, August 7, 2008 Page 7 of 12 SL38000 Programmable Output Clock (CLKOUT) Rise and Fall Times The output clock rise and fall times (tr/tf) of each clock output can be programmed independently to match drive level to load impedance. Programming Code 000 001 010 011 100 101 110 VDDO=3.3V CL=15pF 4.00 2.00 1.40 1.10 0.85 0.70 0.55 VDDO=2.5V CL=15pF 4.80 2.60 1.80 1.40 1.10 0.90 0.70 VDDO=1.8V CL=15pF 5.60 3.20 2.20 1.70 1.40 1.10 0.90 Unit ns ns ns ns ns ns ns Table 1. Programmable CLKOUT Rise and Fall Times Notes: 1. All typical values are at respective nominal VDD values. 2. The worst case rise and fall times variations are +/- 20% for C-Grade and +/-30% for I-grade. I2C-Bus Timing Specifications PARAMETER SCL Clock Frequency START hold time SCLK LOW period SCLK HIGH period START Setup time SDA set-up time SDA/SCLK rise time SYMBOL fSCL tHD;STA tLOW tHIGH tSU;DAT tSU;DAT tR STANDARD-MODE MIN. 0 4.0 4.7 4.0 4.7 250 MAX. 100 1000 FAST-MODE MIN. 0 0.6 1.3 0.6 0.6 100 MAX. 400 300 UNIT kHz μs μs μs μs ns ns Rev 1.1, August 7, 2008 Page 8 of 12 SL38000 SDA/SCLK fall time STOP set-up time Bus free time tF tSU;STO tBUF 4.0 4.7 300 0.6 1.3 300 ns ns μs Table 2. I2C-Bus Timing Specification SDATA tF SCLK tHD;STA S tHD;DAT tHIGH tSU;STA Sr tSU;STO P S tLOW tR tSU;DAT tF tHD;STA tR tBUF I2C-Bus Timing Diagram External Components & Design Considerations Typical Application Schematic TBD Comments and Recommendations Decoupling Capacitor: A decoupling capacitor of 0.1μF must be used between all VDD and VSS pins on PCB. Place the capacitor on the component side of the PCB as close to the VDD pins as possible. The PCB trace to the VDD pins and to the GND via should be kept as short as possible Do not use vias between the decoupling capacitor and the VDD pins. Series Termination Resistor: A series termination resistor is recommended if the distance between the outputs (CLKOUT or REFCLK pins) and the load is over 1 ½ inch. The nominal impedance of the all clock outputs are about 25 Ω. Use 20 Ω resistor in series with the output to terminate 50Ω trace impedance and place 20 Ω resistor as close to the SSCLK output as possible. Crystal and Crystal Load: Use only parallel resonant fundamental crystals. DO NOT USE higher overtone crystals. To meet the crystal initial accuracy specification (in ppm); the internal on-chip programmable capacitors PCin and PCout must be programmed to match the crystal load requirement. These values are given by the formula below: Rev 1.1, August 7, 2008 Page 9 of 12 SL38000 PCin(pF) =PCout(pF)= [(CL(pF) – Cp(pF)/2)] x 2 Where CL is crystal load capacitor as given by the crystal datasheet and Cp(pF) is the compensation factor for the total parasitic capacitance at XIN or XOUT pin including PCB related parasitic capacitance. As an example; if a crystal with CL=18pF is used and Cp=4pF, by using the above formula, PCin=PCout=[(18-(4/2)] x 2 = 32pF. Programming PCin and PCout to 32pF assures that this crystal sees an equivalent load of 18pF and no other external crystal load capacitor is needed. Deviating from the crystal load specification could cause an increase in frequency accuracy in ppm. Refer to the Table 5 for the recommended crystal specifications. Recommended External Crystal Specifications (XO Version) Parameter FNOM CL R1,1 R1,2 R1,3 DL1,1 DL1,2 Co1 Co2 Description Nominal Crystal Frequency Range Nominal Crystal Load Equivalent Series Resistance Equivalent Series Resistance Equivalent Series Resistance Crystal Drive Level Crystal Drive Level Shunt Capacitance Shunt Capacitance Min 8 6 20 12.5 10 Typ 12 40 25 20 4 5 Max 48 18 100 60 50 200 150 5.4 7.2 Unit MHz pF Ohm Ohm Ohm µW µW pF pF Comments Fundamental Mode – AT Cut Load for +/-0 ppm Fo resonance value F-Range: 8.0 to 12.999 MHz F-Range: 13.0 to 19.999 MHz F-Range: 20.0 to 48.000 MHz F-Range: 8.0 to 19.999 MHz F-Range: 20.0 to 48.000 MHz SMD Xtals Through Hole (Leaded) Xtals Table 3. Recommended Crystal Specifications Rev 1.1, August 7, 2008 Page 10 of 12 SL38000 Package Outline and Package Dimensions 28-Pin TSSOP Package Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Symbol θ JA θ JA θ JA θ JC Still air 1m/s air flow 3m/s air flow Independent of air flow Condition Min Typ TBD TBD TBD TBD Max Unit °C/W °C/W °C/W °C/W Rev 1.1, August 7, 2008 Page 11 of 12 SL38000 Ordering Information [1] Ordering Number [2] Marking SL38000ZC-XXX SL38000ZC-XXX SL380004ZI-XXX SL38000ZI-XXX Shipping Package Tube Tape and Reel Tube Tape and Reel Package 28-pin TSSOP 28-pin TSSOP 28-pin TSSOP 28-pin TSSOP Temperature 0 to 70°C 0 to 70°C -40 to 85°C -40 to 85°C SL38000ZC-XXX SL38000ZC-XXXT SL38000ZI-XXX SL38000ZI-XXXT Notes: 1. All SLI products are RoHS compliant. 2. “XXX” is “Dash” number and will be assigned by SLI for final programmed samples and production units based on customer programming requirements. While SLI has reviewed all information herein for accuracy and reliability, Spectra Linear Inc. assumes no responsibility for the use of any circuitry or for the infringement of any patents or other rights of third parties which would result from each use. This product is intended for use in normal commercial applications and is not warranted not is it intended for use in life support, critical medical instruments, or any other application requiring extended temperature range, high reliability, or any other extraordinary environmental requirements unless pursuant to additional processing by Spectra Linear Inc., and an expressed written agreement by Spectra Linear Inc. Spectra Linear Inc. reserves the right to change any circuitry or specification without notice. Rev 1.1, August 7, 2008 Page 12 of 12
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